DE69429567D1 - Nichtflüchtige Halbleiteranordnung - Google Patents

Nichtflüchtige Halbleiteranordnung

Info

Publication number
DE69429567D1
DE69429567D1 DE69429567T DE69429567T DE69429567D1 DE 69429567 D1 DE69429567 D1 DE 69429567D1 DE 69429567 T DE69429567 T DE 69429567T DE 69429567 T DE69429567 T DE 69429567T DE 69429567 D1 DE69429567 D1 DE 69429567D1
Authority
DE
Germany
Prior art keywords
semiconductor device
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69429567T
Other languages
English (en)
Other versions
DE69429567T2 (de
Inventor
Kenshiro Arase
Koichi Maari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP25871193A external-priority patent/JPH07115177A/ja
Priority claimed from JP5264639A external-priority patent/JPH07122658A/ja
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69429567D1 publication Critical patent/DE69429567D1/de
Application granted granted Critical
Publication of DE69429567T2 publication Critical patent/DE69429567T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE69429567T 1993-10-15 1994-10-14 Nichtflüchtige Halbleiteranordnung Expired - Fee Related DE69429567T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25871193A JPH07115177A (ja) 1993-10-15 1993-10-15 半導体不揮発性記憶装置
JP5264639A JPH07122658A (ja) 1993-10-22 1993-10-22 半導体不揮発性記憶装置

Publications (2)

Publication Number Publication Date
DE69429567D1 true DE69429567D1 (de) 2002-02-07
DE69429567T2 DE69429567T2 (de) 2002-09-12

Family

ID=26543795

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69429567T Expired - Fee Related DE69429567T2 (de) 1993-10-15 1994-10-14 Nichtflüchtige Halbleiteranordnung

Country Status (4)

Country Link
US (1) US5814855A (de)
EP (1) EP0649172B1 (de)
KR (1) KR100303061B1 (de)
DE (1) DE69429567T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2973876B2 (ja) * 1995-07-07 1999-11-08 日本電気株式会社 化合物半導体メモリ
JP4810712B2 (ja) * 1997-11-05 2011-11-09 ソニー株式会社 不揮発性半導体記憶装置及びその読み出し方法
WO2001024268A1 (en) * 1999-09-24 2001-04-05 Intel Corporation A nonvolatile memory device with a high work function floating-gate and method of fabrication
US6518618B1 (en) 1999-12-03 2003-02-11 Intel Corporation Integrated memory cell and method of fabrication
JP4282248B2 (ja) 2001-03-30 2009-06-17 株式会社東芝 半導体記憶装置
DE10156468A1 (de) * 2001-11-16 2003-05-28 Eupec Gmbh & Co Kg Halbleiterbauelement und Verfahren zum Kontaktieren eines solchen Halbleiterbauelements
KR20030060313A (ko) * 2002-01-08 2003-07-16 삼성전자주식회사 낸드형 플래쉬 메모리소자
KR100456596B1 (ko) * 2002-05-08 2004-11-09 삼성전자주식회사 부유트랩형 비휘발성 기억소자의 소거 방법
US7057928B2 (en) * 2003-07-08 2006-06-06 Hewlett-Packard Development Company, L.P. System and method for erasing high-density non-volatile fast memory
US8792284B2 (en) 2010-08-06 2014-07-29 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor memory device
JP2015035547A (ja) 2013-08-09 2015-02-19 株式会社東芝 不揮発性半導体記憶装置及びその製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5635472A (en) * 1979-08-30 1981-04-08 Nec Corp Mos type nonvolatile memory device
US4282446A (en) * 1979-10-01 1981-08-04 Texas Instruments Incorporated High density floating gate EPROM programmable by charge storage
JPS58220464A (ja) * 1982-06-17 1983-12-22 Fujitsu Ltd 半導体記憶装置
JPS59114869A (ja) * 1982-12-21 1984-07-03 Nec Corp 多結晶シリコンの浮遊ゲ−トを有する不揮発性半導体記憶装置
JPS6437878A (en) * 1987-08-03 1989-02-08 Nec Corp Nonvolatile semiconductor storage device
EP0369676B1 (de) * 1988-11-17 1995-11-08 Seiko Instr Inc Nichtflüchtige Halbleiterspeicheranordnung.
KR910007434B1 (ko) * 1988-12-15 1991-09-26 삼성전자 주식회사 전기적으로 소거 및 프로그램 가능한 반도체 메모리장치 및 그 소거 및 프로그램 방법
KR910004166B1 (ko) * 1988-12-27 1991-06-22 삼성전자주식회사 낸드쎌들을 가지는 전기적으로 소거 및 프로그램 가능한 반도체 메모리장치
JPH04118974A (ja) * 1990-09-10 1992-04-20 Fujitsu Ltd 半導体不揮発性記憶装置及びその製造方法
US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
US5479368A (en) * 1993-09-30 1995-12-26 Cirrus Logic, Inc. Spacer flash cell device with vertically oriented floating gate

Also Published As

Publication number Publication date
EP0649172A3 (de) 1995-10-25
KR100303061B1 (ko) 2001-11-22
KR950012741A (ko) 1995-05-16
US5814855A (en) 1998-09-29
EP0649172A2 (de) 1995-04-19
DE69429567T2 (de) 2002-09-12
EP0649172B1 (de) 2002-01-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee