DE69402221T2 - Bipolartransistoren und deren Herstellungsverfahren - Google Patents

Bipolartransistoren und deren Herstellungsverfahren

Info

Publication number
DE69402221T2
DE69402221T2 DE69402221T DE69402221T DE69402221T2 DE 69402221 T2 DE69402221 T2 DE 69402221T2 DE 69402221 T DE69402221 T DE 69402221T DE 69402221 T DE69402221 T DE 69402221T DE 69402221 T2 DE69402221 T2 DE 69402221T2
Authority
DE
Germany
Prior art keywords
manufacturing processes
bipolar transistors
bipolar
transistors
processes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69402221T
Other languages
English (en)
Other versions
DE69402221D1 (de
Inventor
Ali A Iranmanesh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69402221D1 publication Critical patent/DE69402221D1/de
Publication of DE69402221T2 publication Critical patent/DE69402221T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/011—Bipolar transistors
DE69402221T 1993-01-29 1994-01-17 Bipolartransistoren und deren Herstellungsverfahren Expired - Fee Related DE69402221T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1101993A 1993-01-29 1993-01-29

Publications (2)

Publication Number Publication Date
DE69402221D1 DE69402221D1 (de) 1997-04-30
DE69402221T2 true DE69402221T2 (de) 1997-08-14

Family

ID=21748506

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69402221T Expired - Fee Related DE69402221T2 (de) 1993-01-29 1994-01-17 Bipolartransistoren und deren Herstellungsverfahren

Country Status (6)

Country Link
US (3) US5675175A (de)
EP (1) EP0608999B1 (de)
JP (2) JP3564161B2 (de)
KR (1) KR100320393B1 (de)
CN (1) CN1092559A (de)
DE (1) DE69402221T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
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DE69402221T2 (de) * 1993-01-29 1997-08-14 Nat Semiconductor Corp Bipolartransistoren und deren Herstellungsverfahren
US5389552A (en) * 1993-01-29 1995-02-14 National Semiconductor Corporation Transistors having bases with different shape top surfaces
KR0151011B1 (ko) * 1994-11-30 1998-10-01 김광호 바이폴라 트랜지스터 및 그 제조방법
US5858828A (en) * 1997-02-18 1999-01-12 Symbios, Inc. Use of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor
US6586782B1 (en) * 1998-07-30 2003-07-01 Skyworks Solutions, Inc. Transistor layout having a heat dissipative emitter
JP2000100826A (ja) * 1998-09-28 2000-04-07 Rohm Co Ltd パワートランジスタ及びそれを用いた半導体集積回路装置
EP1071133B1 (de) 1999-07-21 2010-04-21 STMicroelectronics Srl Verfahren zum Herstellen von CMOS Transistoren nichtflüchtiger Speicher und von vertikalen Bipolartransistoren mit hohem Verstärkungsfaktor
JP3681942B2 (ja) 1999-12-28 2005-08-10 松下電器産業株式会社 バイポーラトランジスタの製造方法
DE10004111A1 (de) * 2000-01-31 2001-08-09 Infineon Technologies Ag Bipolartransistor
US6657280B1 (en) * 2000-11-13 2003-12-02 International Business Machines Corporation Redundant interconnect high current bipolar device
JP2002319590A (ja) * 2001-04-20 2002-10-31 Denso Corp 半導体装置
KR100415379B1 (ko) * 2002-01-08 2004-01-16 주식회사 케이이씨 3차원 홀 소자 및 그 제조 방법
US6724050B2 (en) * 2002-01-18 2004-04-20 Texas Instruments Incorporated ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta
DE10240404A1 (de) * 2002-09-02 2004-03-18 Austriamicrosystems Ag Hall-Sensor und Verfahren zu dessen Betrieb
DE10318422B4 (de) * 2003-04-23 2006-08-10 Infineon Technologies Ag Hochfrequenz-Bipolartransistor mit Silizidregion und Verfahren zur Herstellung desselben
US7238565B2 (en) * 2004-12-08 2007-07-03 International Business Machines Corporation Methodology for recovery of hot carrier induced degradation in bipolar devices
US20070093814A1 (en) * 2005-10-11 2007-04-26 Callahan Ronald Ii Dynamic spinal stabilization systems
DE102006035121B4 (de) * 2006-07-28 2011-05-19 Infineon Technologies Ag Bipolartransistor mit reduziertem Substratstrom
JP2008044300A (ja) * 2006-08-21 2008-02-28 Brother Ind Ltd 記録装置及びパルス生成制御装置
KR100798453B1 (ko) * 2006-12-16 2008-01-28 (주)삼우교역 가구용 오토클로져
KR100971212B1 (ko) 2007-12-28 2010-07-20 주식회사 동부하이텍 반도체 소자 및 그 제조 방법
US8669640B2 (en) * 2009-07-14 2014-03-11 Freescale Semiconductor, Inc. Bipolar transistor
CN105261639B (zh) * 2014-07-18 2019-02-26 稳懋半导体股份有限公司 异质接面双极性电晶体
MA44821A (fr) 2016-02-27 2019-01-02 Kinzinger Automation Gmbh Procédé d'allocation d'une pile de registres virtuels dans une machine à pile
CN108520896B (zh) * 2018-05-03 2021-01-01 西安建筑科技大学 一种耐压双极晶体管及其制作方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3988766A (en) * 1974-04-29 1976-10-26 General Electric Company Multiple P-N junction formation with an alloy droplet
US4042947A (en) * 1976-01-06 1977-08-16 Westinghouse Electric Corporation High voltage transistor with high gain
US4804634A (en) * 1981-04-24 1989-02-14 National Semiconductor Corporation Integrated circuit lateral transistor structure
JPS61220465A (ja) * 1985-03-27 1986-09-30 Toshiba Corp 半導体装置
US5077227A (en) * 1986-06-03 1991-12-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
JP2565317B2 (ja) * 1986-12-03 1996-12-18 富士通株式会社 半導体装置の製造方法
US5059546A (en) * 1987-05-01 1991-10-22 Texas Instruments Incorporated BICMOS process for forming shallow NPN emitters and mosfet source/drains
US4916083A (en) * 1987-05-11 1990-04-10 International Business Machines Corporation High performance sidewall emitter transistor
US5055418A (en) * 1987-07-29 1991-10-08 National Semiconductor Corporation Process for fabricating complementary contactless vertical bipolar transistors
JPH01220465A (ja) * 1988-02-29 1989-09-04 Seiko Epson Corp 半導体装置
DE68928787T2 (de) * 1988-04-11 1998-12-24 Synergy Semiconductor Corp Verfahren zur Herstellung eines Bipolartransistors
JPH01274470A (ja) * 1988-04-26 1989-11-02 Nec Corp バイポーラ・トランジスタ装置及びその製造方法
JP2748420B2 (ja) * 1988-08-12 1998-05-06 ソニー株式会社 バイポーラトランジスタ及びその製造方法
US5237200A (en) * 1989-07-28 1993-08-17 Hitachi, Ltd. Semiconductor bipolar transistor with concentric regions
US5109263A (en) * 1989-07-28 1992-04-28 Hitachi, Ltd. Semiconductor device with optimal distance between emitter and trench isolation
US5185276A (en) * 1990-01-31 1993-02-09 International Business Machines Corporation Method for improving low temperature current gain of bipolar transistors
JPH0736419B2 (ja) * 1990-02-09 1995-04-19 株式会社東芝 半導体装置及びその製造方法
US5139961A (en) * 1990-04-02 1992-08-18 National Semiconductor Corporation Reducing base resistance of a bjt by forming a self aligned silicide in the single crystal region of the extrinsic base
US5024971A (en) * 1990-08-20 1991-06-18 Motorola, Inc. Method for patterning submicron openings using an image reversal layer of material
US5200347A (en) * 1991-02-14 1993-04-06 Linear Technology Corporation Method for improving the radiation hardness of an integrated circuit bipolar transistor
JP2672199B2 (ja) * 1991-05-21 1997-11-05 シャープ株式会社 半導体装置の製造方法
US5208169A (en) * 1991-06-28 1993-05-04 Texas Instruments Incorporated Method of forming high voltage bipolar transistor for a BICMOS integrated circuit
US5204277A (en) * 1992-02-03 1993-04-20 Motorola, Inc. Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact
US5389552A (en) * 1993-01-29 1995-02-14 National Semiconductor Corporation Transistors having bases with different shape top surfaces
DE69402221T2 (de) * 1993-01-29 1997-08-14 Nat Semiconductor Corp Bipolartransistoren und deren Herstellungsverfahren

Also Published As

Publication number Publication date
KR100320393B1 (ko) 2002-06-20
EP0608999A1 (de) 1994-08-03
JP2004006915A (ja) 2004-01-08
JPH077011A (ja) 1995-01-10
CN1092559A (zh) 1994-09-21
DE69402221D1 (de) 1997-04-30
EP0608999B1 (de) 1997-03-26
US5733791A (en) 1998-03-31
US5850101A (en) 1998-12-15
JP3564161B2 (ja) 2004-09-08
US5675175A (en) 1997-10-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee