DE69025747T2 - Selbstjustierte Kontakt-Technologie - Google Patents

Selbstjustierte Kontakt-Technologie

Info

Publication number
DE69025747T2
DE69025747T2 DE69025747T DE69025747T DE69025747T2 DE 69025747 T2 DE69025747 T2 DE 69025747T2 DE 69025747 T DE69025747 T DE 69025747T DE 69025747 T DE69025747 T DE 69025747T DE 69025747 T2 DE69025747 T2 DE 69025747T2
Authority
DE
Germany
Prior art keywords
self
aligned contact
contact technology
technology
aligned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69025747T
Other languages
English (en)
Other versions
DE69025747D1 (de
Inventor
Gen M Chin
Tzu-Yin Chiu
Te-Yin Mark Liu
Alexander M Voshchenkov
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of DE69025747D1 publication Critical patent/DE69025747D1/de
Application granted granted Critical
Publication of DE69025747T2 publication Critical patent/DE69025747T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
DE69025747T 1990-02-20 1990-12-07 Selbstjustierte Kontakt-Technologie Expired - Lifetime DE69025747T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/482,444 US4992848A (en) 1990-02-20 1990-02-20 Self-aligned contact technology

Publications (2)

Publication Number Publication Date
DE69025747D1 DE69025747D1 (de) 1996-04-11
DE69025747T2 true DE69025747T2 (de) 1996-07-18

Family

ID=23916100

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69025747T Expired - Lifetime DE69025747T2 (de) 1990-02-20 1990-12-07 Selbstjustierte Kontakt-Technologie

Country Status (4)

Country Link
US (1) US4992848A (de)
EP (1) EP0443253B1 (de)
JP (1) JP2515055B2 (de)
DE (1) DE69025747T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993016494A1 (en) * 1992-01-31 1993-08-19 Analog Devices, Inc. Complementary bipolar polysilicon emitter devices
US5422508A (en) * 1992-09-21 1995-06-06 Siliconix Incorporated BiCDMOS structure
KR100307287B1 (ko) 1998-11-20 2001-12-05 윤종용 반도체장치의패드제조방법
KR100308619B1 (ko) 1999-08-24 2001-11-01 윤종용 반도체 장치용 자기 정렬 콘택 패드 형성 방법
JP4657614B2 (ja) 2004-03-09 2011-03-23 Ｏｋｉセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
CN101621030B (zh) * 2008-07-02 2011-01-12 中芯国际集成电路制造(上海)有限公司 具有多晶硅接触的自对准mos结构

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4319932A (en) * 1980-03-24 1982-03-16 International Business Machines Corporation Method of making high performance bipolar transistor with polysilicon base contacts
JPS57118669A (en) * 1981-01-16 1982-07-23 Toshiba Corp Multiemitter type npn transistor
US4521952A (en) * 1982-12-02 1985-06-11 International Business Machines Corporation Method of making integrated circuits using metal silicide contacts
US4646122A (en) * 1983-03-11 1987-02-24 Hitachi, Ltd. Semiconductor device with floating remote gate turn-off means
US4453306A (en) * 1983-05-27 1984-06-12 At&T Bell Laboratories Fabrication of FETs
US4566176A (en) * 1984-05-23 1986-01-28 U.S. Philips Corporation Method of manufacturing transistors
JPS6146063A (ja) * 1984-08-10 1986-03-06 Hitachi Ltd 半導体装置の製造方法
JPS61156878A (ja) * 1984-12-28 1986-07-16 Fujitsu Ltd メツシユエミツタ・トランジスタ
JPS61210668A (ja) * 1985-03-15 1986-09-18 Toshiba Corp 半導体装置
JPS6127677A (ja) * 1985-05-17 1986-02-07 Nec Corp 半導体装置の製造方法
US4748490A (en) * 1985-08-01 1988-05-31 Texas Instruments Incorporated Deep polysilicon emitter antifuse memory cell
JPS62101071A (ja) * 1985-10-28 1987-05-11 Nec Corp 分割エミツタ型トランジスタ
DE3767431D1 (de) * 1986-04-23 1991-02-21 American Telephone & Telegraph Verfahren zur herstellung von halbleiterbauelementen.
JPS6337657A (ja) * 1986-08-01 1988-02-18 Nippon Mining Co Ltd 電力増幅トランジスタとその製造方法
GB8621534D0 (en) * 1986-09-08 1986-10-15 British Telecomm Bipolar fabrication process
US4871684A (en) * 1987-10-29 1989-10-03 International Business Machines Corporation Self-aligned polysilicon emitter and contact structure for high performance bipolar transistors
US4839305A (en) * 1988-06-28 1989-06-13 Texas Instruments Incorporated Method of making single polysilicon self-aligned transistor

Also Published As

Publication number Publication date
DE69025747D1 (de) 1996-04-11
JP2515055B2 (ja) 1996-07-10
EP0443253A1 (de) 1991-08-28
US4992848A (en) 1991-02-12
EP0443253B1 (de) 1996-03-06
JPH06318600A (ja) 1994-11-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition