MA44821A - Procédé d'allocation d'une pile de registres virtuels dans une machine à pile - Google Patents
Procédé d'allocation d'une pile de registres virtuels dans une machine à pileInfo
- Publication number
- MA44821A MA44821A MA044821A MA44821A MA44821A MA 44821 A MA44821 A MA 44821A MA 044821 A MA044821 A MA 044821A MA 44821 A MA44821 A MA 44821A MA 44821 A MA44821 A MA 44821A
- Authority
- MA
- Morocco
- Prior art keywords
- pointer
- memory
- allocating
- stack
- instruction
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/35—Indirect addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/468—Specific access rights for resources, e.g. using capability register
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/45—Caching of specific data in cache memory
- G06F2212/451—Stack data
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Computer Hardware Design (AREA)
- Bioethics (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
- Power Sources (AREA)
Abstract
Le problème est résolu par un procédé (40) d’adressage en mémoire dans un appareil de traitement de données (10) comprenant, lorsqu’une unité de traitement centrale (11), une tâche (31, 32, 33, 34) de l’appareil ( 10) exécute une instruction impliquant un pointeur (57) dans un segment (r, d, h, f, o, i, c) de la mémoire: décodage de l'instruction au moyen d'un décodeur d'instruction (12), générant une adresse (45) dans la mémoire au moyen d'un opérateur de pointeur sécurisé (41) agissant sur le pointeur (57), en augmentant l'adresse (45) d'un identifiant (43) de la tâche (31, 32, 33, 34) et d'un identifiant (44) du segment (r, d, h, f, o, i, c), lesdits identifiants (43, 44) étant contrôlés par le matériel (42) et, sur la base de l'adresse augmentée (45), déréférencement le pointeur (57) via une unité de gestion de mémoire (13).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EPPCT/EP2016/000344 | 2016-02-27 | ||
EPPCT/EP2016/000345 | 2016-02-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
MA44821A true MA44821A (fr) | 2019-01-02 |
Family
ID=58261638
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MA044821A MA44821A (fr) | 2016-02-27 | Procédé d'allocation d'une pile de registres virtuels dans une machine à pile |
Country Status (5)
Country | Link |
---|---|
US (3) | US10789178B2 (fr) |
EP (2) | EP3420446B1 (fr) |
CN (2) | CN108701025B (fr) |
MA (1) | MA44821A (fr) |
WO (2) | WO2017144731A1 (fr) |
Families Citing this family (7)
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US10812523B2 (en) * | 2018-02-14 | 2020-10-20 | Cisco Technology, Inc. | Adaptive union file system based protection of services |
US11113137B2 (en) * | 2018-08-28 | 2021-09-07 | Sap Se | Error incident fingerprinting with unique static identifiers |
US10705966B1 (en) * | 2018-12-14 | 2020-07-07 | Western Digital Technologies, Inc. | Mapping for multi-state programming of memory devices |
CN111435309A (zh) * | 2019-01-11 | 2020-07-21 | 中标软件有限公司 | 一种寄存器分配优化实现方法 |
US11036406B2 (en) * | 2019-05-21 | 2021-06-15 | International Business Machines Corporation | Thermally aware memory management |
CN110737609B (zh) * | 2019-09-27 | 2022-03-01 | 厦门四信通信科技有限公司 | 基于虚拟寄存器的数据管理办法、装置、设备及存储介质 |
EP4211553A1 (fr) | 2020-09-12 | 2023-07-19 | Kinzinger Automation GmbH | Procédé de traitement entrelacé sur un coeur de calcul universel |
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-
0
- MA MA044821A patent/MA44821A/fr unknown
-
2017
- 2017-02-27 EP EP17709393.7A patent/EP3420446B1/fr active Active
- 2017-02-27 WO PCT/EP2017/054535 patent/WO2017144731A1/fr active Application Filing
- 2017-02-27 US US16/079,667 patent/US10789178B2/en active Active
- 2017-02-27 CN CN201780013727.5A patent/CN108701025B/zh active Active
- 2017-02-27 EP EP17709392.9A patent/EP3420445B1/fr active Active
- 2017-02-27 WO PCT/EP2017/054532 patent/WO2017144728A1/fr active Application Filing
- 2017-02-27 CN CN201780013704.4A patent/CN108701024B/zh active Active
- 2017-02-27 US US16/079,628 patent/US11042376B2/en active Active
-
2020
- 2020-08-20 US US16/998,169 patent/US11593277B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP3420446A1 (fr) | 2019-01-02 |
WO2017144731A1 (fr) | 2017-08-31 |
CN108701025A (zh) | 2018-10-23 |
US10789178B2 (en) | 2020-09-29 |
US20200387459A1 (en) | 2020-12-10 |
CN108701024B (zh) | 2023-06-16 |
CN108701025B (zh) | 2023-08-22 |
CN108701024A (zh) | 2018-10-23 |
EP3420446B1 (fr) | 2020-11-11 |
US20190065198A1 (en) | 2019-02-28 |
WO2017144728A1 (fr) | 2017-08-31 |
EP3420445A1 (fr) | 2019-01-02 |
EP3420445B1 (fr) | 2021-12-01 |
US11593277B2 (en) | 2023-02-28 |
US11042376B2 (en) | 2021-06-22 |
US20190065407A1 (en) | 2019-02-28 |
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