DE69328639T2 - Halbleiterspeicheranordnung mit Ersatzspeicherzellen - Google Patents
Halbleiterspeicheranordnung mit ErsatzspeicherzellenInfo
- Publication number
- DE69328639T2 DE69328639T2 DE69328639T DE69328639T DE69328639T2 DE 69328639 T2 DE69328639 T2 DE 69328639T2 DE 69328639 T DE69328639 T DE 69328639T DE 69328639 T DE69328639 T DE 69328639T DE 69328639 T2 DE69328639 T2 DE 69328639T2
- Authority
- DE
- Germany
- Prior art keywords
- arrangement
- spare
- memory cells
- semiconductor memory
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2229892 | 1992-02-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69328639D1 DE69328639D1 (de) | 2000-06-21 |
DE69328639T2 true DE69328639T2 (de) | 2000-08-31 |
Family
ID=12078840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69328639T Expired - Lifetime DE69328639T2 (de) | 1992-02-07 | 1993-02-05 | Halbleiterspeicheranordnung mit Ersatzspeicherzellen |
Country Status (5)
Country | Link |
---|---|
US (1) | US5475648A (de) |
EP (1) | EP0554901B1 (de) |
JP (1) | JP3040625B2 (de) |
KR (1) | KR960004741B1 (de) |
DE (1) | DE69328639T2 (de) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3351595B2 (ja) * | 1993-12-22 | 2002-11-25 | 株式会社日立製作所 | 半導体メモリ装置 |
JPH07282597A (ja) * | 1994-04-12 | 1995-10-27 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR0152168B1 (ko) * | 1994-04-15 | 1998-10-01 | 모리시다 요이치 | 반도체 기억장치 |
US5901105A (en) * | 1995-04-05 | 1999-05-04 | Ong; Adrian E | Dynamic random access memory having decoding circuitry for partial memory blocks |
ATE220807T1 (de) * | 1995-08-09 | 2002-08-15 | Infineon Technologies Ag | Integrierter halbleiterspeicher mit redundanzspeicherzellen |
JP3557019B2 (ja) * | 1995-11-17 | 2004-08-25 | 株式会社東芝 | 半導体記憶装置 |
US5671185A (en) * | 1996-03-12 | 1997-09-23 | United Microelectronics Corporation | Apparatus for replacing defective cells in a memory device |
JP3220009B2 (ja) * | 1996-05-30 | 2001-10-22 | 日本電気株式会社 | 半導体記憶装置 |
US5699307A (en) * | 1996-06-28 | 1997-12-16 | Intel Corporation | Method and apparatus for providing redundant memory in an integrated circuit utilizing a subarray shuffle replacement scheme |
US5781717A (en) * | 1996-09-19 | 1998-07-14 | I-Cube, Inc. | Dynamic spare column replacement memory system |
US5996106A (en) * | 1997-02-04 | 1999-11-30 | Micron Technology, Inc. | Multi bank test mode for memory devices |
US5841710A (en) * | 1997-02-14 | 1998-11-24 | Micron Electronics, Inc. | Dynamic address remapping decoder |
JP3476646B2 (ja) * | 1997-03-07 | 2003-12-10 | シャープ株式会社 | 半導体記憶装置 |
US5831913A (en) * | 1997-03-31 | 1998-11-03 | International Business Machines Corporation | Method of making a memory fault-tolerant using a variable size redundancy replacement configuration |
US5831914A (en) * | 1997-03-31 | 1998-11-03 | International Business Machines Corporation | Variable size redundancy replacement architecture to make a memory fault-tolerant |
US5913928A (en) | 1997-05-09 | 1999-06-22 | Micron Technology, Inc. | Data compression test mode independent of redundancy |
DE19729579C2 (de) | 1997-07-10 | 2000-12-07 | Siemens Ag | Verfahren zum Aktivieren einer redundanten Wortleitung bei Inter-Segment-Redundanz bei einem Halbleiterspeicher mit in Segmenten organisierten Wortleitungen |
US5978931A (en) * | 1997-07-16 | 1999-11-02 | International Business Machines Corporation | Variable domain redundancy replacement configuration for a memory device |
US5881003A (en) * | 1997-07-16 | 1999-03-09 | International Business Machines Corporation | Method of making a memory device fault tolerant using a variable domain redundancy replacement configuration |
JP3507674B2 (ja) * | 1997-10-30 | 2004-03-15 | 株式会社東芝 | 半導体記憶装置 |
US5970000A (en) * | 1998-02-02 | 1999-10-19 | International Business Machines Corporation | Repairable semiconductor integrated circuit memory by selective assignment of groups of redundancy elements to domains |
US6081463A (en) * | 1998-02-25 | 2000-06-27 | Micron Technology, Inc. | Semiconductor memory remapping |
US6332183B1 (en) | 1998-03-05 | 2001-12-18 | Micron Technology, Inc. | Method for recovery of useful areas of partially defective synchronous memory components |
US6314527B1 (en) | 1998-03-05 | 2001-11-06 | Micron Technology, Inc. | Recovery of useful areas of partially defective synchronous memory components |
KR100621265B1 (ko) * | 1998-04-17 | 2006-09-13 | 인피니언 테크놀로지스 아게 | 리던던트 기억 셀을 갖는 메모리 장치 및 리던던트 기억 셀에 액세스하기 위한 방법 |
US6381708B1 (en) | 1998-04-28 | 2002-04-30 | Micron Technology, Inc. | Method for decoding addresses for a defective memory array |
US6381707B1 (en) | 1998-04-28 | 2002-04-30 | Micron Technology, Inc. | System for decoding addresses for a defective memory array |
JP2000011681A (ja) * | 1998-06-22 | 2000-01-14 | Mitsubishi Electric Corp | 同期型半導体記憶装置 |
US5978291A (en) * | 1998-09-30 | 1999-11-02 | International Business Machines Corporation | Sub-block redundancy replacement for a giga-bit scale DRAM |
JP2000149564A (ja) | 1998-10-30 | 2000-05-30 | Mitsubishi Electric Corp | 半導体記憶装置 |
US6018483A (en) * | 1998-12-10 | 2000-01-25 | Siemens Aktiengesellschaft | Distributed block redundancy for memory devices |
US6496876B1 (en) | 1998-12-21 | 2002-12-17 | Micron Technology, Inc. | System and method for storing a tag to identify a functional storage location in a memory device |
JP2000243086A (ja) | 1998-12-24 | 2000-09-08 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3964584B2 (ja) * | 1999-11-26 | 2007-08-22 | 東芝マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
US6578157B1 (en) | 2000-03-06 | 2003-06-10 | Micron Technology, Inc. | Method and apparatus for recovery of useful areas of partially defective direct rambus rimm components |
US7269765B1 (en) | 2000-04-13 | 2007-09-11 | Micron Technology, Inc. | Method and apparatus for storing failing part locations in a module |
DE10155449A1 (de) * | 2001-11-12 | 2003-05-28 | Infineon Technologies Ag | Verfahren zur Rekonfiguration eines Speichers |
JP4679036B2 (ja) * | 2002-09-12 | 2011-04-27 | ルネサスエレクトロニクス株式会社 | 記憶装置 |
JP4758229B2 (ja) | 2003-07-15 | 2011-08-24 | エルピーダメモリ株式会社 | 半導体記憶装置 |
DE10335708B4 (de) * | 2003-08-05 | 2009-02-26 | Qimonda Ag | Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen |
US7134057B1 (en) | 2004-02-13 | 2006-11-07 | Sun Microsystems, Inc. | Off-pitch column redundancy using dynamic shifters |
KR100557712B1 (ko) * | 2004-11-10 | 2006-03-07 | 삼성전자주식회사 | 반도체 메모리의 리페어 방법 및 장치 |
JP2007172832A (ja) * | 2007-03-20 | 2007-07-05 | Renesas Technology Corp | 半導体記憶装置及び半導体記憶装置の欠陥救済方法 |
JP2011159345A (ja) * | 2010-01-29 | 2011-08-18 | Elpida Memory Inc | 半導体記憶装置 |
KR20170055222A (ko) | 2015-11-11 | 2017-05-19 | 삼성전자주식회사 | 리페어 단위 변경 기능을 가지는 메모리 장치 및 메모리 시스템 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4346459A (en) * | 1980-06-30 | 1982-08-24 | Inmos Corporation | Redundancy scheme for an MOS memory |
JPH0670880B2 (ja) * | 1983-01-21 | 1994-09-07 | 株式会社日立マイコンシステム | 半導体記憶装置 |
JPS62125598A (ja) * | 1985-11-27 | 1987-06-06 | Hitachi Ltd | 欠陥救済回路 |
JPS62293598A (ja) * | 1986-06-12 | 1987-12-21 | Toshiba Corp | 半導体記憶装置 |
JP2587973B2 (ja) * | 1987-07-13 | 1997-03-05 | 日本電信電話株式会社 | 冗長構成半導体メモリ |
JP2590897B2 (ja) * | 1987-07-20 | 1997-03-12 | 日本電気株式会社 | 半導体メモリ |
JPS6437797A (en) * | 1987-08-03 | 1989-02-08 | Oki Electric Ind Co Ltd | Eprom device |
JP2776835B2 (ja) * | 1988-07-08 | 1998-07-16 | 株式会社日立製作所 | 欠陥救済用の冗長回路を有する半導体メモリ |
JPH02113490A (ja) * | 1988-10-21 | 1990-04-25 | Hitachi Ltd | 半導体記憶装置 |
KR910005601B1 (ko) * | 1989-05-24 | 1991-07-31 | 삼성전자주식회사 | 리던던트 블럭을 가지는 반도체 메모리장치 |
US5058070A (en) * | 1990-02-12 | 1991-10-15 | Motorola, Inc. | High speed memory with row redundancy |
US5126973A (en) * | 1990-02-14 | 1992-06-30 | Texas Instruments Incorporated | Redundancy scheme for eliminating defects in a memory device |
US5270976A (en) * | 1990-06-19 | 1993-12-14 | Texas Instruments Incorporated | Laser link decoder for DRAM redundancy scheme |
JP3019869B2 (ja) * | 1990-10-16 | 2000-03-13 | 富士通株式会社 | 半導体メモリ |
JP2629463B2 (ja) * | 1991-01-25 | 1997-07-09 | 日本電気株式会社 | 半導体記憶回路 |
US5255227A (en) * | 1991-02-06 | 1993-10-19 | Hewlett-Packard Company | Switched row/column memory redundancy |
JP2730375B2 (ja) * | 1992-01-31 | 1998-03-25 | 日本電気株式会社 | 半導体メモリ |
US5295101A (en) * | 1992-01-31 | 1994-03-15 | Texas Instruments Incorporated | Array block level redundancy with steering logic |
US5257229A (en) * | 1992-01-31 | 1993-10-26 | Sgs-Thomson Microelectronics, Inc. | Column redundancy architecture for a read/write memory |
-
1993
- 1993-01-26 JP JP05010916A patent/JP3040625B2/ja not_active Expired - Lifetime
- 1993-02-04 US US08/013,382 patent/US5475648A/en not_active Expired - Lifetime
- 1993-02-05 DE DE69328639T patent/DE69328639T2/de not_active Expired - Lifetime
- 1993-02-05 EP EP93101850A patent/EP0554901B1/de not_active Expired - Lifetime
- 1993-02-06 KR KR1019930001613A patent/KR960004741B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0554901B1 (de) | 2000-05-17 |
DE69328639D1 (de) | 2000-06-21 |
KR960004741B1 (ko) | 1996-04-12 |
US5475648A (en) | 1995-12-12 |
JPH05282894A (ja) | 1993-10-29 |
EP0554901A2 (de) | 1993-08-11 |
JP3040625B2 (ja) | 2000-05-15 |
KR930018593A (ko) | 1993-09-22 |
EP0554901A3 (de) | 1998-02-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PANASONIC CORP., KADOMA, OSAKA, JP |
|
R071 | Expiry of right |
Ref document number: 554901 Country of ref document: EP |