DE69322487D1 - Verfahren zur herstellung einer nichtflüchtigen halbleiterspeicheranordnung - Google Patents

Verfahren zur herstellung einer nichtflüchtigen halbleiterspeicheranordnung

Info

Publication number
DE69322487D1
DE69322487D1 DE69322487T DE69322487T DE69322487D1 DE 69322487 D1 DE69322487 D1 DE 69322487D1 DE 69322487 T DE69322487 T DE 69322487T DE 69322487 T DE69322487 T DE 69322487T DE 69322487 D1 DE69322487 D1 DE 69322487D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor memory
volatile semiconductor
memory arrangement
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69322487T
Other languages
English (en)
Other versions
DE69322487T2 (de
Inventor
Yasuhiro Sakurai
Toshiyuki Kishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP04161637A external-priority patent/JP3132899B2/ja
Priority claimed from JP21964392A external-priority patent/JPH0653519A/ja
Priority claimed from JP09059693A external-priority patent/JP3311810B2/ja
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Application granted granted Critical
Publication of DE69322487D1 publication Critical patent/DE69322487D1/de
Publication of DE69322487T2 publication Critical patent/DE69322487T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
DE69322487T 1992-05-29 1993-05-28 Verfahren zur herstellung einer nichtflüchtigen halbleiterspeicheranordnung Expired - Fee Related DE69322487T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP04161637A JP3132899B2 (ja) 1992-05-29 1992-05-29 半導体装置の製造方法
JP21964392A JPH0653519A (ja) 1992-07-28 1992-07-28 半導体不揮発性メモリおよびその製造方法
JP09059693A JP3311810B2 (ja) 1993-03-26 1993-03-26 半導体不揮発性記憶装置の製造方法
PCT/JP1993/000722 WO1993024959A1 (en) 1992-05-29 1993-05-28 Semiconductor nonvolatile storage device, semiconductor device, and its manufacture method

Publications (2)

Publication Number Publication Date
DE69322487D1 true DE69322487D1 (de) 1999-01-21
DE69322487T2 DE69322487T2 (de) 1999-06-10

Family

ID=27306487

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69322487T Expired - Fee Related DE69322487T2 (de) 1992-05-29 1993-05-28 Verfahren zur herstellung einer nichtflüchtigen halbleiterspeicheranordnung

Country Status (4)

Country Link
US (1) US5496753A (de)
EP (1) EP0597124B1 (de)
DE (1) DE69322487T2 (de)
WO (1) WO1993024959A1 (de)

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DE69630864T2 (de) * 1996-01-31 2004-11-04 Sgs-Thomson Microelectronics S.R.L., Agrate Brianza Verfahren zur Herstellung nichtflüchtiger Speicheranordnungen mit Tunneloxid
DE19631146A1 (de) * 1996-08-01 1998-02-05 Siemens Ag Nichtflüchtige Speicherzelle
JP3093649B2 (ja) * 1996-09-05 2000-10-03 九州日本電気株式会社 不揮発性半導体メモリ装置
EP0833393B1 (de) * 1996-09-30 2011-12-14 STMicroelectronics Srl Nichtflüchtige Speicherzelle mit schwebendem Gate und mit niedriger Löschspannung und Verfahren zur Herstellung
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US5966603A (en) * 1997-06-11 1999-10-12 Saifun Semiconductors Ltd. NROM fabrication method with a periphery portion
US6297096B1 (en) * 1997-06-11 2001-10-02 Saifun Semiconductors Ltd. NROM fabrication method
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US6633499B1 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Method for reducing voltage drops in symmetric array architectures
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US6215148B1 (en) 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6348711B1 (en) 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
US6046086A (en) * 1998-06-19 2000-04-04 Taiwan Semiconductor Manufacturing Company Method to improve the capacity of data retention and increase the coupling ratio of source to floating gate in split-gate flash
US6166958A (en) * 1998-07-09 2000-12-26 Kabushiki Kaisha Toshiba Semiconductor memory device, method for manufacturing the same, and method for controlling the same
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US6207502B1 (en) * 1999-10-25 2001-03-27 Advanced Micro Devices, Inc. Method of using source/drain nitride for periphery field oxide and bit-line oxide
US6429063B1 (en) 1999-10-26 2002-08-06 Saifun Semiconductors Ltd. NROM cell with generally decoupled primary and secondary injection
TW452973B (en) * 2000-04-18 2001-09-01 Taiwan Semiconductor Mfg Method for manufacturing floating gate of split-gate flash memory
US6396741B1 (en) * 2000-05-04 2002-05-28 Saifun Semiconductors Ltd. Programming of nonvolatile memory cells
US6490204B2 (en) 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
US6928001B2 (en) 2000-12-07 2005-08-09 Saifun Semiconductors Ltd. Programming and erasing methods for a non-volatile memory cell
JP4078014B2 (ja) * 2000-05-26 2008-04-23 株式会社ルネサステクノロジ 不揮発性半導体記憶装置及びその製造方法
JP4346228B2 (ja) * 2000-09-21 2009-10-21 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
US6614692B2 (en) * 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
US6677805B2 (en) 2001-04-05 2004-01-13 Saifun Semiconductors Ltd. Charge pump stage with body effect minimization
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
US6636440B2 (en) 2001-04-25 2003-10-21 Saifun Semiconductors Ltd. Method for operation of an EEPROM array, including refresh thereof
KR100395755B1 (ko) 2001-06-28 2003-08-21 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조방법
US7098107B2 (en) * 2001-11-19 2006-08-29 Saifun Semiconductor Ltd. Protective layer in memory device and method therefor
US6583007B1 (en) 2001-12-20 2003-06-24 Saifun Semiconductors Ltd. Reducing secondary injection effects
US6700818B2 (en) * 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
DE10205079B4 (de) * 2002-02-07 2008-01-03 Infineon Technologies Ag Verfahren zur Herstellung einer Speicherzelle
US6917544B2 (en) * 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6826107B2 (en) * 2002-08-01 2004-11-30 Saifun Semiconductors Ltd. High voltage insertion in flash memory cards
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US7142464B2 (en) * 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
WO2005089165A2 (en) * 2004-03-10 2005-09-29 Nanosys, Inc. Nano-enabled memory devices and anisotropic charge carrying arrays
US7095655B2 (en) * 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
US20060068551A1 (en) * 2004-09-27 2006-03-30 Saifun Semiconductors, Ltd. Method for embedding NROM
US7638850B2 (en) * 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US20060146624A1 (en) * 2004-12-02 2006-07-06 Saifun Semiconductors, Ltd. Current folding sense amplifier
JP2006196758A (ja) * 2005-01-14 2006-07-27 Renesas Technology Corp 半導体装置
CN1838328A (zh) * 2005-01-19 2006-09-27 赛芬半导体有限公司 擦除存储器阵列上存储单元的方法
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US20070141788A1 (en) * 2005-05-25 2007-06-21 Ilan Bloom Method for embedding non-volatile memory with logic circuitry
US7786512B2 (en) 2005-07-18 2010-08-31 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US20070096199A1 (en) * 2005-09-08 2007-05-03 Eli Lusky Method of manufacturing symmetric arrays
US20070087503A1 (en) * 2005-10-17 2007-04-19 Saifun Semiconductors, Ltd. Improving NROM device characteristics using adjusted gate work function
US7352627B2 (en) * 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US20070173017A1 (en) * 2006-01-20 2007-07-26 Saifun Semiconductors, Ltd. Advanced non-volatile memory array and method of fabrication thereof
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US8253452B2 (en) * 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
KR100786707B1 (ko) * 2006-12-21 2007-12-18 삼성전자주식회사 불휘발성 메모리 장치 및 이의 제조 방법

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Also Published As

Publication number Publication date
EP0597124A1 (de) 1994-05-18
WO1993024959A1 (en) 1993-12-09
EP0597124B1 (de) 1998-12-09
US5496753A (en) 1996-03-05
DE69322487T2 (de) 1999-06-10
EP0597124A4 (de) 1995-02-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee