DE69229814T2 - Methode für die Trockenätzung - Google Patents
Methode für die TrockenätzungInfo
- Publication number
- DE69229814T2 DE69229814T2 DE69229814T DE69229814T DE69229814T2 DE 69229814 T2 DE69229814 T2 DE 69229814T2 DE 69229814 T DE69229814 T DE 69229814T DE 69229814 T DE69229814 T DE 69229814T DE 69229814 T2 DE69229814 T2 DE 69229814T2
- Authority
- DE
- Germany
- Prior art keywords
- dry etching
- etching method
- dry
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001312 dry etching Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12429791A JP3210359B2 (ja) | 1991-05-29 | 1991-05-29 | ドライエッチング方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69229814D1 DE69229814D1 (de) | 1999-09-23 |
DE69229814T2 true DE69229814T2 (de) | 2000-01-20 |
Family
ID=14881849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69229814T Expired - Lifetime DE69229814T2 (de) | 1991-05-29 | 1992-05-26 | Methode für die Trockenätzung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5259923A (de) |
EP (1) | EP0516043B1 (de) |
JP (1) | JP3210359B2 (de) |
KR (1) | KR0170412B1 (de) |
DE (1) | DE69229814T2 (de) |
TW (1) | TW282561B (de) |
Families Citing this family (67)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06151382A (ja) * | 1992-11-11 | 1994-05-31 | Toshiba Corp | ドライエッチング方法 |
JP3181741B2 (ja) * | 1993-01-11 | 2001-07-03 | 富士通株式会社 | 半導体装置の製造方法 |
US5421957A (en) * | 1993-07-30 | 1995-06-06 | Applied Materials, Inc. | Low temperature etching in cold-wall CVD systems |
US5759922A (en) * | 1993-08-25 | 1998-06-02 | Micron Technology, Inc. | Control of etch profiles during extended overetch |
US5354417A (en) * | 1993-10-13 | 1994-10-11 | Applied Materials, Inc. | Etching MoSi2 using SF6, HBr and O2 |
JP3172758B2 (ja) * | 1993-11-20 | 2001-06-04 | 東京エレクトロン株式会社 | プラズマエッチング方法 |
JPH07221076A (ja) * | 1994-02-07 | 1995-08-18 | Nec Corp | エッチング方法及びこれに用いられる装置 |
JPH07331460A (ja) * | 1994-06-02 | 1995-12-19 | Nippon Telegr & Teleph Corp <Ntt> | ドライエッチング方法 |
JP2792459B2 (ja) * | 1995-03-31 | 1998-09-03 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3028927B2 (ja) * | 1996-02-16 | 2000-04-04 | 日本電気株式会社 | 高融点金属膜のドライエッチング方法 |
US5698113A (en) * | 1996-02-22 | 1997-12-16 | The Regents Of The University Of California | Recovery of Mo/Si multilayer coated optical substrates |
US5854137A (en) * | 1996-04-29 | 1998-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reduction of polycide residues |
US5874363A (en) * | 1996-05-13 | 1999-02-23 | Kabushiki Kaisha Toshiba | Polycide etching with HCL and chlorine |
US5910452A (en) * | 1996-05-13 | 1999-06-08 | Winbond Electronics Corporation | Method for reducing antenna effect during plasma etching procedure for semiconductor device fabrication |
TW409152B (en) | 1996-06-13 | 2000-10-21 | Samsung Electronic | Etching gas composition for ferroelectric capacitor electrode film and method for etching a transition metal thin film |
KR100259609B1 (ko) * | 1996-06-13 | 2000-08-01 | 우성일 | 전이금속 박막의 식각방법 |
US5880033A (en) * | 1996-06-17 | 1999-03-09 | Applied Materials, Inc. | Method for etching metal silicide with high selectivity to polysilicon |
US6008139A (en) * | 1996-06-17 | 1999-12-28 | Applied Materials Inc. | Method of etching polycide structures |
JP2904167B2 (ja) * | 1996-12-18 | 1999-06-14 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH10223608A (ja) * | 1997-02-04 | 1998-08-21 | Sony Corp | 半導体装置の製造方法 |
US5866483A (en) * | 1997-04-04 | 1999-02-02 | Applied Materials, Inc. | Method for anisotropically etching tungsten using SF6, CHF3, and N2 |
US6322714B1 (en) | 1997-11-12 | 2001-11-27 | Applied Materials Inc. | Process for etching silicon-containing material on substrates |
US6797188B1 (en) | 1997-11-12 | 2004-09-28 | Meihua Shen | Self-cleaning process for etching silicon-containing material |
US6136211A (en) * | 1997-11-12 | 2000-10-24 | Applied Materials, Inc. | Self-cleaning etch process |
US6872322B1 (en) | 1997-11-12 | 2005-03-29 | Applied Materials, Inc. | Multiple stage process for cleaning process chambers |
KR100259352B1 (ko) * | 1998-01-09 | 2000-08-01 | 김영환 | 반도체 소자의 다층막 건식각 방법 |
JP4013308B2 (ja) * | 1998-01-21 | 2007-11-28 | ヤマハ株式会社 | 配線形成方法 |
JP3171161B2 (ja) * | 1998-03-20 | 2001-05-28 | 日本電気株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
US6067999A (en) * | 1998-04-23 | 2000-05-30 | International Business Machines Corporation | Method for deposition tool cleaning |
JP2000252259A (ja) * | 1999-02-25 | 2000-09-14 | Sony Corp | ドライエッチング方法及び半導体装置の製造方法 |
US6660643B1 (en) * | 1999-03-03 | 2003-12-09 | Rwe Schott Solar, Inc. | Etching of semiconductor wafer edges |
TW501199B (en) | 1999-03-05 | 2002-09-01 | Applied Materials Inc | Method for enhancing etching of TiSix |
JP2000353804A (ja) * | 1999-06-11 | 2000-12-19 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6306312B1 (en) * | 1999-06-30 | 2001-10-23 | Lam Research Corporation | Method for etching a gold metal layer using a titanium hardmask |
US6613682B1 (en) * | 1999-10-21 | 2003-09-02 | Applied Materials Inc. | Method for in situ removal of a dielectric antireflective coating during a gate etch process |
JP2001237218A (ja) | 2000-02-21 | 2001-08-31 | Nec Corp | 半導体装置の製造方法 |
US6527968B1 (en) | 2000-03-27 | 2003-03-04 | Applied Materials Inc. | Two-stage self-cleaning silicon etch process |
US6544887B1 (en) | 2000-03-31 | 2003-04-08 | Lam Research Corporation | Polycide etch process |
US6350699B1 (en) * | 2000-05-30 | 2002-02-26 | Sharp Laboratories Of America, Inc. | Method for anisotropic plasma etching using non-chlorofluorocarbon, fluorine-based chemistry |
US6225202B1 (en) * | 2000-06-21 | 2001-05-01 | Chartered Semiconductor Manufacturing, Ltd. | Selective etching of unreacted nickel after salicidation |
US6423644B1 (en) | 2000-07-12 | 2002-07-23 | Applied Materials, Inc. | Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures |
US6440870B1 (en) | 2000-07-12 | 2002-08-27 | Applied Materials, Inc. | Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures |
US6461974B1 (en) | 2000-10-06 | 2002-10-08 | Lam Research Corporation | High temperature tungsten etching process |
US6905800B1 (en) | 2000-11-21 | 2005-06-14 | Stephen Yuen | Etching a substrate in a process zone |
US6852242B2 (en) | 2001-02-23 | 2005-02-08 | Zhi-Wen Sun | Cleaning of multicompositional etchant residues |
WO2002086957A1 (fr) * | 2001-04-19 | 2002-10-31 | Tokyo Electron Limited | Procede de gravure a sec |
WO2003019590A1 (en) * | 2001-08-21 | 2003-03-06 | Seagate Technology Llc | Enhanced ion beam etch selectivity of magnetic thin films using carbon-based gases |
US6479383B1 (en) | 2002-02-05 | 2002-11-12 | Chartered Semiconductor Manufacturing Ltd | Method for selective removal of unreacted metal after silicidation |
US20030235995A1 (en) * | 2002-06-21 | 2003-12-25 | Oluseyi Hakeem M. | Method of increasing selectivity to mask when etching tungsten or tungsten nitride |
US7098141B1 (en) * | 2003-03-03 | 2006-08-29 | Lam Research Corporation | Use of silicon containing gas for CD and profile feature enhancements of gate and shallow trench structures |
US7141505B2 (en) * | 2003-06-27 | 2006-11-28 | Lam Research Corporation | Method for bilayer resist plasma etch |
DE10358025A1 (de) * | 2003-12-11 | 2005-07-21 | Infineon Technologies Ag | Verfahren zum Ätzen von Wolfram mit einer kontrollierten Seitenwandpassivierung und mit hoher Selektivität zu Polysilizium |
US20050252529A1 (en) * | 2004-05-12 | 2005-11-17 | Ridgeway Robert G | Low temperature CVD chamber cleaning using dilute NF3 |
JP2007036018A (ja) * | 2005-07-28 | 2007-02-08 | Toshiba Corp | 半導体装置の製造方法 |
JP4593402B2 (ja) * | 2005-08-25 | 2010-12-08 | 株式会社日立ハイテクノロジーズ | エッチング方法およびエッチング装置 |
US7544621B2 (en) * | 2005-11-01 | 2009-06-09 | United Microelectronics Corp. | Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method |
JP2007266466A (ja) * | 2006-03-29 | 2007-10-11 | Tokyo Electron Ltd | プラズマエッチング方法、プラズマエッチング装置、コンピュータ記憶媒体及び処理レシピが記憶された記憶媒体 |
US7754610B2 (en) * | 2006-06-02 | 2010-07-13 | Applied Materials, Inc. | Process for etching tungsten silicide overlying polysilicon particularly in a flash memory |
EP2104948A2 (de) | 2007-02-20 | 2009-09-30 | Qualcomm Mems Technologies, Inc. | Ausrüstung und verfahren zur mems-ätzung |
US7985681B2 (en) * | 2007-06-22 | 2011-07-26 | Micron Technology, Inc. | Method for selectively forming symmetrical or asymmetrical features using a symmetrical photomask during fabrication of a semiconductor device and electronic systems including the semiconductor device |
JP2011501874A (ja) * | 2007-09-14 | 2011-01-13 | クォルコム・メムズ・テクノロジーズ・インコーポレーテッド | Mems製造において使用されるエッチングプロセス |
US8118946B2 (en) | 2007-11-30 | 2012-02-21 | Wesley George Lau | Cleaning process residues from substrate processing chamber components |
JP5932599B2 (ja) * | 2011-10-31 | 2016-06-08 | 株式会社日立ハイテクノロジーズ | プラズマエッチング方法 |
TWI497586B (zh) * | 2011-10-31 | 2015-08-21 | Hitachi High Tech Corp | Plasma etching method |
JP6725176B2 (ja) * | 2016-10-31 | 2020-07-15 | 株式会社日立ハイテク | プラズマエッチング方法 |
CN110571151B (zh) * | 2019-09-02 | 2021-10-26 | 武汉新芯集成电路制造有限公司 | 多晶硅层的制作方法、闪存及其制作方法 |
WO2022039849A1 (en) * | 2020-08-18 | 2022-02-24 | Applied Materials, Inc. | Methods for etching structures and smoothing sidewalls |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3216823A1 (de) * | 1982-05-05 | 1983-11-10 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von strukturen von aus metallsilizid und polysilizium bestehenden doppelschichten auf integrierte halbleiterschaltungen enthaltenden substraten durch reaktives ionenaetzen |
US4680086A (en) * | 1986-03-20 | 1987-07-14 | Motorola, Inc. | Dry etching of multi-layer structures |
US4713141A (en) * | 1986-09-22 | 1987-12-15 | Intel Corporation | Anisotropic plasma etching of tungsten |
DE3854561T2 (de) * | 1987-07-02 | 1996-05-02 | Toshiba Kawasaki Kk | Verfahren zum Trockenätzen. |
JPH0383335A (ja) * | 1989-08-28 | 1991-04-09 | Hitachi Ltd | エッチング方法 |
DE69126149T2 (de) * | 1990-01-22 | 1998-01-02 | Sony Corp | Trockenätzverfahren |
US5169487A (en) * | 1990-08-27 | 1992-12-08 | Micron Technology, Inc. | Anisotropic etch method |
US5094712A (en) * | 1990-10-09 | 1992-03-10 | Micron Technology, Inc. | One chamber in-situ etch process for oxide and conductive material |
-
1991
- 1991-05-29 JP JP12429791A patent/JP3210359B2/ja not_active Expired - Lifetime
-
1992
- 1992-05-26 DE DE69229814T patent/DE69229814T2/de not_active Expired - Lifetime
- 1992-05-26 EP EP92108844A patent/EP0516043B1/de not_active Expired - Lifetime
- 1992-05-28 US US07/889,627 patent/US5259923A/en not_active Expired - Lifetime
- 1992-05-29 KR KR1019920009345A patent/KR0170412B1/ko not_active IP Right Cessation
- 1992-06-29 TW TW081105118A patent/TW282561B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0170412B1 (ko) | 1999-03-30 |
US5259923A (en) | 1993-11-09 |
DE69229814D1 (de) | 1999-09-23 |
JP3210359B2 (ja) | 2001-09-17 |
EP0516043A3 (en) | 1993-10-06 |
JPH04350932A (ja) | 1992-12-04 |
KR920022416A (ko) | 1992-12-19 |
EP0516043B1 (de) | 1999-08-18 |
TW282561B (de) | 1996-08-01 |
EP0516043A2 (de) | 1992-12-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
R071 | Expiry of right |
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