DE69220399D1 - Verfahren zur Herstellung von einer Verbindung über einer Halbleitervorrichtung - Google Patents
Verfahren zur Herstellung von einer Verbindung über einer HalbleitervorrichtungInfo
- Publication number
- DE69220399D1 DE69220399D1 DE69220399T DE69220399T DE69220399D1 DE 69220399 D1 DE69220399 D1 DE 69220399D1 DE 69220399 T DE69220399 T DE 69220399T DE 69220399 T DE69220399 T DE 69220399T DE 69220399 D1 DE69220399 D1 DE 69220399D1
- Authority
- DE
- Germany
- Prior art keywords
- making
- semiconductor device
- connection over
- over
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemically Coating (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB919105943A GB9105943D0 (en) | 1991-03-20 | 1991-03-20 | A method of manufacturing a semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69220399D1 true DE69220399D1 (de) | 1997-07-24 |
DE69220399T2 DE69220399T2 (de) | 1998-01-02 |
Family
ID=10691918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69220399T Expired - Fee Related DE69220399T2 (de) | 1991-03-20 | 1992-03-11 | Verfahren zur Herstellung von einer Verbindung über einer Halbleitervorrichtung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5240879A (de) |
EP (1) | EP0504984B1 (de) |
JP (1) | JP2522879B2 (de) |
KR (1) | KR100237096B1 (de) |
DE (1) | DE69220399T2 (de) |
GB (1) | GB9105943D0 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3211290B2 (ja) * | 1991-10-21 | 2001-09-25 | ソニー株式会社 | 半導体装置の形成方法 |
US5474949A (en) * | 1992-01-27 | 1995-12-12 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating capacitor or contact for semiconductor device by forming uneven oxide film and reacting silicon with metal containing gas |
US5429987A (en) * | 1993-01-25 | 1995-07-04 | Sharp Microelectronics Technology, Inc. | Method for profile control of selective metallization |
US5462897A (en) * | 1993-02-01 | 1995-10-31 | International Business Machines Corporation | Method for forming a thin film layer |
JPH06260441A (ja) * | 1993-03-03 | 1994-09-16 | Nec Corp | 半導体装置の製造方法 |
US5529953A (en) * | 1994-10-14 | 1996-06-25 | Toshiba America Electronic Components, Inc. | Method of forming studs and interconnects in a multi-layered semiconductor device |
US5725739A (en) * | 1996-07-08 | 1998-03-10 | Micron Technology, Inc. | Low angle, low energy physical vapor deposition of alloys |
US5909637A (en) * | 1996-09-20 | 1999-06-01 | Sharp Microelectronics Technology, Inc. | Copper adhesion to a diffusion barrier surface and method for same |
US5913144A (en) * | 1996-09-20 | 1999-06-15 | Sharp Microelectronics Technology, Inc. | Oxidized diffusion barrier surface for the adherence of copper and method for same |
US6236101B1 (en) | 1997-11-05 | 2001-05-22 | Texas Instruments Incorporated | Metallization outside protective overcoat for improved capacitors and inductors |
US6863593B1 (en) * | 1998-11-02 | 2005-03-08 | Applied Materials, Inc. | Chemical mechanical polishing a substrate having a filler layer and a stop layer |
US6435942B1 (en) * | 1999-02-11 | 2002-08-20 | Applied Materials, Inc. | Chemical mechanical polishing processes and components |
US6399479B1 (en) * | 1999-08-30 | 2002-06-04 | Applied Materials, Inc. | Processes to improve electroplating fill |
US6368953B1 (en) * | 2000-05-09 | 2002-04-09 | International Business Machines Corporation | Encapsulated metal structures for semiconductor devices and MIM capacitors including the same |
US6368484B1 (en) | 2000-05-09 | 2002-04-09 | International Business Machines Corporation | Selective plating process |
WO2003058125A1 (en) | 2001-12-28 | 2003-07-17 | Sharp Kabushiki Kaisha | Heating cooking device |
CN1278409C (zh) * | 2002-06-10 | 2006-10-04 | 株式会社东芝 | 半导体器件的制造方法和半导体器件 |
CN101489987A (zh) * | 2006-04-17 | 2009-07-22 | 特瓦制药工业有限公司 | 四环素衍生物的分离 |
ES2528202T3 (es) * | 2006-04-24 | 2015-02-05 | Teva Pharmaceutical Industries Ltd. | Una forma cristalina de tigeciclina y procesos para su preparación |
KR102001511B1 (ko) * | 2012-12-26 | 2019-07-19 | 에스케이하이닉스 주식회사 | 에어갭을 구비한 반도체장치 및 그 제조 방법 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5360567A (en) * | 1976-11-11 | 1978-05-31 | Mitsubishi Electric Corp | Electrode formation method of semiconductor device |
NL8202009A (nl) * | 1982-05-14 | 1983-12-01 | Philips Nv | Werkwijze voor de vervaardiging van fijn-gestructureerde metaalpatronen op metaal- of halfgeleider oppervlak. |
US4465716A (en) * | 1982-06-02 | 1984-08-14 | Texas Instruments Incorporated | Selective deposition of composite materials |
DE3232837A1 (de) * | 1982-09-03 | 1984-03-08 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen einer 2-ebenen-metallisierung fuer halbleiterbauelemente, insbesondere fuer leistungshalbleiterbauelemente wie thyristoren |
JPS59150421A (ja) * | 1983-02-10 | 1984-08-28 | Toshiba Corp | 半導体装置の製造方法 |
GB2143372B (en) * | 1983-07-12 | 1987-07-01 | Control Data Corp | Applying barrier metal to a semiconductor |
GB2168841B (en) * | 1984-12-22 | 1988-07-20 | Stc Plc | Semiconductor processing |
US4944836A (en) * | 1985-10-28 | 1990-07-31 | International Business Machines Corporation | Chem-mech polishing method for producing coplanar metal/insulator films on a substrate |
US5055423A (en) * | 1987-12-28 | 1991-10-08 | Texas Instruments Incorporated | Planarized selective tungsten metallization system |
US4822753A (en) * | 1988-05-09 | 1989-04-18 | Motorola, Inc. | Method for making a w/tin contact |
US4983543A (en) * | 1988-09-07 | 1991-01-08 | Fujitsu Limited | Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit |
EP0366013A3 (de) * | 1988-10-27 | 1990-06-27 | Texas Instruments Incorporated | Selektive Dielektrikumsablagerung auf Horizontalstrukturen eines IC-Bauelementes |
JPH02185205A (ja) * | 1989-01-12 | 1990-07-19 | Agency Of Ind Science & Technol | 加飾した貴金属製品の製造法 |
US4992135A (en) * | 1990-07-24 | 1991-02-12 | Micron Technology, Inc. | Method of etching back of tungsten layers on semiconductor wafers, and solution therefore |
-
1991
- 1991-03-20 GB GB919105943A patent/GB9105943D0/en active Pending
-
1992
- 1992-03-10 US US07/848,806 patent/US5240879A/en not_active Expired - Fee Related
- 1992-03-11 DE DE69220399T patent/DE69220399T2/de not_active Expired - Fee Related
- 1992-03-11 EP EP92200697A patent/EP0504984B1/de not_active Expired - Lifetime
- 1992-03-17 KR KR1019920004317A patent/KR100237096B1/ko not_active IP Right Cessation
- 1992-03-18 JP JP4062416A patent/JP2522879B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2522879B2 (ja) | 1996-08-07 |
US5240879A (en) | 1993-08-31 |
EP0504984B1 (de) | 1997-06-18 |
JPH0590204A (ja) | 1993-04-09 |
EP0504984A3 (en) | 1992-10-28 |
EP0504984A2 (de) | 1992-09-23 |
GB9105943D0 (en) | 1991-05-08 |
KR100237096B1 (ko) | 2000-01-15 |
DE69220399T2 (de) | 1998-01-02 |
KR920018848A (ko) | 1992-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |