DE69110944T2 - Halbleiterspeicher. - Google Patents

Halbleiterspeicher.

Info

Publication number
DE69110944T2
DE69110944T2 DE69110944T DE69110944T DE69110944T2 DE 69110944 T2 DE69110944 T2 DE 69110944T2 DE 69110944 T DE69110944 T DE 69110944T DE 69110944 T DE69110944 T DE 69110944T DE 69110944 T2 DE69110944 T2 DE 69110944T2
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69110944T
Other languages
English (en)
Other versions
DE69110944D1 (de
Inventor
Michinori Sugawara
Hiroyuki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69110944D1 publication Critical patent/DE69110944D1/de
Application granted granted Critical
Publication of DE69110944T2 publication Critical patent/DE69110944T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
DE69110944T 1990-03-30 1991-04-02 Halbleiterspeicher. Expired - Fee Related DE69110944T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2084022A JP2606403B2 (ja) 1990-03-30 1990-03-30 半導体メモリ

Publications (2)

Publication Number Publication Date
DE69110944D1 DE69110944D1 (de) 1995-08-10
DE69110944T2 true DE69110944T2 (de) 1996-03-21

Family

ID=13818943

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69110944T Expired - Fee Related DE69110944T2 (de) 1990-03-30 1991-04-02 Halbleiterspeicher.

Country Status (4)

Country Link
US (1) US5272668A (de)
EP (1) EP0451666B1 (de)
JP (1) JP2606403B2 (de)
DE (1) DE69110944T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5360988A (en) * 1991-06-27 1994-11-01 Hitachi, Ltd. Semiconductor integrated circuit device and methods for production thereof
KR950006336B1 (ko) * 1992-08-08 1995-06-14 삼성전자주식회사 반도체 메모리장치의 전류센싱회로
US5991192A (en) * 1997-12-08 1999-11-23 National Science Council Of Republic Of China Current-mode write-circuit of a static ram

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613390A (ja) * 1984-06-15 1986-01-09 Hitachi Ltd 記憶装置
JPS61117787A (ja) * 1984-11-13 1986-06-05 Hitachi Ltd 半導体メモリ回路
JPS6299983A (ja) * 1985-10-25 1987-05-09 Hitachi Ltd 半導体記憶装置
US4825413A (en) * 1987-02-24 1989-04-25 Texas Instruments Incorporated Bipolar-CMOS static ram memory device
JP2531671B2 (ja) * 1987-03-31 1996-09-04 株式会社東芝 半導体記憶装置
JPS6455589A (en) * 1987-08-26 1989-03-02 Seiko Instr & Electronics Gray scale display device
US4910711A (en) * 1989-05-03 1990-03-20 Advanced Micro Devices, Inc. Bicmos read/write control and sensing circuit

Also Published As

Publication number Publication date
EP0451666A3 (en) 1992-12-23
EP0451666B1 (de) 1995-07-05
DE69110944D1 (de) 1995-08-10
EP0451666A2 (de) 1991-10-16
US5272668A (en) 1993-12-21
JPH03283191A (ja) 1991-12-13
JP2606403B2 (ja) 1997-05-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee