DE68921790T2 - Halbleiterplättchen und Verfahren zu dessen Verteilung. - Google Patents

Halbleiterplättchen und Verfahren zu dessen Verteilung.

Info

Publication number
DE68921790T2
DE68921790T2 DE68921790T DE68921790T DE68921790T2 DE 68921790 T2 DE68921790 T2 DE 68921790T2 DE 68921790 T DE68921790 T DE 68921790T DE 68921790 T DE68921790 T DE 68921790T DE 68921790 T2 DE68921790 T2 DE 68921790T2
Authority
DE
Germany
Prior art keywords
distribution
semiconductor wafers
wafers
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68921790T
Other languages
English (en)
Other versions
DE68921790D1 (de
Inventor
Edward Richard Vokoun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Application granted granted Critical
Publication of DE68921790D1 publication Critical patent/DE68921790D1/de
Publication of DE68921790T2 publication Critical patent/DE68921790T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
DE68921790T 1988-05-23 1989-05-17 Halbleiterplättchen und Verfahren zu dessen Verteilung. Expired - Fee Related DE68921790T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/197,544 US5003374A (en) 1988-05-23 1988-05-23 Semiconductor wafer

Publications (2)

Publication Number Publication Date
DE68921790D1 DE68921790D1 (de) 1995-04-27
DE68921790T2 true DE68921790T2 (de) 1995-11-02

Family

ID=22729839

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68921790T Expired - Fee Related DE68921790T2 (de) 1988-05-23 1989-05-17 Halbleiterplättchen und Verfahren zu dessen Verteilung.

Country Status (5)

Country Link
US (1) US5003374A (de)
EP (1) EP0343720B1 (de)
JP (1) JPH0296351A (de)
KR (1) KR890017804A (de)
DE (1) DE68921790T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5285082A (en) * 1989-11-08 1994-02-08 U.S. Philips Corporation Integrated test circuits having pads provided along scribe lines
US5239191A (en) * 1990-01-19 1993-08-24 Kabushiki Kaisha Toshiba Semiconductor wafer
US5206181A (en) * 1991-06-03 1993-04-27 Motorola, Inc. Method for manufacturing a semiconductor device with a slotted metal test pad to prevent lift-off during wafer scribing
JPH0621188A (ja) * 1991-12-13 1994-01-28 Yamaha Corp 半導体ウェハ
JPH07302773A (ja) * 1994-05-06 1995-11-14 Texas Instr Japan Ltd 半導体ウエハ及び半導体装置
JP3230953B2 (ja) * 1994-07-28 2001-11-19 富士通株式会社 多層薄膜配線基板
US5580829A (en) * 1994-09-30 1996-12-03 Motorola, Inc. Method for minimizing unwanted metallization in periphery die on a multi-site wafer
US5702567A (en) * 1995-06-01 1997-12-30 Kabushiki Kaisha Toshiba Plurality of photolithographic alignment marks with shape, size and spacing based on circuit pattern features
JPH10177245A (ja) * 1996-12-18 1998-06-30 Fujitsu Ltd レチクル、半導体基板及び半導体チップ
US5923047A (en) * 1997-04-21 1999-07-13 Lsi Logic Corporation Semiconductor die having sacrificial bond pads for die test
JP2002515651A (ja) * 1998-05-13 2002-05-28 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体装置および半導体装置の製造方法
TWI228780B (en) * 2000-05-11 2005-03-01 Disco Corp Semiconductor wafer dividing method
US6504225B1 (en) * 2001-04-18 2003-01-07 Advanced Micro Devices, Inc. Teos seaming scribe line monitor
DE10218498B4 (de) * 2002-04-25 2007-02-22 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Halbleiterschicht und elektronisches Bauelement
US7259043B2 (en) * 2002-05-14 2007-08-21 Texas Instruments Incorporated Circular test pads on scribe street area
US7679195B2 (en) * 2006-06-20 2010-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. PAD structure and method of testing
US8011950B2 (en) * 2009-02-18 2011-09-06 Cinch Connectors, Inc. Electrical connector
WO2010135146A1 (en) * 2009-05-18 2010-11-25 Tamperproof Container Licensing Corp. Nuclear leakage detection system using wire or optical fiber
US8653971B2 (en) 2012-01-25 2014-02-18 3D Fuse Sarl Sensor tape for security detection and method of fabrication
US8971673B2 (en) 2012-01-25 2015-03-03 3D Fuse Sarl Sensor tape for security detection and method of fabrication
US20150262896A1 (en) * 2014-03-11 2015-09-17 Kabushiki Kaisha Toshiba Evaluation element and wafer
US9373234B1 (en) 2015-01-20 2016-06-21 3D Fuse Technology Inc. Security tape for intrusion/extrusion boundary detection
US9929115B2 (en) * 2016-02-05 2018-03-27 Taiwan Semiconductor Manufacturing Company Ltd. Device with optimized thermal characteristics
US10242912B2 (en) * 2016-07-08 2019-03-26 Analog Devices, Inc. Integrated device dies and methods for singulating the same
KR102633112B1 (ko) 2016-08-05 2024-02-06 삼성전자주식회사 반도체 소자
CN108206169B (zh) * 2016-12-20 2020-06-02 晟碟半导体（上海）有限公司 包含在裸芯边缘处的裸芯接合垫的半导体装置
US10483239B2 (en) 2016-12-20 2019-11-19 Sandisk Semiconductor (Shanghai) Co. Ltd. Semiconductor device including dual pad wire bond interconnection
KR20180076841A (ko) 2016-12-28 2018-07-06 삼성전자주식회사 소잉 라인 상에 비아 홀이 내재된 패드가 배치되는 스크라이브 레인 구조

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50150259U (de) * 1974-05-30 1975-12-13
JPS5431988A (en) * 1977-08-17 1979-03-09 Ikeda Bussan Co Device for pressing waist of backrest
JPS54118997A (en) * 1978-03-09 1979-09-14 Toshiba Corp Fuel rod
JPS5643740U (de) * 1979-09-14 1981-04-21
JPS5643741A (en) * 1979-09-17 1981-04-22 Nec Corp Semiconductor wafer
JPS5643740A (en) * 1979-09-17 1981-04-22 Nec Corp Semiconductor wafer
JPS5662334A (en) * 1979-10-26 1981-05-28 Nec Corp Production of semiconductor
JPS58135654A (ja) * 1982-02-08 1983-08-12 Hitachi Ltd 半導体装置の製造方法
JPS6063921A (ja) * 1983-09-17 1985-04-12 Toshiba Corp 半導体素子の製造方法
US4835592A (en) * 1986-03-05 1989-05-30 Ixys Corporation Semiconductor wafer with dice having briding metal structure and method of manufacturing same
JPS6387743A (ja) * 1986-09-30 1988-04-19 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US5003374A (en) 1991-03-26
EP0343720A2 (de) 1989-11-29
EP0343720B1 (de) 1995-03-22
EP0343720A3 (en) 1990-02-28
KR890017804A (ko) 1989-12-18
JPH0557737B2 (de) 1993-08-24
JPH0296351A (ja) 1990-04-09
DE68921790D1 (de) 1995-04-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee