DE60137556D1 - Bitleitung-Leseschaltung und Verfahren für dynamische Halbleiterspeicherzellen mit wahlfreiem Zugriff - Google Patents

Bitleitung-Leseschaltung und Verfahren für dynamische Halbleiterspeicherzellen mit wahlfreiem Zugriff

Info

Publication number
DE60137556D1
DE60137556D1 DE60137556T DE60137556T DE60137556D1 DE 60137556 D1 DE60137556 D1 DE 60137556D1 DE 60137556 T DE60137556 T DE 60137556T DE 60137556 T DE60137556 T DE 60137556T DE 60137556 D1 DE60137556 D1 DE 60137556D1
Authority
DE
Germany
Prior art keywords
random access
memory cells
access memory
dynamic random
read circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60137556T
Other languages
English (en)
Inventor
Duane Giles Laurent
Elmer Henry Guritz
James Leon Worley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE60137556D1 publication Critical patent/DE60137556D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
DE60137556T 2000-03-07 2001-02-22 Bitleitung-Leseschaltung und Verfahren für dynamische Halbleiterspeicherzellen mit wahlfreiem Zugriff Expired - Fee Related DE60137556D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/519,714 US6240026B1 (en) 2000-03-07 2000-03-07 Bit line sense circuit and method for dynamic random access memories

Publications (1)

Publication Number Publication Date
DE60137556D1 true DE60137556D1 (de) 2009-03-19

Family

ID=24069458

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60137556T Expired - Fee Related DE60137556D1 (de) 2000-03-07 2001-02-22 Bitleitung-Leseschaltung und Verfahren für dynamische Halbleiterspeicherzellen mit wahlfreiem Zugriff

Country Status (4)

Country Link
US (1) US6240026B1 (de)
EP (1) EP1132923B1 (de)
JP (1) JP4926328B2 (de)
DE (1) DE60137556D1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5991296A (en) * 1996-02-22 1999-11-23 Fujitsu, Ltd. Crossbar switch and method with reduced voltage swing and no internal blocking data path
US6678199B1 (en) * 2002-06-19 2004-01-13 Micron Technology, Inc. Memory device with sense amp equilibration circuit
US7467326B2 (en) * 2003-02-28 2008-12-16 Maxwell Technologies, Inc. Self-correcting computer

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3587309T2 (de) * 1985-01-22 1993-10-21 Texas Instruments Inc Mehrfachvideospeichersystem mit Bildelementkartierung.
JPH01162296A (ja) * 1987-12-19 1989-06-26 Sony Corp Dram
JPH0329184A (ja) * 1989-06-25 1991-02-07 Sony Corp 半導体メモリ
JPH04212774A (ja) * 1990-07-02 1992-08-04 Mitsubishi Electric Corp 半導体記憶装置
JPH04298895A (ja) * 1991-03-26 1992-10-22 Nec Ic Microcomput Syst Ltd 半導体記憶回路
JP2838344B2 (ja) * 1992-10-28 1998-12-16 三菱電機株式会社 半導体装置
JPH06176568A (ja) * 1992-12-07 1994-06-24 Fujitsu Ltd 半導体記憶装置
JPH06349280A (ja) * 1993-06-11 1994-12-22 Matsushita Electric Ind Co Ltd 半導体記憶装置
JPH10228773A (ja) * 1997-02-14 1998-08-25 Hitachi Ltd ダイナミック型ram
US5914908A (en) * 1997-03-14 1999-06-22 Hyundai Electronics America Method of operating a boosted wordline
US5909619A (en) * 1998-02-04 1999-06-01 Vanguard International Semiconductor Corporation Method for forming a DRAM cell and array to store two-bit data
TW387086B (en) * 1998-05-18 2000-04-11 Winbond Electronics Corp Pulsed word-line control circuit for memory device and its controlling method
US6009023A (en) * 1998-05-26 1999-12-28 Etron Technology, Inc. High performance DRAM structure employing multiple thickness gate oxide
US6031768A (en) * 1998-12-18 2000-02-29 Stmicroelectronics, Inc. Self boosted wordline

Also Published As

Publication number Publication date
EP1132923B1 (de) 2009-01-28
US6240026B1 (en) 2001-05-29
JP4926328B2 (ja) 2012-05-09
JP2001250383A (ja) 2001-09-14
EP1132923A1 (de) 2001-09-12

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee