DE60126675D1 - Verbessertes rückschleiftesten von seriellen vorrichtungen - Google Patents

Verbessertes rückschleiftesten von seriellen vorrichtungen

Info

Publication number
DE60126675D1
DE60126675D1 DE60126675T DE60126675T DE60126675D1 DE 60126675 D1 DE60126675 D1 DE 60126675D1 DE 60126675 T DE60126675 T DE 60126675T DE 60126675 T DE60126675 T DE 60126675T DE 60126675 D1 DE60126675 D1 DE 60126675D1
Authority
DE
Germany
Prior art keywords
device under
under test
receiver
transmitter
bit stream
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60126675T
Other languages
English (en)
Other versions
DE60126675T2 (de
Inventor
C Panis
B Robbins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradyne Inc
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Application granted granted Critical
Publication of DE60126675D1 publication Critical patent/DE60126675D1/de
Publication of DE60126675T2 publication Critical patent/DE60126675T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31712Input or output aspects
    • G01R31/31716Testing of input or output with loop-back
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage
    • G01R31/3004Current or voltage test
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/24Testing correct operation
    • H04L1/242Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/243Testing correct operation by comparing a transmitted test signal with a locally generated replica at the transmitter, using a loop-back
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage
    • G01R31/3016Delay or race condition test, e.g. race hazard test
DE60126675T 2000-12-29 2001-12-03 Verbessertes rückschleiftesten von seriellen vorrichtungen Expired - Lifetime DE60126675T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US751633 2000-12-29
US09/751,633 US7017087B2 (en) 2000-12-29 2000-12-29 Enhanced loopback testing of serial devices
PCT/US2001/046391 WO2002054240A2 (en) 2000-12-29 2001-12-03 Enhanced loopback testing of serial devices

Publications (2)

Publication Number Publication Date
DE60126675D1 true DE60126675D1 (de) 2007-03-29
DE60126675T2 DE60126675T2 (de) 2007-11-15

Family

ID=25022835

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60126675T Expired - Lifetime DE60126675T2 (de) 2000-12-29 2001-12-03 Verbessertes rückschleiftesten von seriellen vorrichtungen

Country Status (11)

Country Link
US (2) US7017087B2 (de)
EP (1) EP1366417B1 (de)
JP (1) JP4323804B2 (de)
KR (2) KR20080098454A (de)
CN (1) CN1279445C (de)
AT (1) ATE354127T1 (de)
AU (1) AU2002239509A1 (de)
DE (1) DE60126675T2 (de)
MY (1) MY141683A (de)
TW (1) TW552427B (de)
WO (1) WO2002054240A2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60306008T2 (de) * 2002-04-12 2007-01-11 Broadcom Corp., Irvine Einrichtungen und Verfahren für die Hochgeschwindigkeitsprüfung von Schaltungen mit hoher Pinzahl und mehreren Gigabit
US7363557B2 (en) * 2002-04-12 2008-04-22 Broadcom Corporation System for at-speed automated testing of high serial pin count multiple gigabit per second devices
US7502326B2 (en) * 2002-04-12 2009-03-10 Broadcom Corporation Methods used to simultaneously perform automated at-speed testing of multiple gigabit per second high serial pin count devices
US7278079B2 (en) * 2002-04-12 2007-10-02 Broadcom Corporation Test head utilized in a test system to perform automated at-speed testing of multiple gigabit per second high serial pin count devices
US6894505B2 (en) * 2002-08-01 2005-05-17 Teradyne, Inc. Flexible interface for universal bus test instrument
US6965221B2 (en) * 2002-11-12 2005-11-15 O2Micro International Limited Controller for DC to DC converter
EP1464970A1 (de) 2003-04-04 2004-10-06 Agilent Technologies Inc Rückspeisungstest mit Verzögerungsgliedern
JP2005091108A (ja) * 2003-09-16 2005-04-07 Advantest Corp ジッタ発生器及び試験装置
US20050259589A1 (en) * 2004-05-24 2005-11-24 Metrobility Optical Systems Inc. Logical services loopback
DE102004050402A1 (de) * 2004-10-15 2006-04-27 Marconi Communications Gmbh Verfahren und Vorrichtung zum Erkennen eines Störeffekts in einem Nachrichtenkanal
US7392438B2 (en) * 2004-11-24 2008-06-24 Fsp Technology Inc. Automatic safety test system
US7271610B2 (en) * 2004-12-17 2007-09-18 Teradyne, Inc. Using a parametric measurement unit to sense a voltage at a device under test
US7403030B2 (en) * 2004-12-17 2008-07-22 Teradyne, Inc. Using parametric measurement units as a source of power for a device under test
CN100412813C (zh) * 2005-09-28 2008-08-20 鸿富锦精密工业(深圳)有限公司 电子组件接收信号灵敏度的测量装置与测量方法
US7477875B2 (en) * 2005-07-26 2009-01-13 Texas Instruments Incorporated Built in loop back self test in design or on test board for transceivers
KR100780941B1 (ko) * 2005-08-24 2007-12-03 삼성전자주식회사 잡음주입이 가능한 고속 테스트데이터 발생기 및 이를사용하는 자동 테스트 시스템
CN1963778A (zh) * 2005-11-11 2007-05-16 鸿富锦精密工业(深圳)有限公司 主板串口测试系统及方法
JP4726679B2 (ja) 2006-03-31 2011-07-20 ルネサスエレクトロニクス株式会社 半導体試験方法および半導体装置
US7650540B2 (en) * 2006-07-21 2010-01-19 Intel Corporation Detecting and differentiating SATA loopback modes
JP4720696B2 (ja) * 2006-09-19 2011-07-13 横河電機株式会社 信号測定装置
WO2008053526A1 (fr) * 2006-10-31 2008-05-08 Fujitsu Limited Appareil et procédé permettant de tester une connexion de carte imprimée
US8803806B2 (en) * 2007-01-23 2014-08-12 Dell Products L.P. Notebook computer having an off-motherboard keyboard controller
US8090009B2 (en) * 2007-08-07 2012-01-03 Advantest Corporation Test apparatus
US7801205B2 (en) * 2007-08-07 2010-09-21 Advantest Corporation Jitter injection circuit, electronics device, and test apparatus
WO2009022313A2 (en) 2007-08-16 2009-02-19 Nxp B.V. Integrated circuit with rf module, electronic device having such an ic and method for testing such a module
CN101373205B (zh) * 2007-08-21 2011-03-16 上海摩波彼克半导体有限公司 集成电路芯片接口模块的回环测试结构
US7786718B2 (en) * 2007-12-31 2010-08-31 Teradyne, Inc. Time measurement of periodic signals
US9059632B2 (en) * 2008-03-24 2015-06-16 O2Micro, Inc. Controllers for DC to DC converters
JP5269896B2 (ja) * 2008-06-02 2013-08-21 株式会社アドバンテスト 試験用ウエハユニット、および、試験システム
US8026726B2 (en) * 2009-01-23 2011-09-27 Silicon Image, Inc. Fault testing for interconnections
US8274296B2 (en) * 2009-11-11 2012-09-25 Advantest Corporation Test apparatus and electronic device that tests a device under test
US8598898B2 (en) 2010-10-05 2013-12-03 Silicon Image, Inc. Testing of high-speed input-output devices
US8581600B2 (en) * 2010-12-14 2013-11-12 Hewlett-Packard Development Company, L.P. Electrical connectivity test apparatus and methods
US20120194206A1 (en) * 2011-01-28 2012-08-02 Advantest Corporation Measuring Apparatus
US8896086B1 (en) * 2013-05-30 2014-11-25 Freescale Semiconductor, Inc. System for preventing tampering with integrated circuit
CN103345438B (zh) * 2013-05-31 2015-02-18 中国兵器工业第二○三研究所 串行接口故障检测装置及方法
EP3386107B1 (de) 2017-04-03 2021-07-07 Nxp B.V. Datenverarbeitungsschaltungen
KR102264159B1 (ko) * 2017-06-08 2021-06-11 삼성전자주식회사 외부 루프백 테스트를 수행하는 직렬 통신 인터페이스 회로 및 이를 포함하는 전자 장치
US10896106B2 (en) 2018-05-10 2021-01-19 Teradyne, Inc. Bus synchronization system that aggregates status
US11201811B2 (en) 2019-03-18 2021-12-14 International Business Machines Corporation Multiport network adapter loopback hardware
CN114070765B (zh) * 2021-11-02 2023-05-23 广东利扬芯片测试股份有限公司 通信接口测试电路及方法
TWI827272B (zh) * 2022-09-23 2023-12-21 英業達股份有限公司 交錯差分訊號迴路系統及其方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5875293A (en) * 1995-08-08 1999-02-23 Dell Usa, L.P. System level functional testing through one or more I/O ports of an assembled computer system
US5790563A (en) * 1996-02-05 1998-08-04 Lsi Logic Corp. Self test of core with unpredictable latency
JP3209734B2 (ja) 1998-09-29 2001-09-17 松下電器産業株式会社 半導体集積回路及びその検査方法
KR100285508B1 (ko) * 1999-03-25 2001-03-15 이계철 통신장치의 신호 테스트 장치 및 그 방법

Also Published As

Publication number Publication date
KR20080098454A (ko) 2008-11-07
WO2002054240A3 (en) 2003-10-02
US20060123304A1 (en) 2006-06-08
JP4323804B2 (ja) 2009-09-02
ATE354127T1 (de) 2007-03-15
CN1500246A (zh) 2004-05-26
US7337377B2 (en) 2008-02-26
KR20030068201A (ko) 2003-08-19
US20020087924A1 (en) 2002-07-04
AU2002239509A1 (en) 2002-07-16
EP1366417B1 (de) 2007-02-14
TW552427B (en) 2003-09-11
DE60126675T2 (de) 2007-11-15
EP1366417A2 (de) 2003-12-03
KR100881066B1 (ko) 2009-01-30
US7017087B2 (en) 2006-03-21
CN1279445C (zh) 2006-10-11
MY141683A (en) 2010-06-15
WO2002054240A2 (en) 2002-07-11
JP2004525546A (ja) 2004-08-19

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Legal Events

Date Code Title Description
8381 Inventor (new situation)

Inventor name: PANIS, MICHAEL C., BROOKLINE, MA, US

Inventor name: ROBBINS, BRADFORD B., WELLESLEY, MA, US

8364 No opposition during term of opposition