DE60028727D1 - Herstellungsverfahren für Bauelemente mit gradiertem Top-Oxid und Drift-Gebiet - Google Patents

Herstellungsverfahren für Bauelemente mit gradiertem Top-Oxid und Drift-Gebiet

Info

Publication number
DE60028727D1
DE60028727D1 DE60028727T DE60028727T DE60028727D1 DE 60028727 D1 DE60028727 D1 DE 60028727D1 DE 60028727 T DE60028727 T DE 60028727T DE 60028727 T DE60028727 T DE 60028727T DE 60028727 D1 DE60028727 D1 DE 60028727D1
Authority
DE
Germany
Prior art keywords
manufacturing process
top oxide
drift area
area devices
graded top
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60028727T
Other languages
English (en)
Other versions
DE60028727T2 (de
Inventor
Theodore Letavic
Mark Simpson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE60028727D1 publication Critical patent/DE60028727D1/de
Publication of DE60028727T2 publication Critical patent/DE60028727T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
DE60028727T 1999-09-30 2000-09-25 Herstellungsverfahren für Bauelemente mit gradiertem Top-Oxid und Drift-Gebiet Expired - Lifetime DE60028727T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US408786 1999-09-30
US09/408,786 US6221737B1 (en) 1999-09-30 1999-09-30 Method of making semiconductor devices with graded top oxide and graded drift region
PCT/EP2000/009403 WO2001024250A1 (en) 1999-09-30 2000-09-25 Devices with graded top oxide and graded drift region

Publications (2)

Publication Number Publication Date
DE60028727D1 true DE60028727D1 (de) 2006-07-27
DE60028727T2 DE60028727T2 (de) 2007-05-24

Family

ID=23617760

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60028727T Expired - Lifetime DE60028727T2 (de) 1999-09-30 2000-09-25 Herstellungsverfahren für Bauelemente mit gradiertem Top-Oxid und Drift-Gebiet

Country Status (7)

Country Link
US (1) US6221737B1 (de)
EP (1) EP1142011B1 (de)
JP (1) JP2003510841A (de)
KR (1) KR100750411B1 (de)
DE (1) DE60028727T2 (de)
TW (1) TW484207B (de)
WO (1) WO2001024250A1 (de)

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* Cited by examiner, † Cited by third party
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JP2001230315A (ja) * 2000-02-17 2001-08-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4667572B2 (ja) * 2000-09-18 2011-04-13 三菱電機株式会社 半導体装置およびその製造方法
DE10106073C2 (de) * 2001-02-09 2003-01-30 Infineon Technologies Ag SOI-Bauelement
JP4804666B2 (ja) * 2001-08-10 2011-11-02 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
US6847081B2 (en) * 2001-12-10 2005-01-25 Koninklijke Philips Electronics N.V. Dual gate oxide high-voltage semiconductor device
US6627958B2 (en) 2001-12-10 2003-09-30 Koninklijke Philips Electronics N.V. Lateral high voltage semiconductor device having a sense terminal and method for sensing a drain voltage of the same
GB2418063A (en) * 2004-09-08 2006-03-15 Cambridge Semiconductor Ltd SOI power device
US7071047B1 (en) 2005-01-28 2006-07-04 International Business Machines Corporation Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions
US10060019B2 (en) 2012-11-16 2018-08-28 The Boeing Company Thermal spray coated reinforced polymer composites
US9970100B2 (en) 2012-11-16 2018-05-15 The Boeing Company Interlayer composite substrates
US9139908B2 (en) 2013-12-12 2015-09-22 The Boeing Company Gradient thin films
US9716144B2 (en) 2014-12-19 2017-07-25 General Electric Company Semiconductor devices having channel regions with non-uniform edge
CN106783975A (zh) * 2016-11-23 2017-05-31 南通沃特光电科技有限公司 一种n沟道增强型mos晶体管器件
CN106784002A (zh) * 2016-11-23 2017-05-31 南通沃特光电科技有限公司 一种制造n沟道增强型mos晶体管器件的方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2706623A1 (de) * 1977-02-16 1978-08-17 Siemens Ag Mis-fet fuer hohe source-drain-spannungen
FR2667440A1 (fr) * 1990-09-28 1992-04-03 Philips Nv Procede pour realiser des motifs d'alignement de masques.
JP2744126B2 (ja) 1990-10-17 1998-04-28 株式会社東芝 半導体装置
JP2825671B2 (ja) * 1991-01-23 1998-11-18 新日本製鐵株式会社 溶融Ｚｎ−Ｍｇ−Ａｌ−Ｓｎめっき鋼板
DE69209678T2 (de) * 1991-02-01 1996-10-10 Philips Electronics Nv Halbleiteranordnung für Hochspannungsverwendung und Verfahren zur Herstellung
US5246870A (en) 1991-02-01 1993-09-21 North American Philips Corporation Method for making an improved high voltage thin film transistor having a linear doping profile
US5322804A (en) * 1992-05-12 1994-06-21 Harris Corporation Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps
US5378912A (en) * 1993-11-10 1995-01-03 Philips Electronics North America Corporation Lateral semiconductor-on-insulator (SOI) semiconductor device having a lateral drift region
US5648671A (en) 1995-12-13 1997-07-15 U S Philips Corporation Lateral thin-film SOI devices with linearly-graded field oxide and linear doping profile
TW360982B (en) * 1996-01-26 1999-06-11 Matsushita Electric Works Ltd Thin film transistor of silicon-on-insulator type
JP3495498B2 (ja) 1996-03-15 2004-02-09 松下電工株式会社 半導体装置
JPH10135466A (ja) 1996-10-31 1998-05-22 Matsushita Electric Works Ltd 半導体装置及びその製造方法
JPH10163496A (ja) 1996-11-27 1998-06-19 Matsushita Electric Works Ltd 半導体装置及びその製造方法
KR100228773B1 (ko) * 1996-12-31 1999-11-01 김영환 반도체소자 및 그 제조방법
WO1999034449A2 (en) * 1997-12-24 1999-07-08 Koninklijke Philips Electronics N.V. A high voltage thin film transistor with improved on-state characteristics and method for making same
US5969387A (en) * 1998-06-19 1999-10-19 Philips Electronics North America Corporation Lateral thin-film SOI devices with graded top oxide and graded drift region

Also Published As

Publication number Publication date
JP2003510841A (ja) 2003-03-18
US6221737B1 (en) 2001-04-24
TW484207B (en) 2002-04-21
WO2001024250A1 (en) 2001-04-05
KR20010080605A (ko) 2001-08-22
DE60028727T2 (de) 2007-05-24
KR100750411B1 (ko) 2007-08-21
EP1142011A1 (de) 2001-10-10
EP1142011B1 (de) 2006-06-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL