DE60012081D1 - Nichtflüchtige Halbleiterspeicheranordnung, die eine Datenleseoperation während einer Datenschreib/lösch-Operation erlaubt - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung, die eine Datenleseoperation während einer Datenschreib/lösch-Operation erlaubt

Info

Publication number
DE60012081D1
DE60012081D1 DE60012081T DE60012081T DE60012081D1 DE 60012081 D1 DE60012081 D1 DE 60012081D1 DE 60012081 T DE60012081 T DE 60012081T DE 60012081 T DE60012081 T DE 60012081T DE 60012081 D1 DE60012081 D1 DE 60012081D1
Authority
DE
Germany
Prior art keywords
allows
memory device
semiconductor memory
volatile semiconductor
data read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60012081T
Other languages
English (en)
Other versions
DE60012081T2 (de
Inventor
Kazuhiro Kitazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP13010999A external-priority patent/JP3792435B2/ja
Priority claimed from JP32433999A external-priority patent/JP2001143480A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE60012081D1 publication Critical patent/DE60012081D1/de
Publication of DE60012081T2 publication Critical patent/DE60012081T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
DE2000612081 1999-05-11 2000-03-16 Nichtflüchtige Halbleiterspeicheranordnung, die eine Datenleseoperation während einer Datenschreib/lösch-Operation erlaubt Expired - Lifetime DE60012081T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP13010999 1999-05-11
JP13010999A JP3792435B2 (ja) 1999-05-11 1999-05-11 半導体記憶装置
JP32433999A JP2001143480A (ja) 1999-11-15 1999-11-15 半導体記憶装置とその制御方法
JP32433999 1999-11-15

Publications (2)

Publication Number Publication Date
DE60012081D1 true DE60012081D1 (de) 2004-08-19
DE60012081T2 DE60012081T2 (de) 2004-11-18

Family

ID=26465309

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2000612081 Expired - Lifetime DE60012081T2 (de) 1999-05-11 2000-03-16 Nichtflüchtige Halbleiterspeicheranordnung, die eine Datenleseoperation während einer Datenschreib/lösch-Operation erlaubt

Country Status (5)

Country Link
US (1) US6418061B1 (de)
EP (1) EP1052646B1 (de)
KR (1) KR100622361B1 (de)
DE (1) DE60012081T2 (de)
TW (1) TW466497B (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002329396A (ja) * 2001-04-26 2002-11-15 Fujitsu Ltd バンク構成を変更可能なフラッシュメモリ
US6552935B2 (en) * 2001-08-02 2003-04-22 Stmicroelectronics, Inc. Dual bank flash memory device and method
US6927072B2 (en) 2002-03-08 2005-08-09 Freescale Semiconductor, Inc. Method of applying cladding material on conductive lines of MRAM devices
JP2003263892A (ja) * 2002-03-11 2003-09-19 Toshiba Corp 半導体記憶装置
US20050185465A1 (en) * 2003-03-11 2005-08-25 Fujitsu Limited Memory device
FR2865311B1 (fr) * 2004-01-21 2006-08-25 Atmel Nantes Sa Memoire reprogrammable electriquememnt de type eeprom et microcontroleur correspondant.
KR20060009446A (ko) * 2004-07-22 2006-02-01 삼성전자주식회사 프로세서의 오동작을 방지할 수 있는 정보 처리 장치
TWI543185B (zh) 2005-09-30 2016-07-21 考文森智財管理公司 具有輸出控制之記憶體及其系統
US7652922B2 (en) 2005-09-30 2010-01-26 Mosaid Technologies Incorporated Multiple independent serial link memory
US7436733B2 (en) * 2006-03-03 2008-10-14 Sandisk Corporation System for performing read operation on non-volatile storage with compensation for coupling
US7499319B2 (en) * 2006-03-03 2009-03-03 Sandisk Corporation Read operation for non-volatile storage with compensation for coupling
US7450421B2 (en) * 2006-06-02 2008-11-11 Sandisk Corporation Data pattern sensitivity compensation using different voltage
US7310272B1 (en) * 2006-06-02 2007-12-18 Sandisk Corporation System for performing data pattern sensitivity compensation using different voltage
US7495962B2 (en) * 2006-12-29 2009-02-24 Sandisk Corporation Alternating read mode
US7440324B2 (en) * 2006-12-29 2008-10-21 Sandisk Corporation Apparatus with alternating read mode
ATE475186T1 (de) * 2006-12-29 2010-08-15 Sandisk Corp Lesen einer nichtflüchtigen speicherzelle unter berücksichtigung des speicherstatus einer benachbarten speicherzelle
US7606070B2 (en) * 2006-12-29 2009-10-20 Sandisk Corporation Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation
US7518923B2 (en) 2006-12-29 2009-04-14 Sandisk Corporation Margined neighbor reading for non-volatile memory read operations including coupling compensation
US20110060868A1 (en) * 2008-02-19 2011-03-10 Rambus Inc. Multi-bank flash memory architecture with assignable resources
KR101217218B1 (ko) * 2011-03-15 2012-12-31 고려대학교 산학협력단 저전력 비디오 프로세서를 위한 임베디드 메모리 설계
US20150095551A1 (en) * 2013-09-30 2015-04-02 Micron Technology, Inc. Volatile memory architecutre in non-volatile memory devices and related controllers
US10838786B2 (en) * 2016-09-05 2020-11-17 Mitsubishi Electric Corporation Embedded system, embedded system control method and data consistency judgment method

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5269010A (en) * 1990-08-31 1993-12-07 Advanced Micro Devices, Inc. Memory control for use in a memory system incorporating a plurality of memory banks
JPH05274879A (ja) * 1992-03-26 1993-10-22 Nec Corp 半導体装置
JP3310011B2 (ja) * 1992-03-30 2002-07-29 株式会社東芝 半導体メモリおよびこれを使用した半導体メモリボード
US5375222A (en) * 1992-03-31 1994-12-20 Intel Corporation Flash memory card with a ready/busy mask register
US5696917A (en) * 1994-06-03 1997-12-09 Intel Corporation Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory
JPH08249891A (ja) 1995-03-09 1996-09-27 Fuji Film Micro Device Kk 不揮発性メモリ
EP0745995B1 (de) * 1995-05-05 2001-04-11 STMicroelectronics S.r.l. Anordnung von nichtflüchtigen EEPROM,insbesondere Flash-EEPROM
US5594686A (en) * 1995-12-29 1997-01-14 Intel Corporation Method and apparatus for protecting data stored in flash memory
JPH10144086A (ja) 1996-11-14 1998-05-29 Sharp Corp 不揮発性半導体記憶装置
US5867430A (en) * 1996-12-20 1999-02-02 Advanced Micro Devices Inc Bank architecture for a non-volatile memory enabling simultaneous reading and writing
JP4000654B2 (ja) * 1997-02-27 2007-10-31 セイコーエプソン株式会社 半導体装置及び電子機器
US5822244A (en) * 1997-09-24 1998-10-13 Motorola, Inc. Method and apparatus for suspending a program/erase operation in a flash memory
US5999474A (en) * 1998-10-01 1999-12-07 Monolithic System Tech Inc Method and apparatus for complete hiding of the refresh of a semiconductor memory
US6662262B1 (en) * 1999-10-19 2003-12-09 Advanced Micro Devices, Inc. OTP sector double protection for a simultaneous operation flash memory

Also Published As

Publication number Publication date
DE60012081T2 (de) 2004-11-18
KR100622361B1 (ko) 2006-09-11
EP1052646B1 (de) 2004-07-14
EP1052646A3 (de) 2002-05-02
TW466497B (en) 2001-12-01
EP1052646A2 (de) 2000-11-15
KR20010087733A (ko) 2001-09-21
US6418061B1 (en) 2002-07-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE