DE69321685D1 - Datenlöschverfahren in einem nicht-flüchtigen Halbleiterspeicher - Google Patents

Datenlöschverfahren in einem nicht-flüchtigen Halbleiterspeicher

Info

Publication number
DE69321685D1
DE69321685D1 DE69321685T DE69321685T DE69321685D1 DE 69321685 D1 DE69321685 D1 DE 69321685D1 DE 69321685 T DE69321685 T DE 69321685T DE 69321685 T DE69321685 T DE 69321685T DE 69321685 D1 DE69321685 D1 DE 69321685D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
volatile semiconductor
data erasure
erasure method
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69321685T
Other languages
English (en)
Other versions
DE69321685T2 (de
Inventor
Kenichi Oyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69321685D1 publication Critical patent/DE69321685D1/de
Application granted granted Critical
Publication of DE69321685T2 publication Critical patent/DE69321685T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • G11C16/3409—Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
DE69321685T 1992-11-13 1993-11-12 Datenlöschverfahren in einem nicht-flüchtigen Halbleiterspeicher Expired - Fee Related DE69321685T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30343192A JP2871355B2 (ja) 1992-11-13 1992-11-13 不揮発性半導体記憶装置のデータ消去方法

Publications (2)

Publication Number Publication Date
DE69321685D1 true DE69321685D1 (de) 1998-11-26
DE69321685T2 DE69321685T2 (de) 1999-03-18

Family

ID=17920927

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69321685T Expired - Fee Related DE69321685T2 (de) 1992-11-13 1993-11-12 Datenlöschverfahren in einem nicht-flüchtigen Halbleiterspeicher

Country Status (5)

Country Link
US (1) US5412608A (de)
EP (1) EP0597722B1 (de)
JP (1) JP2871355B2 (de)
KR (1) KR960001321B1 (de)
DE (1) DE69321685T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5903494A (en) * 1994-03-30 1999-05-11 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
FR2718289B1 (fr) * 1994-03-30 1996-08-02 Sgs Thomson Microelectronics Cellule mémoire électriquement programmable.
US5561387A (en) * 1995-07-26 1996-10-01 Taiwan Semiconductor Manufacturing Company Ltd Method for measuring gate insulation layer thickness
KR980005016A (ko) * 1996-06-29 1998-03-30 김주용 플래쉬 메모리 소자의 소거방법
US5838618A (en) * 1997-09-11 1998-11-17 Taiwan Semiconductor Manufacturing Company Ltd. Bi-modal erase method for eliminating cycling-induced flash EEPROM cell write/erase threshold closure
WO1999031669A1 (en) * 1997-12-18 1999-06-24 Advanced Micro Devices, Inc. Biasing method and structure for reducing band-to-band and/or avalanche currents during the erase of flash memory devices
US6005809A (en) * 1998-06-19 1999-12-21 Taiwan Semiconductor Manufacturing Company, Ltd. Program and erase method for a split gate flash EEPROM
US6049486A (en) * 1999-01-04 2000-04-11 Taiwan Semiconductor Manufacturing Company Triple mode erase scheme for improving flash EEPROM cell threshold voltage (VT) cycling closure effect
JP4586219B2 (ja) * 1999-09-17 2010-11-24 ソニー株式会社 不揮発性半導体記憶装置の消去方法
US6728140B2 (en) 2001-12-05 2004-04-27 Nexflash Technologies, Inc. Threshold voltage convergence
US6614693B1 (en) 2002-03-19 2003-09-02 Taiwan Semiconductor Manufacturing Company Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM
US8303642B1 (en) * 2003-05-23 2012-11-06 Advanced Cardiovascular Systems, Inc. Metal injection molded tubing for drug eluting stents
US7274601B2 (en) * 2004-09-27 2007-09-25 Macronix International Co., Ltd. Programming and erasing method for charge-trapping memory devices
JP2007035214A (ja) * 2005-07-29 2007-02-08 Renesas Technology Corp 不揮発性半導体記憶装置
JP2008262626A (ja) * 2007-04-11 2008-10-30 Renesas Technology Corp 不揮発性半導体メモリ
US8064267B2 (en) * 2008-11-14 2011-11-22 Micron Technology, Inc. Erase voltage reduction in a non-volatile memory device
JP5923248B2 (ja) * 2010-05-20 2016-05-24 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2804066B2 (ja) * 1989-02-22 1998-09-24 株式会社東芝 不揮発性半導体メモリ装置
US5132935A (en) * 1990-04-16 1992-07-21 Ashmore Jr Benjamin H Erasure of eeprom memory arrays to prevent over-erased cells
JPH046698A (ja) * 1990-04-24 1992-01-10 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP2754887B2 (ja) * 1990-08-24 1998-05-20 三菱電機株式会社 不揮発性半導体記憶装置及びその書き込み・消去方法
JP2794974B2 (ja) * 1991-04-10 1998-09-10 日本電気株式会社 不揮発性半導体記憶装置の起動方法
JPH05235368A (ja) * 1992-02-19 1993-09-10 Nec Corp データ消去方法
JP3061924B2 (ja) * 1992-03-02 2000-07-10 日本電気株式会社 不揮発性記憶装置の消去方法

Also Published As

Publication number Publication date
EP0597722A2 (de) 1994-05-18
US5412608A (en) 1995-05-02
EP0597722A3 (de) 1995-05-24
KR960001321B1 (ko) 1996-01-25
JP2871355B2 (ja) 1999-03-17
JPH06150676A (ja) 1994-05-31
EP0597722B1 (de) 1998-10-21
DE69321685T2 (de) 1999-03-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee