IT1308856B1 - Circuito di lettura per una memoria non volatile. - Google Patents

Circuito di lettura per una memoria non volatile.

Info

Publication number
IT1308856B1
IT1308856B1 IT1999TO000943A ITTO990943A IT1308856B1 IT 1308856 B1 IT1308856 B1 IT 1308856B1 IT 1999TO000943 A IT1999TO000943 A IT 1999TO000943A IT TO990943 A ITTO990943 A IT TO990943A IT 1308856 B1 IT1308856 B1 IT 1308856B1
Authority
IT
Italy
Prior art keywords
volatile memory
reading circuit
reading
circuit
volatile
Prior art date
Application number
IT1999TO000943A
Other languages
English (en)
Inventor
Sandre Guido De
Marco Pasotti
Pier Luigi Rolandi
Giovanni Guaitini
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1999TO000943A priority Critical patent/IT1308856B1/it
Publication of ITTO990943A0 publication Critical patent/ITTO990943A0/it
Priority to US09/699,304 priority patent/US6400607B1/en
Publication of ITTO990943A1 publication Critical patent/ITTO990943A1/it
Application granted granted Critical
Publication of IT1308856B1 publication Critical patent/IT1308856B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
IT1999TO000943A 1999-10-29 1999-10-29 Circuito di lettura per una memoria non volatile. IT1308856B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT1999TO000943A IT1308856B1 (it) 1999-10-29 1999-10-29 Circuito di lettura per una memoria non volatile.
US09/699,304 US6400607B1 (en) 1999-10-29 2000-10-27 Reading circuit for a non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1999TO000943A IT1308856B1 (it) 1999-10-29 1999-10-29 Circuito di lettura per una memoria non volatile.

Publications (3)

Publication Number Publication Date
ITTO990943A0 ITTO990943A0 (it) 1999-10-29
ITTO990943A1 ITTO990943A1 (it) 2001-04-29
IT1308856B1 true IT1308856B1 (it) 2002-01-11

Family

ID=11418184

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1999TO000943A IT1308856B1 (it) 1999-10-29 1999-10-29 Circuito di lettura per una memoria non volatile.

Country Status (2)

Country Link
US (1) US6400607B1 (it)
IT (1) IT1308856B1 (it)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1319037B1 (it) * 2000-10-27 2003-09-23 St Microelectronics Srl Circuito di lettura di memorie non volatili
US6525966B1 (en) * 2000-12-06 2003-02-25 Advanced Micro Devices, Inc. Method and apparatus for adjusting on-chip current reference for EEPROM sensing
JP2002230989A (ja) * 2001-01-31 2002-08-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
DE10113239C1 (de) * 2001-03-19 2002-08-22 Infineon Technologies Ag Bewerterschaltung zum Auslesen einer in einer Speicherzelle gespeicherten Information
US6535428B2 (en) * 2001-06-14 2003-03-18 Stmicroelectronics S.R.L. Sensing circuit for memory cells
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US7251178B2 (en) * 2004-09-07 2007-07-31 Infineon Technologies Ag Current sense amplifier
US7433253B2 (en) * 2002-12-20 2008-10-07 Qimonda Ag Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module
US6946882B2 (en) * 2002-12-20 2005-09-20 Infineon Technologies Ag Current sense amplifier
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US7142464B2 (en) * 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
ITVA20040021A1 (it) * 2004-05-04 2004-08-04 St Microelectronics Srl Amplificatore di sensing per la lettura di una cella di memoria non volatile
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7242618B2 (en) * 2004-12-09 2007-07-10 Saifun Semiconductors Ltd. Method for reading non-volatile memory cells
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
JP2007027760A (ja) 2005-07-18 2007-02-01 Saifun Semiconductors Ltd 高密度不揮発性メモリアレイ及び製造方法
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US8116142B2 (en) * 2005-09-06 2012-02-14 Infineon Technologies Ag Method and circuit for erasing a non-volatile memory cell
US20070087503A1 (en) * 2005-10-17 2007-04-19 Saifun Semiconductors, Ltd. Improving NROM device characteristics using adjusted gate work function
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7369450B2 (en) 2006-05-26 2008-05-06 Freescale Semiconductor, Inc. Nonvolatile memory having latching sense amplifier and method of operation
US7522463B2 (en) * 2007-01-12 2009-04-21 Atmel Corporation Sense amplifier with stages to reduce capacitance mismatch in current mirror load
US7605644B2 (en) * 2007-05-03 2009-10-20 Arm Limited Integrated circuit power-on control and programmable comparator
US8564470B2 (en) * 2011-06-14 2013-10-22 Infineon Technologies Ag Successive approximation analog-to-digital converter
CN102394109B (zh) * 2011-09-28 2016-08-03 上海华虹宏力半导体制造有限公司 闪存
JP5922935B2 (ja) * 2012-01-24 2016-05-24 エスアイアイ・セミコンダクタ株式会社 不揮発性メモリ装置の読出し回路
CN103366804B (zh) * 2012-03-30 2017-10-13 硅存储技术公司 具有电流注入读出放大器的非易失性存储装置
KR101999764B1 (ko) * 2012-08-24 2019-07-12 에스케이하이닉스 주식회사 반도체 메모리 장치
US9437257B2 (en) * 2012-12-31 2016-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Sensing circuit, memory device and data detecting method
US9460785B2 (en) * 2014-03-06 2016-10-04 Kabushiki Kaisha Toshiba Semiconductor storage device
US10319438B2 (en) * 2016-08-02 2019-06-11 Stmicroelectronics S.R.L. Memory with margin current addition and related methods
US9991000B2 (en) * 2016-08-02 2018-06-05 Stmicroelectronics S.R.L. Memory with margin current addition and related methods
DE102021116145A1 (de) * 2021-06-22 2022-12-22 Infineon Technologies Ag Zugriff auf einen Speicher
US11915733B2 (en) * 2021-07-23 2024-02-27 Taiwan Semiconductor Manufacturing Company, Ltd. Memory devices, circuits and methods of adjusting a sensing current for the memory device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3160316B2 (ja) * 1991-07-25 2001-04-25 株式会社東芝 不揮発性半導体記憶装置
EP0678874B1 (en) * 1994-04-19 2000-07-26 STMicroelectronics S.r.l. Memory array cell reading circuit
DE69524572T2 (de) * 1995-04-28 2002-08-22 Stmicroelectronics S.R.L., Agrate Brianza Leseverstärkerschaltung für Halbleiterspeicheranordnungen
EP0798740B1 (en) * 1996-03-29 2003-11-12 STMicroelectronics S.r.l. Reference system for determining the programmed/non-programmed status of a memory cell, particularly for non-volatile memories
US6219290B1 (en) * 1998-10-14 2001-04-17 Macronix International Co., Ltd. Memory cell sense amplifier

Also Published As

Publication number Publication date
ITTO990943A1 (it) 2001-04-29
ITTO990943A0 (it) 1999-10-29
US6400607B1 (en) 2002-06-04

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