DE4229837C2 - Verfahren zur Herstellung eines Speicherkondensators für eine Halbleiter-Speicherzelle - Google Patents

Verfahren zur Herstellung eines Speicherkondensators für eine Halbleiter-Speicherzelle

Info

Publication number
DE4229837C2
DE4229837C2 DE4229837A DE4229837A DE4229837C2 DE 4229837 C2 DE4229837 C2 DE 4229837C2 DE 4229837 A DE4229837 A DE 4229837A DE 4229837 A DE4229837 A DE 4229837A DE 4229837 C2 DE4229837 C2 DE 4229837C2
Authority
DE
Germany
Prior art keywords
layer
etching
polysilicon
grains
micro
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE4229837A
Other languages
German (de)
English (en)
Other versions
DE4229837A1 (de
Inventor
Dae-Je Chin
Tae-Young Chung
Young-Woo Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE4229837A1 publication Critical patent/DE4229837A1/de
Application granted granted Critical
Publication of DE4229837C2 publication Critical patent/DE4229837C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/712—Electrodes having non-planar surfaces, e.g. formed by texturisation being rough surfaces, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/714—Electrodes having non-planar surfaces, e.g. formed by texturisation having horizontal extensions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE4229837A 1991-09-07 1992-09-07 Verfahren zur Herstellung eines Speicherkondensators für eine Halbleiter-Speicherzelle Expired - Fee Related DE4229837C2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR910015626 1991-09-07
KR920005409 1992-03-31

Publications (2)

Publication Number Publication Date
DE4229837A1 DE4229837A1 (de) 1993-03-11
DE4229837C2 true DE4229837C2 (de) 1996-07-11

Family

ID=26628732

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4229837A Expired - Fee Related DE4229837C2 (de) 1991-09-07 1992-09-07 Verfahren zur Herstellung eines Speicherkondensators für eine Halbleiter-Speicherzelle

Country Status (6)

Country Link
JP (1) JP2690434B2 (enrdf_load_stackoverflow)
DE (1) DE4229837C2 (enrdf_load_stackoverflow)
FR (1) FR2681178A1 (enrdf_load_stackoverflow)
GB (1) GB2259406B (enrdf_load_stackoverflow)
IT (1) IT1256130B (enrdf_load_stackoverflow)
TW (1) TW222710B (enrdf_load_stackoverflow)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960002097B1 (ko) * 1992-02-28 1996-02-10 삼성전자주식회사 반도체장치의 커패시터 제조방법
US5254503A (en) * 1992-06-02 1993-10-19 International Business Machines Corporation Process of making and using micro mask
JPH0774268A (ja) * 1993-07-07 1995-03-17 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
US5383088A (en) * 1993-08-09 1995-01-17 International Business Machines Corporation Storage capacitor with a conducting oxide electrode for metal-oxide dielectrics
US5512768A (en) * 1994-03-18 1996-04-30 United Microelectronics Corporation Capacitor for use in DRAM cell using surface oxidized silicon nodules
US5869368A (en) * 1997-09-22 1999-02-09 Yew; Tri-Rung Method to increase capacitance
KR100675275B1 (ko) 2004-12-16 2007-01-26 삼성전자주식회사 반도체 장치 및 이 장치의 패드 배치방법
TWI295822B (en) 2006-03-29 2008-04-11 Advanced Semiconductor Eng Method for forming a passivation layer
FR2988712B1 (fr) 2012-04-02 2014-04-11 St Microelectronics Rousset Circuit integre equipe d'un dispositif de detection de son orientation spatiale et/ou d'un changement de cette orientation.
FR2998417A1 (fr) * 2012-11-16 2014-05-23 St Microelectronics Rousset Procede de realisation d'un element pointu de circuit integre, et circuit integre correspondant
US11825645B2 (en) 2020-06-04 2023-11-21 Etron Technology, Inc. Memory cell structure
JP7339319B2 (ja) * 2021-12-03 2023-09-05 ▲ゆ▼創科技股▲ふん▼有限公司 メモリセル構造

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63240057A (ja) * 1987-03-27 1988-10-05 Fujitsu Ltd スタツク型キヤパシタ
JPH01282855A (ja) * 1988-05-09 1989-11-14 Mitsubishi Electric Corp 半導体基板上にキャパシタを形成する方法
JPH03165552A (ja) * 1989-11-24 1991-07-17 Sony Corp スタックトキャパシタ型ｄｒａｍとその製造方法
JPH03166730A (ja) * 1989-11-27 1991-07-18 Seiko Instr Inc 半導体装置の製造方法
DD299990A5 (de) * 1990-02-23 1992-05-14 Dresden Forschzentr Mikroelek Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung
US5049517A (en) * 1990-11-07 1991-09-17 Micron Technology, Inc. Method for formation of a stacked capacitor
US5037773A (en) * 1990-11-08 1991-08-06 Micron Technology, Inc. Stacked capacitor doping technique making use of rugged polysilicon
KR930009583B1 (ko) * 1990-11-29 1993-10-07 삼성전자 주식회사 융모모양의 커패시터구조를 가진 반도체 메모리장치의 제조방법
JPH04207066A (ja) * 1990-11-30 1992-07-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
KR930009593B1 (ko) * 1991-01-30 1993-10-07 삼성전자 주식회사 고집적 반도체 메모리장치 및 그 제조방법(HCC Cell)
KR940005288B1 (ko) * 1991-07-11 1994-06-15 금성일렉트론 주식회사 반도체 장치의 제조방법

Also Published As

Publication number Publication date
IT1256130B (it) 1995-11-29
GB2259406B (en) 1996-05-01
ITMI922067A1 (it) 1994-03-04
FR2681178B1 (enrdf_load_stackoverflow) 1997-02-07
JPH05198745A (ja) 1993-08-06
TW222710B (enrdf_load_stackoverflow) 1994-04-21
ITMI922067A0 (it) 1992-09-04
GB2259406A (en) 1993-03-10
DE4229837A1 (de) 1993-03-11
JP2690434B2 (ja) 1997-12-10
FR2681178A1 (fr) 1993-03-12
GB9218898D0 (en) 1992-10-21

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee