DE69221530T2 - Verfahren zum Erhöhen der Kapazität eines DRAMs durch Anodisieren der Polysiliziumschicht einer unteren Kondensatorplatte - Google Patents

Verfahren zum Erhöhen der Kapazität eines DRAMs durch Anodisieren der Polysiliziumschicht einer unteren Kondensatorplatte

Info

Publication number
DE69221530T2
DE69221530T2 DE69221530T DE69221530T DE69221530T2 DE 69221530 T2 DE69221530 T2 DE 69221530T2 DE 69221530 T DE69221530 T DE 69221530T DE 69221530 T DE69221530 T DE 69221530T DE 69221530 T2 DE69221530 T2 DE 69221530T2
Authority
DE
Germany
Prior art keywords
anodizing
dram
capacitance
increasing
polysilicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69221530T
Other languages
English (en)
Other versions
DE69221530D1 (de
Inventor
Gurtej S Sandhu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of DE69221530D1 publication Critical patent/DE69221530D1/de
Publication of DE69221530T2 publication Critical patent/DE69221530T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/96—Porous semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
DE69221530T 1991-05-06 1992-05-04 Verfahren zum Erhöhen der Kapazität eines DRAMs durch Anodisieren der Polysiliziumschicht einer unteren Kondensatorplatte Expired - Lifetime DE69221530T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/696,438 US5068199A (en) 1991-05-06 1991-05-06 Method for anodizing a polysilicon layer lower capacitor plate of a DRAM to increase capacitance

Publications (2)

Publication Number Publication Date
DE69221530D1 DE69221530D1 (de) 1997-09-18
DE69221530T2 true DE69221530T2 (de) 1997-12-18

Family

ID=24797075

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69221530T Expired - Lifetime DE69221530T2 (de) 1991-05-06 1992-05-04 Verfahren zum Erhöhen der Kapazität eines DRAMs durch Anodisieren der Polysiliziumschicht einer unteren Kondensatorplatte

Country Status (3)

Country Link
US (1) US5068199A (de)
EP (1) EP0513615B1 (de)
DE (1) DE69221530T2 (de)

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US5208176A (en) * 1990-01-16 1993-05-04 Micron Technology, Inc. Method of fabricating an enhanced dynamic random access memory (DRAM) cell capacitor using multiple polysilicon texturization
USRE35420E (en) * 1991-02-11 1997-01-07 Micron Technology, Inc. Method of increasing capacitance by surface roughening in semiconductor wafer processing
US5244842A (en) * 1991-12-17 1993-09-14 Micron Technology, Inc. Method of increasing capacitance by surface roughening in semiconductor wafer processing
KR940011801B1 (ko) * 1991-03-23 1994-12-26 삼성전자 주식회사 고용량 캐패시터를 포함하는 반도체 장치 및 그의 제조방법
US5234857A (en) * 1991-03-23 1993-08-10 Samsung Electronics, Co., Ltd. Method of making semiconductor device having a capacitor of large capacitance
KR920018987A (ko) * 1991-03-23 1992-10-22 김광호 캐패시터의 제조방법
US5138411A (en) * 1991-05-06 1992-08-11 Micron Technology, Inc. Anodized polysilicon layer lower capacitor plate of a dram to increase capacitance
EP0516031A1 (de) * 1991-05-29 1992-12-02 Ramtron International Corporation Ferroelektrische Stapelspeicherzelle und Herstellungsverfahren
KR940007391B1 (ko) * 1991-08-23 1994-08-16 삼성전자 주식회사 고집적 반도체 메모리장치의 제조방법
US5191509A (en) * 1991-12-11 1993-03-02 International Business Machines Corporation Textured polysilicon stacked trench capacitor
EP0553791A1 (de) * 1992-01-31 1993-08-04 Nec Corporation Kondensatorelektrode für DRAM und Verfahren zu ihrer Herstellung
KR960002097B1 (ko) * 1992-02-28 1996-02-10 삼성전자주식회사 반도체장치의 커패시터 제조방법
US5238862A (en) * 1992-03-18 1993-08-24 Micron Technology, Inc. Method of forming a stacked capacitor with striated electrode
EP0578856A1 (de) * 1992-07-16 1994-01-19 International Business Machines Corporation Mikro-Kondensator
US5266514A (en) * 1992-12-21 1993-11-30 Industrial Technology Research Institute Method for producing a roughened surface capacitor
JP2605594B2 (ja) * 1993-09-03 1997-04-30 日本電気株式会社 半導体装置の製造方法
US5696014A (en) * 1994-03-11 1997-12-09 Micron Semiconductor, Inc. Method for increasing capacitance of an HSG rugged capacitor using a phosphine rich oxidation and subsequent wet etch
US5427974A (en) * 1994-03-18 1995-06-27 United Microelectronics Corporation Method for forming a capacitor in a DRAM cell using a rough overlayer of tungsten
US5512768A (en) * 1994-03-18 1996-04-30 United Microelectronics Corporation Capacitor for use in DRAM cell using surface oxidized silicon nodules
US5466627A (en) * 1994-03-18 1995-11-14 United Microelectronics Corporation Stacked capacitor process using BPSG precipitates
US5482885A (en) * 1994-03-18 1996-01-09 United Microelectronics Corp. Method for forming most capacitor using poly spacer technique
US5492848A (en) * 1994-03-18 1996-02-20 United Microelectronics Corp. Stacked capacitor process using silicon nodules
US5482882A (en) * 1994-03-18 1996-01-09 United Microelectronics Corporation Method for forming most capacitor using polysilicon islands
JPH08148280A (ja) * 1994-04-14 1996-06-07 Toshiba Corp 半導体装置およびその製造方法
US5429979A (en) * 1994-07-13 1995-07-04 Industrial Technology Research Institute Method of forming a dram cell having a ring-type stacked capacitor
US5583368A (en) * 1994-08-11 1996-12-10 International Business Machines Corporation Stacked devices
US5508542A (en) * 1994-10-28 1996-04-16 International Business Machines Corporation Porous silicon trench and capacitor structures
US5885882A (en) * 1995-07-18 1999-03-23 Micron Technology, Inc. Method for making polysilicon electrode with increased surface area making same
JPH1098163A (ja) * 1996-09-24 1998-04-14 Oki Electric Ind Co Ltd 半導体記憶装置のキャパシタ構造及びその形成方法
US6015986A (en) * 1995-12-22 2000-01-18 Micron Technology, Inc. Rugged metal electrodes for metal-insulator-metal capacitors
KR100198660B1 (ko) * 1996-05-08 1999-06-15 구본준 메모리 셀 캐패시터 제조방법
US6660610B2 (en) 1996-07-08 2003-12-09 Micron Technology, Inc. Devices having improved capacitance and methods of their fabrication
US6190992B1 (en) * 1996-07-15 2001-02-20 Micron Technology, Inc. Method to achieve rough silicon surface on both sides of container for enhanced capacitance/area electrodes
US6528436B1 (en) 1996-10-21 2003-03-04 Micron Technology. Inc. Method of forming silicon nitride layer directly on HSG polysilicon
CN1214542A (zh) * 1997-09-30 1999-04-21 西门子公司 集成电路制造方法及结构
US6476435B1 (en) * 1997-09-30 2002-11-05 Micron Technology, Inc. Self-aligned recessed container cell capacitor
TW364162B (en) * 1997-12-05 1999-07-11 United Microelectronics Corp Process for charge storage electrode structure
US6303956B1 (en) 1999-02-26 2001-10-16 Micron Technology, Inc. Conductive container structures having a dielectric cap
US6358793B1 (en) 1999-02-26 2002-03-19 Micron Technology, Inc. Method for localized masking for semiconductor structure development
US6590246B1 (en) 2000-02-08 2003-07-08 Micron Technology, Inc. Structures and methods for improved capacitor cells in integrated circuits
US7253076B1 (en) 2000-06-08 2007-08-07 Micron Technologies, Inc. Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
US6482736B1 (en) * 2000-06-08 2002-11-19 Micron Technology, Inc. Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers
US6429127B1 (en) 2000-06-08 2002-08-06 Micron Technology, Inc. Methods for forming rough ruthenium-containing layers and structures/methods using same
US6639266B1 (en) 2000-08-30 2003-10-28 Micron Technology, Inc. Modifying material removal selectivity in semiconductor structure development
US6498088B1 (en) * 2000-11-09 2002-12-24 Micron Technology, Inc. Stacked local interconnect structure and method of fabricating same
US6613641B1 (en) * 2001-01-17 2003-09-02 International Business Machines Corporation Production of metal insulator metal (MIM) structures using anodizing process
WO2005006429A1 (de) * 2003-07-08 2005-01-20 Infineon Technologies Ag Integrierte schaltungsanordnung mit niederohmigen kontakten und herstellungsverfahren
US8048755B2 (en) 2010-02-08 2011-11-01 Micron Technology, Inc. Resistive memory and methods of processing resistive memory
US11121209B2 (en) 2017-03-27 2021-09-14 International Business Machines Corporation Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor

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JPS61279166A (ja) * 1985-06-04 1986-12-09 Nec Corp 混成集積回路用基板
JPS6429956A (en) * 1987-07-24 1989-01-31 Nec Corp Serial interface circuit
JP2564316B2 (ja) * 1987-08-10 1996-12-18 株式会社日立製作所 半導体装置およびその製造方法
JPH0726582B2 (ja) * 1987-09-29 1995-03-29 三菱電機株式会社 内燃機関の燃料噴射時期制御装置
US5043780A (en) * 1990-01-03 1991-08-27 Micron Technology, Inc. DRAM cell having a texturized polysilicon lower capacitor plate for increased capacitance
US5005072A (en) * 1990-01-29 1991-04-02 Micron Technology, Inc. Stacked cell design for 16-megabit DRAM array having a pair of interconnected poly layers which enfold a single field plate layer and connect to the cell's storage node junction

Also Published As

Publication number Publication date
US5068199A (en) 1991-11-26
EP0513615A3 (en) 1993-05-12
DE69221530D1 (de) 1997-09-18
EP0513615A2 (de) 1992-11-19
EP0513615B1 (de) 1997-08-13

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