DE69015135D1 - Verfahren zum Herstellen eines Kondensators für DRAM-Zelle. - Google Patents

Verfahren zum Herstellen eines Kondensators für DRAM-Zelle.

Info

Publication number
DE69015135D1
DE69015135D1 DE69015135T DE69015135T DE69015135D1 DE 69015135 D1 DE69015135 D1 DE 69015135D1 DE 69015135 T DE69015135 T DE 69015135T DE 69015135 T DE69015135 T DE 69015135T DE 69015135 D1 DE69015135 D1 DE 69015135D1
Authority
DE
Germany
Prior art keywords
capacitor
manufacturing
dram cell
dram
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69015135T
Other languages
English (en)
Other versions
DE69015135T2 (de
Inventor
Tsiu Chiu Chan
Frank Randolph Bryant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Publication of DE69015135D1 publication Critical patent/DE69015135D1/de
Application granted granted Critical
Publication of DE69015135T2 publication Critical patent/DE69015135T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/954—Making oxide-nitride-oxide device

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69015135T 1989-11-30 1990-08-30 Verfahren zum Herstellen eines Kondensators für DRAM-Zelle. Expired - Fee Related DE69015135T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/443,897 US5116776A (en) 1989-11-30 1989-11-30 Method of making a stacked copacitor for dram cell

Publications (2)

Publication Number Publication Date
DE69015135D1 true DE69015135D1 (de) 1995-01-26
DE69015135T2 DE69015135T2 (de) 1995-06-14

Family

ID=23762625

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69015135T Expired - Fee Related DE69015135T2 (de) 1989-11-30 1990-08-30 Verfahren zum Herstellen eines Kondensators für DRAM-Zelle.

Country Status (5)

Country Link
US (1) US5116776A (de)
EP (1) EP0430404B1 (de)
JP (1) JP2798300B2 (de)
KR (1) KR910010751A (de)
DE (1) DE69015135T2 (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5219781A (en) * 1988-12-08 1993-06-15 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing semiconductor memory device having a stacked type capacitor
KR950010115B1 (ko) * 1990-02-23 1995-09-07 금성일렉트론주식회사 캐패시터 제조방법 및 구조
US5234853A (en) * 1990-03-05 1993-08-10 Fujitsu Limited Method of producing a high voltage MOS transistor
US5229314A (en) * 1990-05-01 1993-07-20 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation
KR930000718B1 (ko) * 1990-05-21 1993-01-30 삼성전자 주식회사 반도체장치의 제조방법
DE4122038C2 (de) * 1990-07-03 1994-08-25 Mitsubishi Electric Corp Herstellungsverfahren für einen DRAM
JPH04342164A (ja) * 1991-05-20 1992-11-27 Hitachi Ltd 半導体集積回路装置の形成方法
KR930010081B1 (ko) * 1991-05-24 1993-10-14 현대전자산업 주식회사 2중 적층캐패시터 구조를 갖는 반도체 기억장치 및 그 제조방법
US5220483A (en) * 1992-01-16 1993-06-15 Crystal Semiconductor Tri-level capacitor structure in switched-capacitor filter
US5401680A (en) * 1992-02-18 1995-03-28 National Semiconductor Corporation Method for forming a ceramic oxide capacitor having barrier layers
JP2838337B2 (ja) * 1992-03-27 1998-12-16 三菱電機株式会社 半導体装置
US5244826A (en) * 1992-04-16 1993-09-14 Micron Technology, Inc. Method of forming an array of finned memory cell capacitors on a semiconductor substrate
US5262352A (en) * 1992-08-31 1993-11-16 Motorola, Inc. Method for forming an interconnection structure for conductive layers
US5395784A (en) * 1993-04-14 1995-03-07 Industrial Technology Research Institute Method of manufacturing low leakage and long retention time DRAM
US5650655A (en) 1994-04-28 1997-07-22 Micron Technology, Inc. Integrated circuitry having electrical interconnects
US5439840A (en) * 1993-08-02 1995-08-08 Motorola, Inc. Method of forming a nonvolatile random access memory capacitor cell having a metal-oxide dielectric
US5369048A (en) * 1993-08-26 1994-11-29 United Microelectronics Corporation Stack capacitor DRAM cell with buried bit-line and method of manufacture
US5364813A (en) * 1993-09-01 1994-11-15 Industrial Technology Research Institute Stacked DRAM poly plate capacitor
US5416356A (en) * 1993-09-03 1995-05-16 Motorola, Inc. Integrated circuit having passive circuit elements
US5378654A (en) * 1994-05-24 1995-01-03 United Microelectronics Corporation Self-aligned contact process
US5661064A (en) * 1995-11-13 1997-08-26 Micron Technology, Inc. Method of forming a capacitor having container members
US5637523A (en) * 1995-11-20 1997-06-10 Micron Technology, Inc. Method of forming a capacitor and a capacitor construction
US6218237B1 (en) 1996-01-03 2001-04-17 Micron Technology, Inc. Method of forming a capacitor
US5754390A (en) * 1996-01-23 1998-05-19 Micron Technology, Inc. Integrated capacitor bottom electrode for use with conformal dielectric
DE19640211A1 (de) * 1996-09-30 1998-04-02 Siemens Ag Verfahren zur Herstellung barrierenfreier Halbleiterspeicheranordnungen
US6054340A (en) * 1997-06-06 2000-04-25 Motorola, Inc. Method for forming a cavity capable of accessing deep fuse structures and device containing the same
US5970358A (en) * 1997-06-30 1999-10-19 Micron Technology, Inc. Method for forming a capacitor wherein the first capacitor plate includes electrically coupled conductive layers separated by an intervening insulative layer
US6027969A (en) * 1998-06-04 2000-02-22 Taiwan Semiconductor Manufacturing Company Capacitor structure for a dynamic random access memory cell
US6228699B1 (en) * 1998-12-14 2001-05-08 Taiwan Semiconductor Manufacturing Company Cross leakage of capacitors in DRAM or embedded DRAM
US6214687B1 (en) 1999-02-17 2001-04-10 Micron Technology, Inc. Method of forming a capacitor and a capacitor construction
GB2367428B (en) * 2001-12-19 2002-10-09 Zarlink Semiconductor Ltd Integrated circuit
US6897508B2 (en) * 2002-05-01 2005-05-24 Sundew Technologies, Llc Integrated capacitor with enhanced capacitance density and method of fabricating same
US9530834B1 (en) * 2015-12-13 2016-12-27 United Microelectronics Corp. Capacitor and method for fabricating the same
US11508719B2 (en) * 2019-05-13 2022-11-22 Ememory Technology Inc. Electrostatic discharge circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4475118A (en) * 1978-12-21 1984-10-02 National Semiconductor Corporation Dynamic MOS RAM with storage cells having a mainly insulated first plate
US4403394A (en) * 1980-12-17 1983-09-13 International Business Machines Corporation Formation of bit lines for ram device
JPS61183952A (ja) * 1985-02-09 1986-08-16 Fujitsu Ltd 半導体記憶装置及びその製造方法
JPH0682783B2 (ja) * 1985-03-29 1994-10-19 三菱電機株式会社 容量およびその製造方法
US4855801A (en) * 1986-08-22 1989-08-08 Siemens Aktiengesellschaft Transistor varactor for dynamics semiconductor storage means
JPH01154551A (ja) * 1987-12-11 1989-06-16 Oki Electric Ind Co Ltd 半導体メモリ集積回路装置及びその製造方法
EP0370407A1 (de) * 1988-11-18 1990-05-30 Nec Corporation Halbleiterspeicherbauteil vom Typ 1-transistor-1-Kondensator-Speicherzelle
JP2950550B2 (ja) * 1989-07-03 1999-09-20 沖電気工業株式会社 半導体記憶装置の製造方法

Also Published As

Publication number Publication date
EP0430404B1 (de) 1994-12-14
JP2798300B2 (ja) 1998-09-17
EP0430404A1 (de) 1991-06-05
US5116776A (en) 1992-05-26
DE69015135T2 (de) 1995-06-14
KR910010751A (ko) 1991-06-29
JPH03209868A (ja) 1991-09-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee