ITMI922067A1 - Dispositivo di memoria a semiconduttore con un elettrodo di immagazzinamento avente una molteplicita' di microsolchi e/o una molteplicita' di microcilindri - Google Patents

Dispositivo di memoria a semiconduttore con un elettrodo di immagazzinamento avente una molteplicita' di microsolchi e/o una molteplicita' di microcilindri

Info

Publication number
ITMI922067A1
ITMI922067A1 IT002067A ITMI922067A ITMI922067A1 IT MI922067 A1 ITMI922067 A1 IT MI922067A1 IT 002067 A IT002067 A IT 002067A IT MI922067 A ITMI922067 A IT MI922067A IT MI922067 A1 ITMI922067 A1 IT MI922067A1
Authority
IT
Italy
Prior art keywords
multiplicity
microsolks
microcylinders
memory device
semiconductor memory
Prior art date
Application number
IT002067A
Other languages
English (en)
Inventor
Dae-Je Chin
Tae-Young Chung
Young-Woo Park
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI922067A0 publication Critical patent/ITMI922067A0/it
Publication of ITMI922067A1 publication Critical patent/ITMI922067A1/it
Application granted granted Critical
Publication of IT1256130B publication Critical patent/IT1256130B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
ITMI922067A 1991-09-07 1992-09-04 Dispositivo di memoria a semiconduttore con un elettrodo di immagazzinamento avente una molteplicita' di microsolchi e/o una molteplicita' di microcilindri IT1256130B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR910015626 1991-09-07
KR920005409 1992-03-31

Publications (3)

Publication Number Publication Date
ITMI922067A0 ITMI922067A0 (it) 1992-09-04
ITMI922067A1 true ITMI922067A1 (it) 1994-03-04
IT1256130B IT1256130B (it) 1995-11-29

Family

ID=26628732

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI922067A IT1256130B (it) 1991-09-07 1992-09-04 Dispositivo di memoria a semiconduttore con un elettrodo di immagazzinamento avente una molteplicita' di microsolchi e/o una molteplicita' di microcilindri

Country Status (6)

Country Link
JP (1) JP2690434B2 (it)
DE (1) DE4229837C2 (it)
FR (1) FR2681178A1 (it)
GB (1) GB2259406B (it)
IT (1) IT1256130B (it)
TW (1) TW222710B (it)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960002097B1 (ko) * 1992-02-28 1996-02-10 삼성전자주식회사 반도체장치의 커패시터 제조방법
US5254503A (en) * 1992-06-02 1993-10-19 International Business Machines Corporation Process of making and using micro mask
JPH0774268A (ja) * 1993-07-07 1995-03-17 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
US5383088A (en) * 1993-08-09 1995-01-17 International Business Machines Corporation Storage capacitor with a conducting oxide electrode for metal-oxide dielectrics
US5512768A (en) * 1994-03-18 1996-04-30 United Microelectronics Corporation Capacitor for use in DRAM cell using surface oxidized silicon nodules
US5869368A (en) * 1997-09-22 1999-02-09 Yew; Tri-Rung Method to increase capacitance
KR100675275B1 (ko) 2004-12-16 2007-01-26 삼성전자주식회사 반도체 장치 및 이 장치의 패드 배치방법
TWI295822B (en) 2006-03-29 2008-04-11 Advanced Semiconductor Eng Method for forming a passivation layer
FR2988712B1 (fr) 2012-04-02 2014-04-11 St Microelectronics Rousset Circuit integre equipe d'un dispositif de detection de son orientation spatiale et/ou d'un changement de cette orientation.
FR2998417A1 (fr) 2012-11-16 2014-05-23 St Microelectronics Rousset Procede de realisation d'un element pointu de circuit integre, et circuit integre correspondant
US11825645B2 (en) 2020-06-04 2023-11-21 Etron Technology, Inc. Memory cell structure
JP7339319B2 (ja) * 2021-12-03 2023-09-05 ▲ゆ▼創科技股▲ふん▼有限公司 メモリセル構造

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63240057A (ja) * 1987-03-27 1988-10-05 Fujitsu Ltd スタツク型キヤパシタ
JPH01282855A (ja) * 1988-05-09 1989-11-14 Mitsubishi Electric Corp 半導体基板上にキャパシタを形成する方法
JPH03165552A (ja) * 1989-11-24 1991-07-17 Sony Corp スタックトキャパシタ型dramとその製造方法
JPH03166730A (ja) * 1989-11-27 1991-07-18 Seiko Instr Inc 半導体装置の製造方法
DD299990A5 (de) * 1990-02-23 1992-05-14 Dresden Forschzentr Mikroelek Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung
US5049517A (en) * 1990-11-07 1991-09-17 Micron Technology, Inc. Method for formation of a stacked capacitor
US5037773A (en) * 1990-11-08 1991-08-06 Micron Technology, Inc. Stacked capacitor doping technique making use of rugged polysilicon
KR930009583B1 (ko) * 1990-11-29 1993-10-07 삼성전자 주식회사 융모모양의 커패시터구조를 가진 반도체 메모리장치의 제조방법
JPH04207066A (ja) * 1990-11-30 1992-07-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
KR930009593B1 (ko) * 1991-01-30 1993-10-07 삼성전자 주식회사 고집적 반도체 메모리장치 및 그 제조방법(HCC Cell)
KR940005288B1 (ko) * 1991-07-11 1994-06-15 금성일렉트론 주식회사 반도체 장치의 제조방법

Also Published As

Publication number Publication date
GB9218898D0 (en) 1992-10-21
DE4229837C2 (de) 1996-07-11
JP2690434B2 (ja) 1997-12-10
GB2259406B (en) 1996-05-01
TW222710B (it) 1994-04-21
JPH05198745A (ja) 1993-08-06
ITMI922067A0 (it) 1992-09-04
GB2259406A (en) 1993-03-10
IT1256130B (it) 1995-11-29
FR2681178A1 (fr) 1993-03-12
FR2681178B1 (it) 1997-02-07
DE4229837A1 (de) 1993-03-11

Similar Documents

Publication Publication Date Title
ITMI932200A0 (it) Dispositivo a semiconduttore per permettere una semplice rivelazione esterna dell'utilizzo di un circuito ridondante e relativo dispositivo di memoria a semiconduttore
DE69228905T4 (de) Halbleiterspeichergerät
IT1277968B1 (it) Procedimento ed apparecchio per la selezione e la gestione di attributi personali con l'impiego di una memoria di preferenze
DE69428652T2 (de) Halbleiterspeicher mit mehreren Banken
DE69333796D1 (de) Halbleiterspeicher
DE69328342D1 (de) Halbleiterspeicherzelle
IT1259545B (it) Dirigibile con una struttura portante composta di una pluralita' di ordinate e longheroni
DE69326310D1 (de) Halbleiterspeichervorrichtung mit geteilter Wortleitungsstruktur
ITMI931390A1 (it) Dispositivo di memoria a semiconduttori avente una funzione di auto- ricarica
ITMI922067A1 (it) Dispositivo di memoria a semiconduttore con un elettrodo di immagazzinamento avente una molteplicita' di microsolchi e/o una molteplicita' di microcilindri
DE69215707D1 (de) Halbleiter-Speicherzelle
DE69331562T2 (de) Halbleiterspeicheranordnung
DE69414760T2 (de) Halbleiter-Speichervorrichtung
DE69224245D1 (de) Halbleiter-Speichereinrichtung
ITMI910316A0 (it) Procedimento e dispositivo per la formazione di una riserva di filo su una bobina a filo incrociato
DE69324124T2 (de) Regalbedienungsgerät
ITMI931871A1 (it) Circuito amplificatore perfezionato e dispositivo di memoria a semiconduttore impiegando lo stesso
DE69330505T2 (de) Halbleiterspeichergerät mit Redundanz
ITMI930115A1 (it) Scaffalatore
ITMI921295A0 (it) Dispositivo di memoria a semiconduttore e procedimento per la sua fabbricazione
ITMI912808A0 (it) Dispositivo di memoria a semiconduttore
DE69214313T2 (de) Halbleiter-Speichereinrichtung
DE69414452T2 (de) Halbleiterspeichergerät
IT1274305B (it) Dispositivo a semiconduttore di memoria
DE69327125D1 (de) Halbleiterspeicher

Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970926