DE3886315D1 - Halbleiteranordnungen mit supraleitenden Verbindungen. - Google Patents
Halbleiteranordnungen mit supraleitenden Verbindungen.Info
- Publication number
- DE3886315D1 DE3886315D1 DE88308145T DE3886315T DE3886315D1 DE 3886315 D1 DE3886315 D1 DE 3886315D1 DE 88308145 T DE88308145 T DE 88308145T DE 3886315 T DE3886315 T DE 3886315T DE 3886315 D1 DE3886315 D1 DE 3886315D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor devices
- superconducting compounds
- superconducting
- compounds
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 150000001875 compounds Chemical class 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49888—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing superconducting material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76891—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by using superconducting materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53285—Conductive materials containing superconducting materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02371—Disposition of the redistribution layers connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13008—Bump connector integrally formed with a redistribution layer on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S505/00—Superconductor technology: apparatus, material, process
- Y10S505/825—Apparatus per se, device per se, or process of making or operating same
- Y10S505/917—Mechanically manufacturing superconductor
- Y10S505/918—Mechanically manufacturing superconductor with metallurgical heat treating
- Y10S505/919—Reactive formation of superconducting intermetallic compound
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S505/00—Superconductor technology: apparatus, material, process
- Y10S505/825—Apparatus per se, device per se, or process of making or operating same
- Y10S505/917—Mechanically manufacturing superconductor
- Y10S505/922—Making josephson junction device
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S505/00—Superconductor technology: apparatus, material, process
- Y10S505/825—Apparatus per se, device per se, or process of making or operating same
- Y10S505/917—Mechanically manufacturing superconductor
- Y10S505/923—Making device having semiconductive component, e.g. integrated circuit
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/094,573 US4837609A (en) | 1987-09-09 | 1987-09-09 | Semiconductor devices having superconducting interconnects |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3886315D1 true DE3886315D1 (de) | 1994-01-27 |
DE3886315T2 DE3886315T2 (de) | 1994-04-21 |
Family
ID=22245958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88308145T Expired - Lifetime DE3886315T2 (de) | 1987-09-09 | 1988-09-02 | Halbleiteranordnungen mit supraleitenden Verbindungen. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4837609A (de) |
EP (1) | EP0307147B1 (de) |
JP (1) | JPH0199242A (de) |
CA (1) | CA1279935C (de) |
DE (1) | DE3886315T2 (de) |
Families Citing this family (67)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR950010206B1 (ko) * | 1987-03-09 | 1995-09-11 | 가부시끼가이샤 한도다이 에네르기 겐꾸쇼 | 전자 장치 및 그 제조 방법 |
DE3810494C2 (de) * | 1987-03-27 | 1998-08-20 | Hitachi Ltd | Integrierte Halbleiterschaltungseinrichtung mit supraleitender Schicht |
US5274268A (en) * | 1987-04-01 | 1993-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit having superconducting layered structure |
AU599223B2 (en) * | 1987-04-15 | 1990-07-12 | Semiconductor Energy Laboratory Co. Ltd. | Superconducting ceramic pattern and its manufacturing method |
US5227361A (en) * | 1987-05-06 | 1993-07-13 | Semiconductor Energy Laboratory Co., Ltd. | Oxide superconducting lead for interconnecting device component with a semiconductor substrate via at least one buffer layer |
US5212150A (en) * | 1987-05-06 | 1993-05-18 | Semiconductor Energy Laboratory Co., Ltd. | Oxide superconducting lead for interconnecting device component with a semiconductor substrate via at least one buffer layer |
JPS63314850A (ja) * | 1987-06-18 | 1988-12-22 | Fujitsu Ltd | 半導体装置 |
KR920000829B1 (ko) * | 1987-07-21 | 1992-01-30 | 스미도모덴기고오교오 가부시가가이샤 | 반도체 장치 |
CN1017110B (zh) * | 1987-08-13 | 1992-06-17 | 株式会社半导体能源研究所 | 一种超导器件 |
JPH0831458B2 (ja) * | 1987-09-08 | 1996-03-27 | 三菱電機株式会社 | 超電導配線集積回路 |
EP0314484B1 (de) * | 1987-10-27 | 1994-07-13 | Kabushiki Kaisha Toshiba | Supraleiterelement und Verfahren zu seiner Herstellung |
US4980338A (en) * | 1987-11-16 | 1990-12-25 | Semiconductor Energy Laboratory Co., Ltd. | Method of producing superconducting ceramic patterns by etching |
US5132775A (en) * | 1987-12-11 | 1992-07-21 | Texas Instruments Incorporated | Methods for and products having self-aligned conductive pillars on interconnects |
US5221660A (en) * | 1987-12-25 | 1993-06-22 | Sumitomo Electric Industries, Ltd. | Semiconductor substrate having a superconducting thin film |
DE3888341T2 (de) * | 1987-12-26 | 1994-09-01 | Sumitomo Electric Industries | Halbleitersubstrat mit einem supraleitenden Dünnfilm. |
US5296458A (en) * | 1988-02-03 | 1994-03-22 | International Business Machines Corporation | Epitaxy of high Tc superconducting films on (001) silicon surface |
EP0327121A3 (de) * | 1988-02-05 | 1990-01-10 | Hitachi, Ltd. | Supraleitender Feldeffekt-Transistor |
NL8801032A (nl) * | 1988-04-21 | 1989-11-16 | Philips Nv | Inrichting en werkwijze voor het vervaardigen van een inrichting. |
JPH01298765A (ja) * | 1988-05-27 | 1989-12-01 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US5550389A (en) * | 1988-11-28 | 1996-08-27 | Hitachi, Ltd. | Superconducting device |
EP0375465B1 (de) * | 1988-12-23 | 1996-02-14 | Nippon Steel Corporation | Supraleitende strahlungsempfindliche Vorrichtung mit Tunnelübergang, und Josephson Element |
DE69026301T2 (de) * | 1989-05-12 | 1996-09-05 | Matsushita Electric Ind Co Ltd | Supraleitende Einrichtung und deren Herstellungsverfahren |
AU5674790A (en) * | 1989-05-15 | 1990-12-18 | University Of Houston, The | Magnetic effect transistor |
JP3015408B2 (ja) * | 1989-05-23 | 2000-03-06 | 三洋電機株式会社 | 超電導トランジスタの製造方法 |
US5252548A (en) * | 1989-06-09 | 1993-10-12 | Oki Electric Industry Co., Ltd. | Method of forming an oxide superconductor/semiconductor junction |
JPH0332074A (ja) * | 1989-06-29 | 1991-02-12 | Sumitomo Electric Ind Ltd | 超電導デバイス |
EP0413333A3 (en) * | 1989-08-18 | 1991-07-24 | Hitachi, Ltd. | A superconductized semiconductor device |
JPH0710005B2 (ja) * | 1989-08-31 | 1995-02-01 | アメリカン テレフォン アンド テレグラフ カムパニー | 超伝導体相互接続装置 |
US5247189A (en) * | 1989-11-15 | 1993-09-21 | Sumitomo Electric Industries, Ltd. | Superconducting device composed of oxide superconductor material |
US5070391A (en) * | 1989-11-30 | 1991-12-03 | Sgs-Thomson Microelectronics, Inc. | Semiconductor contact via structure and method |
US6774463B1 (en) | 1990-02-01 | 2004-08-10 | International Business Machines Corporation | Superconductor gate semiconductor channel field effect transistor |
JP2503091B2 (ja) * | 1990-03-14 | 1996-06-05 | 富士通株式会社 | 超電導光機能素子 |
US5358925A (en) * | 1990-04-18 | 1994-10-25 | Board Of Trustees Of The Leland Stanford Junior University | Silicon substrate having YSZ epitaxial barrier layer and an epitaxial superconducting layer |
US5173474A (en) * | 1990-04-18 | 1992-12-22 | Xerox Corporation | Silicon substrate having an epitaxial superconducting layer thereon and method of making same |
US5280012A (en) * | 1990-07-06 | 1994-01-18 | Advanced Technology Materials Inc. | Method of forming a superconducting oxide layer by MOCVD |
US5225561A (en) * | 1990-07-06 | 1993-07-06 | Advanced Technology Materials, Inc. | Source reagent compounds for MOCVD of refractory films containing group IIA elements |
US5840897A (en) * | 1990-07-06 | 1998-11-24 | Advanced Technology Materials, Inc. | Metal complex source reagents for chemical vapor deposition |
US7323581B1 (en) | 1990-07-06 | 2008-01-29 | Advanced Technology Materials, Inc. | Source reagent compositions and method for forming metal films on a substrate by chemical vapor deposition |
US5453494A (en) * | 1990-07-06 | 1995-09-26 | Advanced Technology Materials, Inc. | Metal complex source reagents for MOCVD |
US5168072A (en) * | 1990-10-12 | 1992-12-01 | Texas Instruments Incorporated | Method of fabricating an high-performance insulated-gate field-effect transistor |
DE69225345T2 (de) * | 1991-01-10 | 1998-09-03 | Fujitsu Ltd | Eine Signalverarbeitungseinrichtung und ein Verfahren zum Übertragen von Signalen |
US5326986A (en) * | 1991-03-05 | 1994-07-05 | University Of Houston - University Park | Parallel N-junction superconducting interferometer with enhanced flux-to-voltage transfer function |
EP0591312B1 (de) * | 1991-06-24 | 1997-08-06 | Forschungszentrum Jülich Gmbh | Strukturierte leiterbahnen und verfahren zur herstellung derselben |
US5216282A (en) * | 1991-10-29 | 1993-06-01 | International Business Machines Corporation | Self-aligned contact studs for semiconductor structures |
US5304538A (en) * | 1992-03-11 | 1994-04-19 | The United States Of America As Repeated By The Administrator Of The National Aeronautics And Space Administration | Epitaxial heterojunctions of oxide semiconductors and metals on high temperature superconductors |
JPH08504541A (ja) * | 1992-12-15 | 1996-05-14 | イー・アイ・デユポン・ドウ・ヌムール・アンド・カンパニー | 電気的相互接続構造 |
US6051846A (en) * | 1993-04-01 | 2000-04-18 | The United States Of America As Represented By The Secretary Of The Navy | Monolithic integrated high-Tc superconductor-semiconductor structure |
JPH0786644A (ja) * | 1993-09-10 | 1995-03-31 | Fujitsu Ltd | 超伝導配線装置 |
GB9401357D0 (en) * | 1994-01-25 | 1994-03-23 | Hitachi Europ Ltd | Semiconductor junctions |
US5593918A (en) * | 1994-04-22 | 1997-01-14 | Lsi Logic Corporation | Techniques for forming superconductive lines |
US5482897A (en) * | 1994-07-19 | 1996-01-09 | Lsi Logic Corporation | Integrated circuit with on-chip ground plane |
US5693595A (en) * | 1995-06-06 | 1997-12-02 | Northrop Grumman Corporation | Integrated thin-film terminations for high temperature superconducting microwave components |
US5908813A (en) * | 1997-02-14 | 1999-06-01 | Micron Technology, Inc. | Method making integrated circuit metallization with superconductor BEOL wiring |
US6040618A (en) | 1997-03-06 | 2000-03-21 | Micron Technology, Inc. | Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming |
US6082610A (en) * | 1997-06-23 | 2000-07-04 | Ford Motor Company | Method of forming interconnections on electronic modules |
US6324754B1 (en) * | 1998-03-25 | 2001-12-04 | Tessera, Inc. | Method for fabricating microelectronic assemblies |
JP2001094094A (ja) * | 1999-09-21 | 2001-04-06 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2002026134A (ja) * | 2000-07-12 | 2002-01-25 | Seiko Epson Corp | 半導体集積回路の製造方法及びこの方法により製造した半導体集積回路 |
US7268065B2 (en) * | 2004-06-18 | 2007-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of manufacturing metal-silicide features |
US20070161150A1 (en) * | 2005-12-28 | 2007-07-12 | Intel Corporation | Forming ultra dense 3-D interconnect structures |
US8258057B2 (en) | 2006-03-30 | 2012-09-04 | Intel Corporation | Copper-filled trench contact for transistor performance improvement |
US8204564B2 (en) * | 2007-11-07 | 2012-06-19 | Brookhaven Science Associates, Llc | High temperature interfacial superconductivity |
US8860147B2 (en) * | 2007-11-26 | 2014-10-14 | Texas Instruments Incorporated | Semiconductor interconnect |
US20150179914A1 (en) * | 2013-12-23 | 2015-06-25 | Intermolecular Inc. | Annealed dielectrics and heat-tolerant conductors for superconducting electronics |
US10141493B2 (en) * | 2017-04-11 | 2018-11-27 | Microsoft Technology Licensing, Llc | Thermal management for superconducting interconnects |
EP3718142A4 (de) | 2017-11-30 | 2021-09-22 | Intel Corporation | Strukturierung von rippen für die herstellung einer integrierten schaltung |
WO2020160779A1 (en) * | 2019-02-07 | 2020-08-13 | Huawei Technologies Co., Ltd. | Semiconductor package with superconductive interconnections |
Family Cites Families (9)
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---|---|---|---|---|
US4141022A (en) * | 1977-09-12 | 1979-02-20 | Signetics Corporation | Refractory metal contacts for IGFETS |
US4507851A (en) * | 1982-04-30 | 1985-04-02 | Texas Instruments Incorporated | Process for forming an electrical interconnection system on a semiconductor |
JPS59121871A (ja) * | 1982-12-28 | 1984-07-14 | Toshiba Corp | 半導体装置 |
US4660061A (en) * | 1983-12-19 | 1987-04-21 | Sperry Corporation | Intermediate normal metal layers in superconducting circuitry |
JPS6427244A (en) * | 1987-04-08 | 1989-01-30 | Hitachi Ltd | Wiring construction of integrated circuit |
JPS63263745A (ja) * | 1987-04-22 | 1988-10-31 | Hitachi Ltd | 配線 |
CA1329952C (en) * | 1987-04-27 | 1994-05-31 | Yoshihiko Imanaka | Multi-layer superconducting circuit substrate and process for manufacturing same |
JPS63314850A (ja) * | 1987-06-18 | 1988-12-22 | Fujitsu Ltd | 半導体装置 |
JPS6413743A (en) * | 1987-07-08 | 1989-01-18 | Hitachi Ltd | Superconductive wiring structure |
-
1987
- 1987-09-09 US US07/094,573 patent/US4837609A/en not_active Expired - Lifetime
-
1988
- 1988-09-02 DE DE88308145T patent/DE3886315T2/de not_active Expired - Lifetime
- 1988-09-02 EP EP88308145A patent/EP0307147B1/de not_active Expired - Lifetime
- 1988-09-06 CA CA000576557A patent/CA1279935C/en not_active Expired - Lifetime
- 1988-09-09 JP JP63224874A patent/JPH0199242A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0307147A3 (en) | 1989-09-13 |
EP0307147A2 (de) | 1989-03-15 |
EP0307147B1 (de) | 1993-12-15 |
US4837609A (en) | 1989-06-06 |
DE3886315T2 (de) | 1994-04-21 |
JPH0199242A (ja) | 1989-04-18 |
CA1279935C (en) | 1991-02-05 |
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