DE3380047D1 - Ballistic heterojunction bipolar transistor - Google Patents

Ballistic heterojunction bipolar transistor

Info

Publication number
DE3380047D1
DE3380047D1 DE8383401740T DE3380047T DE3380047D1 DE 3380047 D1 DE3380047 D1 DE 3380047D1 DE 8383401740 T DE8383401740 T DE 8383401740T DE 3380047 T DE3380047 T DE 3380047T DE 3380047 D1 DE3380047 D1 DE 3380047D1
Authority
DE
Germany
Prior art keywords
ballistic
bipolar transistor
heterojunction bipolar
heterojunction
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383401740T
Other languages
English (en)
Inventor
David G Ankri
Lester F Eastman
Walter H Ku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ministere des PTT
Etat Francais
Original Assignee
Ministere des PTT
Etat Francais
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ministere des PTT, Etat Francais filed Critical Ministere des PTT
Application granted granted Critical
Publication of DE3380047D1 publication Critical patent/DE3380047D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • H01L29/7376—Resonant tunnelling transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
DE8383401740T 1982-09-17 1983-09-02 Ballistic heterojunction bipolar transistor Expired DE3380047D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US41929382A 1982-09-17 1982-09-17

Publications (1)

Publication Number Publication Date
DE3380047D1 true DE3380047D1 (en) 1989-07-13

Family

ID=23661636

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383401740T Expired DE3380047D1 (en) 1982-09-17 1983-09-02 Ballistic heterojunction bipolar transistor

Country Status (5)

Country Link
EP (1) EP0106724B1 (de)
JP (1) JPS59210669A (de)
AU (1) AU562454B2 (de)
CA (1) CA1213378A (de)
DE (1) DE3380047D1 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211267A (ja) * 1983-05-17 1984-11-30 Toshiba Corp ヘテロ接合バイポ−ラトランジスタ
WO1986001939A1 (en) * 1984-09-21 1986-03-27 American Telephone & Telegraph Company A novel semiconductor device
US4866488A (en) * 1985-03-29 1989-09-12 Texas Instruments Incorporated Ballistic transport filter and device
JPS6216569A (ja) * 1985-07-16 1987-01-24 Matsushita Electric Ind Co Ltd ヘテロ接合トランジスタおよびその製造方法
JPS6218762A (ja) * 1985-07-18 1987-01-27 Matsushita Electric Ind Co Ltd ヘテロ接合トランジスタおよびその製造方法
JPS6221272A (ja) * 1985-07-19 1987-01-29 Matsushita Electric Ind Co Ltd ヘテロ接合トランジスタの製造方法
JPS6249662A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6247158A (ja) * 1985-08-26 1987-02-28 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249656A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249661A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249657A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249658A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249659A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPS6249660A (ja) * 1985-08-29 1987-03-04 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JPH0611056B2 (ja) * 1985-12-03 1994-02-09 富士通株式会社 高速半導体装置
JPS6348863A (ja) * 1986-08-19 1988-03-01 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタの製造方法
DE3751781T2 (de) * 1986-08-12 1996-10-17 Canon Kk Festkörper-Elektronenstrahlerzeuger
JPS6348862A (ja) * 1986-08-19 1988-03-01 Matsushita Electric Ind Co Ltd ヘテロ接合バイポ−ラトランジスタの製造方法
DE3780284T2 (de) * 1986-12-22 1993-01-07 Nec Corp Bipolarer heterouebergangs-transistor mit ballistischem betrieb.
JPS63188969A (ja) * 1987-01-30 1988-08-04 Matsushita Electric Ind Co Ltd バイポ−ラトランジスタの製造方法
JPH0654780B2 (ja) * 1987-02-19 1994-07-20 松下電器産業株式会社 ヘテロ接合バイポーラトランジスタ
JPS63263761A (ja) * 1987-04-22 1988-10-31 Matsushita Electric Ind Co Ltd バイポ−ラトランジスタの製造方法
JP2624253B2 (ja) * 1987-05-07 1997-06-25 松下電器産業株式会社 バイポーラトランジスタの製造方法
JPH0682678B2 (ja) * 1987-05-07 1994-10-19 松下電器産業株式会社 バイポーラトランジスタの製造方法
JPH0824124B2 (ja) * 1987-07-24 1996-03-06 松下電器産業株式会社 バイポ−ラトランジスタの製造方法
JPH0824127B2 (ja) * 1987-07-24 1996-03-06 松下電器産業株式会社 バイポ−ラトランジスタの製造方法
JPH0824126B2 (ja) * 1987-07-24 1996-03-06 松下電器産業株式会社 バイポ−ラトランジスタおよびその製造方法
JPH0824125B2 (ja) * 1987-07-24 1996-03-06 松下電器産業株式会社 バイポ−ラトランジスタおよびその製造方法
US4821082A (en) * 1987-10-30 1989-04-11 International Business Machines Corporation Heterojunction bipolar transistor with substantially aligned energy levels
US5098853A (en) * 1988-11-02 1992-03-24 Hughes Aircraft Company Self-aligned, planar heterojunction bipolar transistor and method of forming the same
JP3299807B2 (ja) * 1993-04-07 2002-07-08 シャープ株式会社 ヘテロ接合バイポーラトランジスタ

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024592B2 (ja) * 1975-01-27 1985-06-13 株式会社日立製作所 ワイドギヤツプエミツタトランジスタの製造方法
US4366493A (en) * 1980-06-20 1982-12-28 International Business Machines Corporation Semiconductor ballistic transport device

Also Published As

Publication number Publication date
EP0106724B1 (de) 1989-06-07
EP0106724A3 (en) 1986-02-12
AU562454B2 (en) 1987-06-11
EP0106724A2 (de) 1984-04-25
JPH0586658B2 (de) 1993-12-13
JPS59210669A (ja) 1984-11-29
CA1213378A (en) 1986-10-28
AU1879183A (en) 1984-03-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee