DE2743955C3 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE2743955C3
DE2743955C3 DE2743955A DE2743955A DE2743955C3 DE 2743955 C3 DE2743955 C3 DE 2743955C3 DE 2743955 A DE2743955 A DE 2743955A DE 2743955 A DE2743955 A DE 2743955A DE 2743955 C3 DE2743955 C3 DE 2743955C3
Authority
DE
Germany
Prior art keywords
word line
transistor
potential
word
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2743955A
Other languages
German (de)
English (en)
Other versions
DE2743955A1 (de
DE2743955B2 (de
Inventor
Kunihiko Sayama Saitama Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2743955A1 publication Critical patent/DE2743955A1/de
Publication of DE2743955B2 publication Critical patent/DE2743955B2/de
Application granted granted Critical
Publication of DE2743955C3 publication Critical patent/DE2743955C3/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Electronic Switches (AREA)
DE2743955A 1976-09-29 1977-09-29 Halbleiterspeicher Expired DE2743955C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11585276A JPS5341968A (en) 1976-09-29 1976-09-29 Semiconductor circuit

Publications (3)

Publication Number Publication Date
DE2743955A1 DE2743955A1 (de) 1978-03-30
DE2743955B2 DE2743955B2 (de) 1979-01-25
DE2743955C3 true DE2743955C3 (de) 1985-11-14

Family

ID=14672724

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2743955A Expired DE2743955C3 (de) 1976-09-29 1977-09-29 Halbleiterspeicher

Country Status (4)

Country Link
US (1) US4156941A (US07935154-20110503-C00006.png)
JP (1) JPS5341968A (US07935154-20110503-C00006.png)
DE (1) DE2743955C3 (US07935154-20110503-C00006.png)
NL (1) NL178729C (US07935154-20110503-C00006.png)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051192B2 (ja) * 1978-04-27 1985-11-12 日本電気株式会社 半導体記憶装置
JPS5833634B2 (ja) * 1979-02-28 1983-07-21 富士通株式会社 メモリセルアレイの駆動方式
DE2929384C2 (de) * 1979-07-20 1981-07-30 Ibm Deutschland Gmbh, 7000 Stuttgart Nachladeschaltung für einen Halbleiterspeicher
JPS5831673B2 (ja) * 1979-08-22 1983-07-07 富士通株式会社 半導体記憶装置
JPS5637884A (en) * 1979-08-30 1981-04-11 Fujitsu Ltd Terminating circuit for word selective signal line of semiconductor memory unit
DE3071976D1 (en) * 1979-11-28 1987-07-02 Fujitsu Ltd Semiconductor memory circuit device
JPS5831674B2 (ja) * 1979-12-19 1983-07-07 株式会社日立製作所 メモリ
DE3004565C2 (de) * 1980-02-07 1984-06-14 Siemens AG, 1000 Berlin und 8000 München Integrierte digitale Halbleiterschaltung
US4357687A (en) * 1980-12-11 1982-11-02 Fairchild Camera And Instr. Corp. Adaptive word line pull down
JPS5841597B2 (ja) * 1980-12-24 1983-09-13 富士通株式会社 半導体メモリディスチャ−ジ回路
US4413191A (en) * 1981-05-05 1983-11-01 International Business Machines Corporation Array word line driver system
US4393476A (en) * 1981-07-13 1983-07-12 Fairchild Camera & Instrument Corp. Random access memory dual word line recovery circuitry
EP0077144B1 (en) * 1981-09-29 1986-01-29 Fujitsu Limited Multi-emitter transistor memory device with word-line discharge current source
JPS6052518B2 (ja) * 1981-12-18 1985-11-19 富士通株式会社 半導体記憶装置
US4477885A (en) * 1982-01-18 1984-10-16 Fairchild Camera & Instrument Corporation Current dump circuit for bipolar random access memories
JPS58147882A (ja) * 1982-02-27 1983-09-02 Fujitsu Ltd 半導体記憶装置のワ−ド線放電回路
US4604728A (en) * 1982-07-02 1986-08-05 Fujitsu Limited Semiconductor memory device
JPS5961842U (ja) * 1982-10-19 1984-04-23 セイレイ工業株式会社 穀粒選別装置
US4570240A (en) * 1983-12-29 1986-02-11 Motorola, Inc. AC Transient driver for memory cells
US4694429A (en) * 1984-11-29 1987-09-15 Kabushiki Kaisha Toshiba Semiconductor memory device
US5278795A (en) * 1987-03-27 1994-01-11 U.S. Philips Corporation Memory circuit having a line decoder with a Darlington-type switching stage and a discharge current source
JPH05205483A (ja) * 1992-01-23 1993-08-13 Sony Corp バイポーラｒａｍ回路
US5864507A (en) * 1996-12-18 1999-01-26 Cypress Semiconductor Corporation Dual level wordline clamp for reduced memory cell current
US8072834B2 (en) * 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3838404A (en) * 1973-05-17 1974-09-24 Teletype Corp Random access memory system and cell
GB1456608A (en) * 1973-08-23 1976-11-24 Ibm Read only memory
US3893087A (en) * 1974-02-08 1975-07-01 Gen Instrument Corp Random access memory with shared column conductors
DE2430784B2 (de) * 1974-06-26 1977-02-10 Siemens AG, 1000 Berlin und 8000 München Bipolarer halbleiterspeicher

Also Published As

Publication number Publication date
NL178729B (nl) 1985-12-02
JPS5712234B2 (US07935154-20110503-C00006.png) 1982-03-09
DE2743955A1 (de) 1978-03-30
NL178729C (nl) 1986-05-01
US4156941A (en) 1979-05-29
JPS5341968A (en) 1978-04-15
DE2743955B2 (de) 1979-01-25
NL7710688A (nl) 1978-03-31

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
8228 New agent

Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT., PAT.-ANW., 8000 MUENCHEN

8281 Inventor (new situation)

Free format text: HOMMA, NORIYUKI, KOKUBUNJI, TOKIO/TOKYO, JP YAMAGUCHI, KUNIHIKO, SAYAMA, SAITAMA, JP

C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee