DE19640271C1 - Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung - Google Patents
Verfahren zur Herstellung einer integrierten HalbleiterspeicheranordnungInfo
- Publication number
- DE19640271C1 DE19640271C1 DE19640271A DE19640271A DE19640271C1 DE 19640271 C1 DE19640271 C1 DE 19640271C1 DE 19640271 A DE19640271 A DE 19640271A DE 19640271 A DE19640271 A DE 19640271A DE 19640271 C1 DE19640271 C1 DE 19640271C1
- Authority
- DE
- Germany
- Prior art keywords
- electrode
- contact plugs
- electrode plates
- trench
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 230000015654 memory Effects 0.000 claims abstract description 61
- 239000003990 capacitor Substances 0.000 claims abstract description 30
- 239000004020 conductor Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 9
- 239000007772 electrode material Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 4
- 229910000510 noble metal Inorganic materials 0.000 claims description 2
- 210000004027 cell Anatomy 0.000 description 56
- 230000010354 integration Effects 0.000 description 4
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 210000001331 nose Anatomy 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 210000002105 tongue Anatomy 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 241000158147 Sator Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- HTXDPTMKBJXEOW-UHFFFAOYSA-N iridium(IV) oxide Inorganic materials O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 210000000352 storage cell Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19640271A DE19640271C1 (de) | 1996-09-30 | 1996-09-30 | Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung |
KR1019997002431A KR100326493B1 (ko) | 1996-09-30 | 1997-09-05 | 스택형 전극을 가진 dram 커패시터 및 그 제조 방법 |
DE59709521T DE59709521D1 (de) | 1996-09-30 | 1997-09-05 | Verfahren zur herstellung eines dram-kondensators mit gestapelten elektroden |
CNB97198381XA CN1160777C (zh) | 1996-09-30 | 1997-09-05 | 制造集成半导体存储装置的方法 |
JP51610398A JP3359644B2 (ja) | 1996-09-30 | 1997-09-05 | 集積半導体メモリ装置の製造方法 |
EP97942796A EP0931339B1 (de) | 1996-09-30 | 1997-09-05 | Verfahren zur herstellung eines dram-kondensators mit gestapelten elektroden |
PCT/DE1997/001965 WO1998015000A1 (de) | 1996-09-30 | 1997-09-05 | Dram-kondensator mit gestapelten elektroden und verfahren zur herstellung desselben |
TW086113734A TW364201B (en) | 1996-09-30 | 1997-09-22 | Method for the production of an integrated semiconductor memory arrangement |
US09/281,822 US6197633B1 (en) | 1996-09-30 | 1999-03-30 | Method for the production of an integrated semiconductor memory configuration |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19640271A DE19640271C1 (de) | 1996-09-30 | 1996-09-30 | Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE19640271C1 true DE19640271C1 (de) | 1998-03-05 |
Family
ID=7807421
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19640271A Expired - Fee Related DE19640271C1 (de) | 1996-09-30 | 1996-09-30 | Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung |
DE59709521T Expired - Fee Related DE59709521D1 (de) | 1996-09-30 | 1997-09-05 | Verfahren zur herstellung eines dram-kondensators mit gestapelten elektroden |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE59709521T Expired - Fee Related DE59709521D1 (de) | 1996-09-30 | 1997-09-05 | Verfahren zur herstellung eines dram-kondensators mit gestapelten elektroden |
Country Status (8)
Country | Link |
---|---|
US (1) | US6197633B1 (ja) |
EP (1) | EP0931339B1 (ja) |
JP (1) | JP3359644B2 (ja) |
KR (1) | KR100326493B1 (ja) |
CN (1) | CN1160777C (ja) |
DE (2) | DE19640271C1 (ja) |
TW (1) | TW364201B (ja) |
WO (1) | WO1998015000A1 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8154847B2 (en) * | 2008-09-12 | 2012-04-10 | Mediatek Inc. | Capacitor structure |
KR101652878B1 (ko) * | 2010-02-22 | 2016-09-01 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
JP2012221965A (ja) | 2011-04-04 | 2012-11-12 | Elpida Memory Inc | 半導体記憶装置及びその製造方法 |
JP2018157106A (ja) * | 2017-03-17 | 2018-10-04 | 東芝メモリ株式会社 | 記憶装置および容量素子 |
KR102423766B1 (ko) | 2017-07-26 | 2022-07-21 | 삼성전자주식회사 | 3차원 반도체 소자 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62179759A (ja) * | 1986-02-04 | 1987-08-06 | Fujitsu Ltd | 半導体記憶装置 |
US5290726A (en) * | 1991-02-18 | 1994-03-01 | Goldstar Electron Co., Ltd. | DRAM cells having stacked capacitors of fin structures and method of making thereof |
JPH06217959A (ja) * | 1993-01-26 | 1994-08-09 | Toshiba Corp | 磁気共鳴イメージングにおける位相エンコード量調整法 |
EP0657935A2 (en) * | 1993-12-08 | 1995-06-14 | Oki Electric Industry Co., Ltd. | Semiconductor memory device and method of making it |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0338061A (ja) * | 1989-07-05 | 1991-02-19 | Fujitsu Ltd | 半導体記憶装置 |
JPH03153074A (ja) * | 1989-11-10 | 1991-07-01 | Mitsubishi Electric Corp | 半導体装置 |
KR930007192B1 (ko) * | 1990-06-29 | 1993-07-31 | 삼성전자 주식회사 | 디램셀의 적층형캐패시터 및 제조방법 |
US5240871A (en) * | 1991-09-06 | 1993-08-31 | Micron Technology, Inc. | Corrugated storage contact capacitor and method for forming a corrugated storage contact capacitor |
US5631184A (en) * | 1992-03-13 | 1997-05-20 | Fujitsu Limited | Method of producing a semiconductor device having a fin type capacitor |
US5744833A (en) * | 1996-08-16 | 1998-04-28 | United Microelectronics Corporation | Semiconductor memory device having tree-type capacitor |
-
1996
- 1996-09-30 DE DE19640271A patent/DE19640271C1/de not_active Expired - Fee Related
-
1997
- 1997-09-05 CN CNB97198381XA patent/CN1160777C/zh not_active Expired - Fee Related
- 1997-09-05 JP JP51610398A patent/JP3359644B2/ja not_active Expired - Fee Related
- 1997-09-05 KR KR1019997002431A patent/KR100326493B1/ko not_active IP Right Cessation
- 1997-09-05 DE DE59709521T patent/DE59709521D1/de not_active Expired - Fee Related
- 1997-09-05 WO PCT/DE1997/001965 patent/WO1998015000A1/de active IP Right Grant
- 1997-09-05 EP EP97942796A patent/EP0931339B1/de not_active Expired - Lifetime
- 1997-09-22 TW TW086113734A patent/TW364201B/zh not_active IP Right Cessation
-
1999
- 1999-03-30 US US09/281,822 patent/US6197633B1/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62179759A (ja) * | 1986-02-04 | 1987-08-06 | Fujitsu Ltd | 半導体記憶装置 |
US5290726A (en) * | 1991-02-18 | 1994-03-01 | Goldstar Electron Co., Ltd. | DRAM cells having stacked capacitors of fin structures and method of making thereof |
JPH06217959A (ja) * | 1993-01-26 | 1994-08-09 | Toshiba Corp | 磁気共鳴イメージングにおける位相エンコード量調整法 |
EP0657935A2 (en) * | 1993-12-08 | 1995-06-14 | Oki Electric Industry Co., Ltd. | Semiconductor memory device and method of making it |
Also Published As
Publication number | Publication date |
---|---|
TW364201B (en) | 1999-07-11 |
KR20000048524A (ko) | 2000-07-25 |
DE59709521D1 (de) | 2003-04-17 |
CN1160777C (zh) | 2004-08-04 |
EP0931339A1 (de) | 1999-07-28 |
CN1231762A (zh) | 1999-10-13 |
EP0931339B1 (de) | 2003-03-12 |
KR100326493B1 (ko) | 2002-03-12 |
US6197633B1 (en) | 2001-03-06 |
WO1998015000A1 (de) | 1998-04-09 |
JP3359644B2 (ja) | 2002-12-24 |
JP2000503812A (ja) | 2000-03-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE102018120840B4 (de) | Halbleiterspeichervorrichtungen mit Stapelstruktur und Datenspeicherelement | |
DE4217443C2 (de) | Verfahren zur Herstellung einer DRAM-Anordnung | |
DE4041271C2 (de) | Halbleitervorrichtung mit einem ferroelektrischen Kondensator | |
DE102006018235B3 (de) | Halbleiterspeicherbauelement mit vertikal angeordneten Speicherzellen und Herstellungsverfahren | |
DE3929129C2 (ja) | ||
DE69118737T2 (de) | Dynamische Speicheranordnung mit wahlfreiem Zugriff mit Bitleitungen, die im Substrat vergraben sind | |
DE102005056427A1 (de) | Speicherzellenfeld | |
DE4215203A1 (de) | Speicherkondensator und verfahren zu dessen herstellung | |
EP1396026A2 (de) | Dram-zellenanordnung mit vertikalen mos-transistoren und verfahren zu deren herstellung | |
DE4201520A1 (de) | Verfahren zur herstellung einer dram-anordnung | |
DE3785317T2 (de) | Matrix hoher Packungsdichte aus dynamischen VMOS RAM. | |
DE102007008989B4 (de) | Herstellungsverfahren für eine integrierte Halbleiterspeichervorrichtung und entsprechende Halbleiterspeichervorrichtung | |
EP1535335B1 (de) | Halbleiterspeicher mit vertikalen speichertransistoren in einer zellenfeldanordnung mit 1 - 2f² - zellen | |
DE10258194A1 (de) | Halbleiterspeicher mit Charge-trapping-Speicherzellen und Herstellungsverfahren | |
WO2006029594A1 (de) | Halbleiterspeicherbauelement | |
DE19640271C1 (de) | Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung | |
EP0596975B1 (de) | Kompakte halbleiterspeicheranordnung und verfahren zu deren herstellung | |
DE60106256T2 (de) | Dynamische halbleiterspeicheranordnung mit wahlfreiem zugriff | |
DE102009016560B4 (de) | Integrierte Schaltung mit Kondensator, Chip mit derselben und Verfahren zum Herstellen des Kondensators | |
WO2002049113A1 (de) | Nichtflüchtige halbleiterspeicherzelle und verfahren zu deren herstellung | |
DE10057806B4 (de) | Ferroelektrische Speicheranordnung und Verfahren zu ihrer Herstellung | |
DE102005038939B4 (de) | Halbleiterspeicherbauelement mit oberseitig selbstjustiert angeordneten Wortleitungen und Verfahren zur Herstellung von Halbleiterspeicherbauelementen | |
DE10134101B4 (de) | Integrierter Halbleiterspeicher und Herstellungsverfahren | |
DE10058782B4 (de) | Verfahren zum Herstellen einer Kondensatoranordnung | |
DE102006031097B4 (de) | Speicherzellenanordnung und Verfahren zur Herstellung einer Speicherzellenanordnung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8100 | Publication of patent without earlier publication of application | ||
D1 | Grant (no unexamined application published) patent law 81 | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |