DE1814747C2 - Verfahren zum Herstellen von Feldefekttransistoren - Google Patents

Verfahren zum Herstellen von Feldefekttransistoren

Info

Publication number
DE1814747C2
DE1814747C2 DE1814747A DE1814747A DE1814747C2 DE 1814747 C2 DE1814747 C2 DE 1814747C2 DE 1814747 A DE1814747 A DE 1814747A DE 1814747 A DE1814747 A DE 1814747A DE 1814747 C2 DE1814747 C2 DE 1814747C2
Authority
DE
Germany
Prior art keywords
layer
semiconductor body
insulating layer
doped
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE1814747A
Other languages
German (de)
English (en)
Other versions
DE1814747A1 (de
Inventor
Dale Marius Schenectady N.Y. Brown
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of DE1814747A1 publication Critical patent/DE1814747A1/de
Application granted granted Critical
Publication of DE1814747C2 publication Critical patent/DE1814747C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/003—Anneal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/141—Self-alignment coat gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/923—Diffusion through a layer

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Weting (AREA)
  • Junction Field-Effect Transistors (AREA)
DE1814747A 1967-12-18 1968-12-14 Verfahren zum Herstellen von Feldefekttransistoren Expired DE1814747C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69148367A 1967-12-18 1967-12-18

Publications (2)

Publication Number Publication Date
DE1814747A1 DE1814747A1 (de) 1970-03-05
DE1814747C2 true DE1814747C2 (de) 1981-10-08

Family

ID=24776712

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1814747A Expired DE1814747C2 (de) 1967-12-18 1968-12-14 Verfahren zum Herstellen von Feldefekttransistoren

Country Status (7)

Country Link
US (1) US3541676A (enExample)
CH (1) CH490739A (enExample)
DE (1) DE1814747C2 (enExample)
FR (1) FR1599294A (enExample)
GB (1) GB1253820A (enExample)
NL (1) NL162790C (enExample)
SE (1) SE335578B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3804681A (en) * 1967-04-18 1974-04-16 Ibm Method for making a schottky-barrier field effect transistor
NL96608C (enExample) * 1969-10-03
US3670403A (en) * 1970-03-19 1972-06-20 Gen Electric Three masking step process for fabricating insulated gate field effect transistors
US3730787A (en) * 1970-08-26 1973-05-01 Bell Telephone Labor Inc Method of fabricating semiconductor integrated circuits using deposited doped oxides as a source of dopant impurities
US3824677A (en) * 1970-12-01 1974-07-23 Licentia Gmbh Method of manufacturing a field effect transistor
US3967981A (en) * 1971-01-14 1976-07-06 Shumpei Yamazaki Method for manufacturing a semiconductor field effort transistor
US3751314A (en) * 1971-07-01 1973-08-07 Bell Telephone Labor Inc Silicon semiconductor device processing
US3775197A (en) * 1972-01-05 1973-11-27 A Sahagun Method to produce high concentrations of dopant in silicon
US3798081A (en) * 1972-02-14 1974-03-19 Ibm Method for diffusing as into silicon from a solid phase
US4048350A (en) * 1975-09-19 1977-09-13 International Business Machines Corporation Semiconductor device having reduced surface leakage and methods of manufacture
US4317276A (en) * 1980-06-12 1982-03-02 Teletype Corporation Method of manufacturing an insulated gate field-effect transistor therefore in a silicon wafer

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3200019A (en) * 1962-01-19 1965-08-10 Rca Corp Method for making a semiconductor device
FR1373247A (fr) * 1962-09-07 1964-09-25 Rca Corp Dispositif semiconducteur et procédé pour la fabrication de ce dispositif
BE637064A (enExample) * 1962-09-07 Rca Corp
US3165430A (en) * 1963-01-21 1965-01-12 Siliconix Inc Method of ultra-fine semiconductor manufacture
US3417464A (en) * 1965-05-21 1968-12-24 Ibm Method for fabricating insulated-gate field-effect transistors
US3447238A (en) * 1965-08-09 1969-06-03 Raytheon Co Method of making a field effect transistor by diffusion,coating with an oxide and placing a metal layer on the oxide
US3426422A (en) * 1965-10-23 1969-02-11 Fairchild Camera Instr Co Method of making stable semiconductor devices
US3438873A (en) * 1966-05-11 1969-04-15 Bell Telephone Labor Inc Anodic treatment to alter solubility of dielectric films

Also Published As

Publication number Publication date
NL162790B (nl) 1980-01-15
FR1599294A (enExample) 1970-07-15
GB1253820A (en) 1971-11-17
SE335578B (enExample) 1971-06-01
US3541676A (en) 1970-11-24
CH490739A (de) 1970-05-15
NL162790C (nl) 1980-06-16
DE1814747A1 (de) 1970-03-05
NL6818214A (enExample) 1969-06-20

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Legal Events

Date Code Title Description
D2 Grant after examination
8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

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