DE10250204B8 - Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur - Google Patents

Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur Download PDF

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Publication number
DE10250204B8
DE10250204B8 DE10250204A DE10250204A DE10250204B8 DE 10250204 B8 DE10250204 B8 DE 10250204B8 DE 10250204 A DE10250204 A DE 10250204A DE 10250204 A DE10250204 A DE 10250204A DE 10250204 B8 DE10250204 B8 DE 10250204B8
Authority
DE
Germany
Prior art keywords
transistor structure
collector regions
producing collector
producing
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10250204A
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English (en)
Other versions
DE10250204A1 (de
DE10250204B4 (de
Inventor
Reinhard Dr. Stengl
Thomas Dr. Meister
Herbert Dr. Schäfer
Josef Dr. Böck
Martin Dr. Seck
Rudolf Dr. Lachner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10250204A priority Critical patent/DE10250204B8/de
Priority to TW092127880A priority patent/TWI241686B/zh
Priority to EP03775086A priority patent/EP1556892A1/de
Priority to PCT/DE2003/003552 priority patent/WO2004040643A1/de
Priority to SG200702951-5A priority patent/SG155055A1/en
Priority to JP2004547420A priority patent/JP4358113B2/ja
Priority to US10/532,894 priority patent/US7371650B2/en
Priority to KR1020057007449A priority patent/KR100725618B1/ko
Priority to CNB2003801023015A priority patent/CN1331213C/zh
Publication of DE10250204A1 publication Critical patent/DE10250204A1/de
Priority to US12/051,928 priority patent/US8003475B2/en
Application granted granted Critical
Publication of DE10250204B4 publication Critical patent/DE10250204B4/de
Publication of DE10250204B8 publication Critical patent/DE10250204B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0825Combination of vertical direct transistors of the same conductivity type having different characteristics,(e.g. Darlington transistors)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821Collector regions of bipolar transistors
DE10250204A 2002-10-28 2002-10-28 Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur Expired - Fee Related DE10250204B8 (de)

Priority Applications (10)

Application Number Priority Date Filing Date Title
DE10250204A DE10250204B8 (de) 2002-10-28 2002-10-28 Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur
TW092127880A TWI241686B (en) 2002-10-28 2003-10-07 Method for fabricating a transistor structure
KR1020057007449A KR100725618B1 (ko) 2002-10-28 2003-10-24 트랜지스터 구조체를 제조하는 방법
SG200702951-5A SG155055A1 (en) 2002-10-28 2003-10-24 Method for producing a transistor structure
JP2004547420A JP4358113B2 (ja) 2002-10-28 2003-10-24 トランジスタ構造の製造方法
US10/532,894 US7371650B2 (en) 2002-10-28 2003-10-24 Method for producing a transistor structure
EP03775086A EP1556892A1 (de) 2002-10-28 2003-10-24 Verfahren zur herstellung einer transistorstruktur
CNB2003801023015A CN1331213C (zh) 2002-10-28 2003-10-24 晶体管结构制造方法
PCT/DE2003/003552 WO2004040643A1 (de) 2002-10-28 2003-10-24 Verfahren zur herstellung einer transistorstruktur
US12/051,928 US8003475B2 (en) 2002-10-28 2008-03-20 Method for fabricating a transistor structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10250204A DE10250204B8 (de) 2002-10-28 2002-10-28 Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur

Publications (3)

Publication Number Publication Date
DE10250204A1 DE10250204A1 (de) 2004-05-13
DE10250204B4 DE10250204B4 (de) 2008-04-30
DE10250204B8 true DE10250204B8 (de) 2008-09-11

Family

ID=32103130

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10250204A Expired - Fee Related DE10250204B8 (de) 2002-10-28 2002-10-28 Verfahren zur Herstellung von Kollektorbereichen einer Transistorstruktur

Country Status (9)

Country Link
US (2) US7371650B2 (de)
EP (1) EP1556892A1 (de)
JP (1) JP4358113B2 (de)
KR (1) KR100725618B1 (de)
CN (1) CN1331213C (de)
DE (1) DE10250204B8 (de)
SG (1) SG155055A1 (de)
TW (1) TWI241686B (de)
WO (1) WO2004040643A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004055183B3 (de) * 2004-11-16 2006-07-13 Atmel Germany Gmbh Integrierte Schaltung und Verfahren zur Herstellung einer integrierten Schaltung auf einem Halbleiterplättchen
DE102006046727B4 (de) * 2006-10-02 2010-02-18 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleiterstruktur mit einem Varaktor und einem Hochfrequenztransistor
US7449389B2 (en) 2006-10-27 2008-11-11 Infineon Technologies Ag Method for fabricating a semiconductor structure
US8536012B2 (en) 2011-07-06 2013-09-17 International Business Machines Corporation Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases
US9093491B2 (en) 2012-12-05 2015-07-28 International Business Machines Corporation Bipolar junction transistors with reduced base-collector junction capacitance
US8956945B2 (en) 2013-02-04 2015-02-17 International Business Machines Corporation Trench isolation for bipolar junction transistors in BiCMOS technology
US8796149B1 (en) 2013-02-18 2014-08-05 International Business Machines Corporation Collector-up bipolar junction transistors in BiCMOS technology
US9761701B2 (en) 2014-05-01 2017-09-12 Infineon Technologies Ag Bipolar transistor
CN116403902B (zh) * 2023-06-08 2023-08-18 微龛(广州)半导体有限公司 一种垂直双极性结型晶体管及其制作方法

Citations (7)

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Publication number Priority date Publication date Assignee Title
DE2633569A1 (de) * 1975-07-31 1977-03-24 Nat Semiconductor Corp Transistor mit niedrigem kollektorbahnwiderstand in einer integrierten schaltung, sowie das zugehoerige herstellungsverfahren
US4379726A (en) * 1979-05-17 1983-04-12 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing semiconductor device utilizing outdiffusion and epitaxial deposition
JPS58159346A (ja) * 1982-03-17 1983-09-21 Mitsubishi Electric Corp 半導体集積回路装置
US4882294A (en) * 1988-08-17 1989-11-21 Delco Electronics Corporation Process for forming an epitaxial layer having portions of different thicknesses
EP0600276B1 (de) * 1992-12-04 1998-08-05 Siemens Aktiengesellschaft Verfahren zur Herstellung eines seitlich begrenzten, einkristallinen Gebietes mittels selektiver Epitaxie und dessen Anwendung zur Herstellung eines Bipolartransistors sowie eines MOS-transistors
US20020079554A1 (en) * 2000-12-25 2002-06-27 Shigeaki Okawa Semiconductor integrated circuit device and manufacturing method thereof
DE10044838C2 (de) * 2000-09-11 2002-08-08 Infineon Technologies Ag Halbleiterbauelement und Verfahren zur Herstellung eines solchen

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JPS4823812B1 (de) * 1967-05-02 1973-07-17
NL7314466A (nl) 1973-10-20 1975-04-22 Philips Nv Halfgeleiderinrichting.
JPS589354A (ja) 1981-07-08 1983-01-19 Toshiba Corp 半導体装置
JPS589356A (ja) 1981-07-08 1983-01-19 Toshiba Corp 半導体装置
JPS62154779A (ja) 1985-12-27 1987-07-09 Hitachi Ltd 半導体集積回路装置
JPS63313860A (ja) 1987-06-17 1988-12-21 Seiko Epson Corp 半導体装置
JPH05275437A (ja) 1992-03-24 1993-10-22 Fujitsu Ltd 半導体装置及びその製造方法
JP2570148B2 (ja) 1993-10-28 1997-01-08 日本電気株式会社 半導体装置
JPH0831841A (ja) * 1994-07-12 1996-02-02 Sony Corp 半導体装置及びその製造方法
US5719082A (en) * 1995-08-25 1998-02-17 Micron Technology, Inc. Angled implant to improve high current operation of bipolar transistors
WO1997017726A1 (en) * 1995-11-07 1997-05-15 National Semiconductor Corporation Low collector resistance bipolar transistor compatible with high voltage integrated circuits
JPH10284614A (ja) 1997-04-02 1998-10-23 Hitachi Ltd 半導体集積回路装置及びその製造方法
ATE459981T1 (de) * 2000-03-30 2010-03-15 Nxp Bv Halbleiterbauelement und dessen herstellungsverfahren
JP2002141419A (ja) 2000-11-06 2002-05-17 Texas Instr Japan Ltd 半導体装置
US6455919B1 (en) 2001-03-19 2002-09-24 International Business Machines Corporation Internally ballasted silicon germanium transistor
US20030082882A1 (en) * 2001-10-31 2003-05-01 Babcock Jeffrey A. Control of dopant diffusion from buried layers in bipolar integrated circuits
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Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2633569A1 (de) * 1975-07-31 1977-03-24 Nat Semiconductor Corp Transistor mit niedrigem kollektorbahnwiderstand in einer integrierten schaltung, sowie das zugehoerige herstellungsverfahren
US4379726A (en) * 1979-05-17 1983-04-12 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing semiconductor device utilizing outdiffusion and epitaxial deposition
JPS58159346A (ja) * 1982-03-17 1983-09-21 Mitsubishi Electric Corp 半導体集積回路装置
US4882294A (en) * 1988-08-17 1989-11-21 Delco Electronics Corporation Process for forming an epitaxial layer having portions of different thicknesses
EP0600276B1 (de) * 1992-12-04 1998-08-05 Siemens Aktiengesellschaft Verfahren zur Herstellung eines seitlich begrenzten, einkristallinen Gebietes mittels selektiver Epitaxie und dessen Anwendung zur Herstellung eines Bipolartransistors sowie eines MOS-transistors
DE10044838C2 (de) * 2000-09-11 2002-08-08 Infineon Technologies Ag Halbleiterbauelement und Verfahren zur Herstellung eines solchen
US20020079554A1 (en) * 2000-12-25 2002-06-27 Shigeaki Okawa Semiconductor integrated circuit device and manufacturing method thereof

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Title
"RF/Analog Applications". In: Digest of Technical Papers (CAT. No. 00CH37104), Symp. on VSLI Tech- nology, 2000, S. 154-155
"RF/Analog Applications". In: Digest of Technical Papers (CAT. No. 00CH37104), Symp. on VSLI Technology, 2000, S. 154-155 *
D. Widmann, H. Mader, H. Friedrich: "Technologie hochintegrierter Schaltungen". Springer Verlag, 2. Aufl., Tabelle 8.13, S. 326-334 *
E. Bertagnolli [u.a.]: "An SOI-Based High Perform- ance Self-Aligned Bipolar Technology Featuring 20 ps Gate-Delay and a 8.6 fJ Power Delay Pro- duct". In: Digest of Technical Papers (CAT. No. 93CH3303-5), Symp. on VLSI-Technologie, 1993, S. 63-64
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Patent Abstract of Japan & JP 58159346 A *
Patent Abstract of Japan: JP 58-159 346 A

Also Published As

Publication number Publication date
TWI241686B (en) 2005-10-11
DE10250204A1 (de) 2004-05-13
US20080227261A1 (en) 2008-09-18
TW200414434A (en) 2004-08-01
US7371650B2 (en) 2008-05-13
JP2006504276A (ja) 2006-02-02
US8003475B2 (en) 2011-08-23
KR100725618B1 (ko) 2007-06-07
CN1708847A (zh) 2005-12-14
JP4358113B2 (ja) 2009-11-04
CN1331213C (zh) 2007-08-08
US20060009002A1 (en) 2006-01-12
EP1556892A1 (de) 2005-07-27
DE10250204B4 (de) 2008-04-30
WO2004040643A1 (de) 2004-05-13
SG155055A1 (en) 2009-09-30
KR20050073594A (ko) 2005-07-14

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Legal Events

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ON Later submitted papers
OP8 Request for examination as to paragraph 44 patent law
8396 Reprint of erroneous front page
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee