DE102004063609A1 - Verfahren zur Herstellung einer nichtflüchtigen Speichervorrichtung - Google Patents
Verfahren zur Herstellung einer nichtflüchtigen Speichervorrichtung Download PDFInfo
- Publication number
- DE102004063609A1 DE102004063609A1 DE102004063609A DE102004063609A DE102004063609A1 DE 102004063609 A1 DE102004063609 A1 DE 102004063609A1 DE 102004063609 A DE102004063609 A DE 102004063609A DE 102004063609 A DE102004063609 A DE 102004063609A DE 102004063609 A1 DE102004063609 A1 DE 102004063609A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- gates
- oxide layer
- buffer
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 89
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 48
- 239000000758 substrate Substances 0.000 title claims abstract description 46
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 230000015654 memory Effects 0.000 title description 23
- 238000007667 floating Methods 0.000 claims abstract description 48
- 125000006850 spacer group Chemical group 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 108
- 238000005468 ion implantation Methods 0.000 claims description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 229920002472 Starch Polymers 0.000 claims 1
- 235000019698 starch Nutrition 0.000 claims 1
- 239000008107 starch Substances 0.000 claims 1
- 238000000151 deposition Methods 0.000 abstract description 12
- 238000000059 patterning Methods 0.000 abstract 2
- 230000008021 deposition Effects 0.000 description 8
- 229910021332 silicide Inorganic materials 0.000 description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 239000000615 nonconductor Substances 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- SQVRNKJHWKZAKO-PFQGKNLYSA-N N-acetyl-beta-neuraminic acid Chemical compound CC(=O)N[C@@H]1[C@@H](O)C[C@@](O)(C(O)=O)O[C@H]1[C@H](O)[C@H](O)CO SQVRNKJHWKZAKO-PFQGKNLYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004148 unit process Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020030101097A KR100603251B1 (ko) | 2003-12-31 | 2003-12-31 | 비휘발성 메모리 소자의 제조 방법 |
| KR10-2003-0101099 | 2003-12-31 | ||
| KR1020030101099A KR20050069147A (ko) | 2003-12-31 | 2003-12-31 | 비휘발성 메모리 소자의 제조 방법 |
| KR10-2003-0101097 | 2003-12-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE102004063609A1 true DE102004063609A1 (de) | 2005-10-13 |
Family
ID=34703453
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE102004063609A Withdrawn DE102004063609A1 (de) | 2003-12-31 | 2004-12-27 | Verfahren zur Herstellung einer nichtflüchtigen Speichervorrichtung |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7125771B2 (ja) |
| JP (1) | JP4502801B2 (ja) |
| DE (1) | DE102004063609A1 (ja) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100601915B1 (ko) * | 2003-12-31 | 2006-07-14 | 동부일렉트로닉스 주식회사 | 비휘발성 메모리 소자 |
| KR100620217B1 (ko) * | 2003-12-31 | 2006-09-11 | 동부일렉트로닉스 주식회사 | 비휘발성 메모리 소자의 제조 방법 |
| KR100599106B1 (ko) * | 2003-12-31 | 2006-07-12 | 동부일렉트로닉스 주식회사 | 비 휘발성 메모리 장치 및 그 구동방법 |
| JP2005259898A (ja) * | 2004-03-10 | 2005-09-22 | Toshiba Corp | 不揮発性半導体記憶装置 |
| KR100643468B1 (ko) * | 2005-12-01 | 2006-11-10 | 동부일렉트로닉스 주식회사 | 절연막 스페이서가 형성된 비휘발성 메모리 소자 및 그제조 방법 |
| KR100889545B1 (ko) * | 2006-09-12 | 2009-03-23 | 동부일렉트로닉스 주식회사 | 플래쉬 메모리 소자의 구조 및 동작 방법 |
| US8884358B2 (en) * | 2013-01-24 | 2014-11-11 | Freescale Semiconductor, Inc. | Method of making a non-volatile memory (NVM) cell structure |
| CN105551994B (zh) * | 2016-02-17 | 2018-03-23 | 上海华力微电子有限公司 | 一种验证快闪存储器隧穿氧化层可靠性的方法 |
| CN109148456B (zh) * | 2017-06-16 | 2021-09-14 | 中芯国际集成电路制造(北京)有限公司 | 一种半导体器件及其制作方法、电子装置 |
| CN111029252B (zh) * | 2019-12-24 | 2022-09-02 | 上海华虹宏力半导体制造有限公司 | 半导体器件及其制造方法 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09116119A (ja) * | 1995-10-13 | 1997-05-02 | Sony Corp | 不揮発性半導体記憶装置 |
| JP2910647B2 (ja) * | 1995-12-18 | 1999-06-23 | 日本電気株式会社 | 不揮発性半導体記憶装置の製造方法 |
| US6130132A (en) * | 1998-04-06 | 2000-10-10 | Taiwan Semiconductor Manufacturing Company | Clean process for manufacturing of split-gate flash memory device having floating gate electrode with sharp peak |
| US6093945A (en) | 1998-07-09 | 2000-07-25 | Windbond Electronics Corp. | Split gate flash memory with minimum over-erase problem |
| US6197639B1 (en) | 1998-07-13 | 2001-03-06 | Samsung Electronics Co., Ltd. | Method for manufacturing NOR-type flash memory device |
| JP2000311957A (ja) | 1999-04-27 | 2000-11-07 | Seiko Instruments Inc | 半導体装置 |
| JP4488565B2 (ja) * | 1999-12-03 | 2010-06-23 | 富士通株式会社 | 半導体記憶装置の製造方法 |
| KR100360496B1 (ko) * | 2000-04-15 | 2002-11-13 | 삼성전자 주식회사 | 이중 양자점 응용 단일 전자 다치 메모리 및 그 구동방법 |
| JP2002050703A (ja) * | 2000-08-01 | 2002-02-15 | Hitachi Ltd | 多値不揮発性半導体記憶装置 |
| US6714456B1 (en) | 2000-09-06 | 2004-03-30 | Halo Lsi, Inc. | Process for making and programming and operating a dual-bit multi-level ballistic flash memory |
| JP2002190536A (ja) * | 2000-10-13 | 2002-07-05 | Innotech Corp | 半導体記憶装置、その製造方法及び半導体記憶装置の駆動方法 |
| JP2002124584A (ja) * | 2000-10-13 | 2002-04-26 | Hitachi Ltd | 半導体集積回路装置および半導体集積回路装置の製造方法 |
| KR100381953B1 (ko) | 2001-03-16 | 2003-04-26 | 삼성전자주식회사 | 노어형 플래시 메모리 소자의 제조방법 |
| JP3726760B2 (ja) * | 2002-02-20 | 2005-12-14 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP2003249575A (ja) * | 2002-02-22 | 2003-09-05 | Seiko Epson Corp | 不揮発性記憶装置の製造方法 |
| JP3640186B2 (ja) * | 2002-03-06 | 2005-04-20 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP4424886B2 (ja) * | 2002-03-20 | 2010-03-03 | 富士通マイクロエレクトロニクス株式会社 | 半導体記憶装置及びその製造方法 |
| JP3664161B2 (ja) * | 2002-10-30 | 2005-06-22 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
| US6706599B1 (en) * | 2003-03-20 | 2004-03-16 | Motorola, Inc. | Multi-bit non-volatile memory device and method therefor |
| KR100608142B1 (ko) * | 2003-12-31 | 2006-08-02 | 동부일렉트로닉스 주식회사 | 비휘발성 메모리 소자의 제조 방법 |
-
2004
- 2004-12-27 DE DE102004063609A patent/DE102004063609A1/de not_active Withdrawn
- 2004-12-28 JP JP2004380316A patent/JP4502801B2/ja not_active Expired - Fee Related
- 2004-12-30 US US11/024,832 patent/US7125771B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20050142751A1 (en) | 2005-06-30 |
| JP2005197725A (ja) | 2005-07-21 |
| JP4502801B2 (ja) | 2010-07-14 |
| US7125771B2 (en) | 2006-10-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE10045019B4 (de) | Verfahren zur Herstellung einer nichtflüchtigen Halbleiterspeichervorrichtung | |
| DE102005018347B4 (de) | Flash-Speicherzelle, Flash-Speichervorrichtung und Herstellungsverfahren hierfür | |
| DE10328577B4 (de) | Nichtflüchtige Speicherzelle und Herstellungsverfahren | |
| DE102005014507B4 (de) | Halbleiterspeicher mit Ladungseinfangspeicherzellen und dessen Herstellungsverfahren | |
| DE69733630T2 (de) | EEPROM-und NVRAM-Niederspannungstransistoren und Verfahren zur Herstellung | |
| DE10141948B4 (de) | Halbleiterspeichervorrichtung und Herstellungsverfahren dafür | |
| DE112005000665B4 (de) | Ladungseinfangende Speicherzellenanordnung und Herstellungsverfahren | |
| DE102004030345A1 (de) | Mehrmulden-Bauelement und Herstellungsverfahren | |
| DE102005022306A1 (de) | Feldeffekttransistoren (FET) und Verfahren zum Herstellen von Feldeffekttransistoren | |
| DE102005012112A1 (de) | Ladungsgfangendes Speicherbauelement und Verfahren zur Herstellung | |
| DE10326771A1 (de) | Integrierte Speicherschaltung und Verfahren zum Bilden einer integrierten Speicherschaltung | |
| DE102006028954A1 (de) | Speichereinrichtung und Verfahren zur Herstellung einer Speichereinrichtung | |
| DE102006049613B4 (de) | Verfahren des Bildens von Reihen-Auswahltransistoren einer EEPROM-Vorrichtung vom NAND-Typ und damit gebildete Vorrichtungen | |
| DE102004063609A1 (de) | Verfahren zur Herstellung einer nichtflüchtigen Speichervorrichtung | |
| DE102005036548A1 (de) | Verfahren zur Herstellung eines Kontaktes in einem Flash-Speicher | |
| EP1623462B1 (de) | Bitleitungsstruktur sowie verfahren zu deren herstellung | |
| WO2004023553A2 (de) | Bitleitungsstruktur sowie verfahren zu deren herstellung | |
| DE10334547B4 (de) | Herstellungsverfahren für einen Grabenkondensator mit einem Isolationskragen, der über einen vergrabenen Kontakt einseitig mit einem Substrat elektrisch verbunden ist | |
| WO2004003979A2 (de) | Verfahren zur herstellung eines nrom-speicherzellenfeldes | |
| DE10338021A1 (de) | Vertikaler NROM und Verfahren zu dessen Herstellung | |
| DE10226964A1 (de) | Verfahren zur Herstellung einer NROM-Speicherzellenanordnung | |
| DE10351030A1 (de) | Transistorstruktur, Speicherzelle, DRAM und Verfahren zur Herstellung einer Transistorstruktur in einem Halbleitersubstrat | |
| DE102006048877B3 (de) | Verfahren zur Herstellung eines Halbleiterspeicherbauelementes und Halbleiterspeicherbauelement | |
| EP1623459B1 (de) | Bitleitungsstruktur sowie verfahren zu deren herstellung | |
| DE102004062861B4 (de) | Verfahren zur Herstellung eines nichtflüchtigen Speichers |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| 8181 | Inventor (new situation) |
Inventor name: JUNG, JIN HYO, BUCHEON, KYONGGI, KR |
|
| 8127 | New person/name/address of the applicant |
Owner name: DONGBU ELECTRONICS CO.,LTD., SEOUL/SOUL, KR |
|
| R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20130702 |