CN218587412U - 多层基板 - Google Patents

多层基板 Download PDF

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Publication number
CN218587412U
CN218587412U CN202190000370.9U CN202190000370U CN218587412U CN 218587412 U CN218587412 U CN 218587412U CN 202190000370 U CN202190000370 U CN 202190000370U CN 218587412 U CN218587412 U CN 218587412U
Authority
CN
China
Prior art keywords
electrode
insulating layer
interlayer connection
connection conductor
internal electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202190000370.9U
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English (en)
Chinese (zh)
Inventor
西尾恒亮
宗田和也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Application granted granted Critical
Publication of CN218587412U publication Critical patent/CN218587412U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0141—Liquid crystal polymer [LCP]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/015—Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
CN202190000370.9U 2020-04-07 2021-04-02 多层基板 Active CN218587412U (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020069181 2020-04-07
JP2020-069181 2020-04-07
PCT/JP2021/014329 WO2021206019A1 (ja) 2020-04-07 2021-04-02 多層基板およびその製造方法

Publications (1)

Publication Number Publication Date
CN218587412U true CN218587412U (zh) 2023-03-07

Family

ID=78023274

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202190000370.9U Active CN218587412U (zh) 2020-04-07 2021-04-02 多层基板

Country Status (4)

Country Link
US (1) US12063738B2 (https=)
JP (1) JP7294530B2 (https=)
CN (1) CN218587412U (https=)
WO (1) WO2021206019A1 (https=)

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3656484B2 (ja) * 1999-03-03 2005-06-08 株式会社村田製作所 セラミック多層基板の製造方法
JP4462473B2 (ja) * 2002-07-01 2010-05-12 富士通株式会社 高周波回路基板及びそれを用いた半導体装置
JP4323231B2 (ja) * 2003-06-20 2009-09-02 富士通マイクロエレクトロニクス株式会社 高周波伝送線路基板
JP2005072328A (ja) 2003-08-26 2005-03-17 Kyocera Corp 多層配線基板
DE602005023039D1 (de) * 2004-10-29 2010-09-30 Murata Manufacturing Co Mehrschichtiges substrat mit elektronischer komponente des chiptyps und herstellungsverfahren dafür
KR100890371B1 (ko) * 2004-10-29 2009-03-25 가부시키가이샤 무라타 세이사쿠쇼 세라믹 다층기판 및 그 제조방법
US7757196B2 (en) 2007-04-04 2010-07-13 Cisco Technology, Inc. Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards
WO2009069398A1 (ja) * 2007-11-30 2009-06-04 Murata Manufacturing Co., Ltd. セラミック複合多層基板及びその製造方法並びに電子部品
JP4957638B2 (ja) 2008-04-24 2012-06-20 イビデン株式会社 多層プリント配線板及び多層プリント配線板の製造方法
JP5293060B2 (ja) * 2008-10-02 2013-09-18 株式会社デンソー 多層回路基板およびその製造方法
JP5382225B2 (ja) * 2010-07-29 2014-01-08 株式会社村田製作所 セラミック多層基板およびその製造方法
CN103430639B (zh) 2011-03-17 2016-09-28 株式会社村田制作所 树脂多层基板
JP2018014387A (ja) * 2016-07-20 2018-01-25 住友電工ファインポリマー株式会社 基板、フレキシブルプリント配線板用基材、フレキシブルプリント配線板及び基板の製造方法
JP2018032659A (ja) 2016-08-22 2018-03-01 イビデン株式会社 プリント配線板およびプリント配線板の製造方法

Also Published As

Publication number Publication date
US20220418102A1 (en) 2022-12-29
US12063738B2 (en) 2024-08-13
JPWO2021206019A1 (https=) 2021-10-14
JP7294530B2 (ja) 2023-06-20
WO2021206019A1 (ja) 2021-10-14

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