CN1889255A - 包括具有高导热率的接点材料的电子元件封装件 - Google Patents

包括具有高导热率的接点材料的电子元件封装件 Download PDF

Info

Publication number
CN1889255A
CN1889255A CNA2005101086528A CN200510108652A CN1889255A CN 1889255 A CN1889255 A CN 1889255A CN A2005101086528 A CNA2005101086528 A CN A2005101086528A CN 200510108652 A CN200510108652 A CN 200510108652A CN 1889255 A CN1889255 A CN 1889255A
Authority
CN
China
Prior art keywords
electronic component
pcb
circuit board
printed circuit
contactor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005101086528A
Other languages
English (en)
Inventor
中村直章
吉村英明
福园健治
佐藤稔尚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of CN1889255A publication Critical patent/CN1889255A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3006—Ag as the principal constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/36—Selection of non-metallic compositions, e.g. coatings, fluxes; Selection of soldering or welding materials, conjoint with selection of non-metallic compositions, both selections being of interest
    • B23K35/3601—Selection of non-metallic compositions, e.g. coatings, fluxes; Selection of soldering or welding materials, conjoint with selection of non-metallic compositions, both selections being of interest with inorganic compounds as principal constituents
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/01—Layered products comprising a layer of metal all layers being exclusively metallic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/01—Layered products comprising a layer of metal all layers being exclusively metallic
    • B32B15/018—Layered products comprising a layer of metal all layers being exclusively metallic one layer being formed of a noble metal or a noble metal alloy
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C28/00—Alloys based on a metal not provided for in groups C22C5/00 - C22C27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Abstract

本发明涉及一种电子元件封装件，其包括：电子元件，其安装在印刷电路板上；导热构件，其容置在电子元件的表面上；接点材料，其插入在电子元件与导热构件之间。该接点材料由包含In以及3wt％以上的Ag的材料制成。发明人论证了随着接点材料的总重量中Ag含量的增加，接点材料与电子元件之间的界面以及接点材料与导热构件之间的界面处的空隙减少。与传统焊接材料相比，这种接点材料具有更高的导热率。这种接点材料使得导热构件可以有效地从电子元件吸收热量。

Description

包括具有高导热率的接点材料的电子元件封装件
技术领域
本发明涉及一种电子元件封装件，其包括：印刷电路板；诸如LSI(大规模集成电路)芯片之类的电子元件，其安装在该印刷电路板的上表面；以及导热构件，其容置(received)在该印刷电路板上的该电子元件的上表面。
背景技术
电子元件封装件通常包括安装在印刷电路板上的LSI芯片。诸如散热器(heat sink)之类的导热构件容置在LSI芯片的上表面。例如，如日本专利申请公开2000-012748中所公开的，接点材料(joint material)插入在散热器与LSI芯片之间。该接点材料由诸如焊接材料制成。例如，焊接材料采用锡/铅合金(Sn-Pb)。
将助焊剂等催化剂添加到诸如Sn-Pb之类的焊接材料中，以提高焊接材料的湿度。然而，这种将助焊剂加到焊接材料的做法导致沿接点材料与散热器以及接点材料与LSI芯片的接触面产生空隙。这些空隙使得接点材料与散热器之间的接触面积以及接点材料与LSI芯片之间的接触面积减小。该减小了的接触面积阻碍了从LSI芯片通过接点材料到散热器的有效热传递。
发明内容
因而，本发明的目的是提供一种能可靠地有助于热传递的电子元件封装件。另外，本发明的目的也是提供一种能极大地有助于实现电子元件封装件的联合组件(joined assembly)。
根据本发明，提供这样一种电子元件封装件，其包括：印刷电路板；电子元件，其安装在该印刷电路板的表面上；导热构件，其容置在该印刷电路板上的该电子元件的表面上；和接点材料，其插入在该电子元件与该导热构件之间，所述接点材料由包含In以及重量百分比(wt％)超过3％的Ag的材料制成。
该电子元件封装件使用由包含In以及3wt％以上的Ag的材料制成的接点材料。发明人论证了随着接点材料的总重量中Ag含量的增加，接点材料与电子元件之间的界面以及接点材料与导热构件之间的界面的空隙减少。而且，与传统的焊接材料，例如Sn-Pb，相比，包含In以及3wt％以上的Ag的材料呈现出更低的热阻。该接点材料比传统的焊接材料具有更高的导热率。因而，本发明的这种接点材料使得导热构件可以有效地从电子元件吸收热量。
尤其是，In具有低于铅(Pb)的弹性系数。即使基于导热构件与电子元件之间的热膨胀系数的不同而导致压力引入到导热构件与接点材料之间的界面以及接点材料与电子元件之间的界面，这种接点材料也能充分地可靠地吸收该压力。还能可靠地避免导热构件与接点材料之间的脱离以及接点材料与电子元件之间的脱离。
接点材料的熔点可以低于将电子元件连接至印刷电路板的端子的熔点。电子元件基于电子元件封装件组件(assembly)中的端子安装在印刷电路板上。端子会由于传递过来的热量而熔化。在电子元件安装在印刷电路板上之后，导热构件基于接点材料安装在电子元件上。接点材料会由于传递过来的热量而熔化。只要接点材料的熔点设置成低于端子的熔点，就能够可靠地使端子免受所谓的“二次熔化(secondary melting)”。
接点材料的熔点可以低于电子元件封装件中的电子元件的耐热温度。如上所述，当导热构件安装在电子元件上之后，接点材料会由于传递过来的热量而熔化。只要接点材料的熔点低于电子元件的耐热温度，即使在传递过来的热量使接点材料熔化时，仍可以避免电子元件的损坏。例如，接点材料的熔点也可以设置成低于印刷电路板的耐热温度。以此方式，即使在传递过来的热量使接点材料熔化时，仍可以避免印刷电路板的损坏。
包含In以及3wt％以上的Ag的材料在Ag的含量在接点材料的总重量中增加时，可以建立更高的液相线温度和固相线温度。可以根据将电子元件连接至印刷电路板的端子的熔点、电子元件的耐热温度以及印刷电路板的耐热温度等来控制接点材料中Ag的含量。例如，Ag含量可以设置在等于或低于接点材料的总重量的20wt％的范围内。
可以提供联合组件(joined assembly)以实现该电子元件封装件。该联合组件可以包括：第一构件，其表面上至少部分地出现(exposing)第一金属；第二构件，其表面上至少部分地出现第二金属，所述第二构件在该第二金属处容置在该第一金属上；以及接点材料，其插入在该第一金属与该第二金属之间，所述接点材料由包含In以及3wt％以上的Ag的材料制成。
附图说明
通过以下结合附图对优选实施例的说明，本发明的上述和其他目的、特征和优点将会变得显而易见，其中：
图1为母板(motherboard)结构的示意性透视图；
图2为沿图1的线2-2截取的截面图，用于示意性地示出电子元件封装件的结构；
图3为示出液相线、固相线与Ag的含量的关系的表格；
图4为根据比较示例接点材料与散热器之间的接触面的射线照片；
图5为根据第一特定示例接点材料与散热器之间的接触面的射线照片；
图6为根据第二特定示例接点材料与散热器之间的接触面的射线照片；
图7为根据第三特定示例接点材料与散热器之间的接触面的射线照片；
图8为根据第四特定示例接点材料与散热器之间的接触面的射线照片；
图9为表示接点材料的厚度与接点材料的热阻之间相互关系的坐标图。
具体实施方式
图1示意性地示出母板11的结构。母板11包括大尺寸印刷电路板12。一个或多个电子元件封装件13安装在印刷电路板12的正面上。各电子元件封装件13包括安装在印刷电路板12的正面上的小尺寸的印刷电路板14。例如，印刷电路板14可以使用树脂基板或陶瓷基板。
导热构件或散热器15容置在印刷电路板14上。散热器15包括板形主体或吸热器(heat receiver)15a和自吸热器15a沿垂直方向竖立的散热片15b。散热片15b互相平行地延伸。因此，在各相邻对散热片15b之间界定了气路16。当空气在例如鼓风机单元(未示出)的帮助下流经气路时，这种类型的电子元件封装件13可以有效地通过散热片15b散热。散热器15可以由Cu、Al、主要由Cu和/或Al组成的复合材料以及诸如碳复合材料之类的更高导热材料制成。可以通过铸造来形成散热器15。
如图2所示，在印刷电路板14的背面上形成有球栅阵列17。球栅阵列17用于将印刷电路板14安装到印刷电路板12的正面。球栅阵列17包括按照给定模式排列的多个球形导电端子18。各导电端子18容置在印刷电路板12上的相应的端子垫(terminal pad)或导电垫(electrically-conductive pad)19上。以此方式在印刷电路板14与印刷电路板12之间建立起电连接。例如，这里导电端子18可以由Sn-37Pb(wt％)制成。
电子元件或LSI芯片21安装在印刷电路板14上。在LSI芯片21的背面形成有球栅阵列22。球栅阵列22用于将LSI芯片21安装到印刷电路板14上。与球栅阵列17的方式相同，球栅阵列22包括按照给定模式排列的多个球形导电端子23。各导电端子23容置在印刷电路板14上的相应的端子垫或导电垫24上。以此方式在LSI芯片21与印刷电路板14之间建立起电连接。这里，例如，导电端子23可以由Sn-37Pb(wt％)制成。
例如，除了LSI芯片21，诸如电容器和芯片电阻器(二者均未示出)之类的电子元件可以安装在印刷电路板14上。例如，电子元件可以安装在印刷电路板14的背面。底层填料膜(underfill material film)25插入在LSI芯片21与印刷电路板14之间。底层填料膜25填充导电端子23周围的空间。以此方式能够可靠地使导电端子23互相绝缘。例如，底层填料膜25可以由主要包括环氧树脂的树脂材料制成。
上述散热器15容置在LSI芯片21的正面。接点材料26插入在散热器15与LSI芯片21之间。接点材料26可以由包含In以及3wt％以上的Ag的材料制成。这里，接点材料26由In-Ag合金制成。例如，Ag含量可以设置在等于或低于接点材料26的总重量的20wt％的范围内。
如图3所示，In-3Ag wt％合金具有141摄氏度的液相线温度和固相线温度。此温度相当于共晶温度(eutectic temperature)。接点材料中Ag含量的增加导致液相线温度高于141摄氏度。另一方面，即使接点材料中Ag含量增加，固相线温度仍保持在141摄氏度。因此，随着接点材料中Ag含量的增加，液相线温度与固相线温度之间的差增大。
再次参照图2，在LSI芯片21的正面上形成有第一金属或第一金属膜27。作为本发明的第一构件的LSI芯片21的正面至少部分地出现第一金属膜27。这里，第一金属膜27可以形成在LSI芯片21的整个正面上。例如，第一金属膜27可以由Ti膜和Au膜的层膜、Ti膜和Cu膜的层膜等制成。以此方式，LSI芯片21在该第一金属膜27处容置接点材料26。
散热器15的底面与LSI芯片21相对。在散热器15的该底面或该相对面上形成有第二金属或第二金属膜28。作为本发明的第二构件的散热器15的该相对面上至少部分地出现第二金属膜28。例如，第二金属膜28可以由Ni膜和Au膜的层膜制成。以此方式，接点材料26容置散热器15上的第二金属膜28。
以此方式，接点材料26插入在第一金属膜27与第二金属膜28之间。换言之，散热器15通过接点材料26使得第二金属膜28与LSI芯片21上的第一金属膜27相接通。这样，接点材料26用于将散热器15与LSI芯片21耦接。这里，根据本发明，作为第一构件的LSI芯片21、作为第二构件的散热器15以及接点材料26组合形成联合组件。
支撑构件29用于将散热器15固定至印刷电路板14。例如，支撑构件29可以由膨胀率与印刷电路板14的膨胀率近似的材料制成。这种材料可以是Cu、不锈钢等。例如，未示出的黏着片(adhesive sheet)插入在散热器15与支撑构件29之间以及插入在支撑构件29与印刷电路板14之间，以将散热器15固定到印刷电路板14上。例如，可使用环氧黏着片作为该黏着片。例如，该黏着片中可以包含玻璃纤维或无机填料。玻璃纤维或无机填料用于使黏着片的厚度保持均匀。
这种类型的母板11在工作中需经受LSI芯片21产生的热量。LSI芯片21的热量通过第一金属膜27、接点材料26以及第二金属膜28传递到散热器15的吸热器15a。然后，这些热量从吸热器15a传导到散热片15b。散热片15b用于建立能散热的更大面积的表面。例如，运行鼓风机单元以产生通过气路16的气流。以此方式，能够有效防止LSI芯片21温度升高。
下面，简要描述电子元件封装件13的制造方法。首先，准备印刷电路板14。印刷电路板14可以使用陶瓷基板或有机基板。例如，陶瓷基板或有机基板的厚度可以在0.4mm到0.7mm的范围内。例如，陶瓷基板中可以包含Al2O3、AlN或玻璃等材料。将支撑构件29固定在印刷电路板14的正面。将黏着片插入在印刷电路板14与支撑构件29之间，以将支撑构件29固定到印刷电路板14。支撑构件29抵靠在印刷电路板14的正面。例如，挤压力可以设置为等于或低于1.96×10-3[Pa]。
将LSI芯片21安装在印刷电路板14的正面。例如，可以使用Sn-37Sb等焊接材料作为导电端子23。多个导电端子23预先连接到LSI芯片21的底面上。各导电端子23置于导电垫24上。然后，热量传递给导电端子23。例如，温度的峰值设置为等于或低于230摄氏度。于是，导电端子23熔化。随后经冷却，导电端子23固化或硬化。以此方式，LSI芯片21安装在印刷电路板14上。
然后，将底层填料膜25插入在LSI芯片21与印刷电路板14之间。可以准备液态下的热固性树脂材料填充LSI芯片21与印刷电路板14之间的空间，用于制备底层填料膜25。树脂材料可以主要包含环氧树脂。例如，当150摄氏度的热量传递给树脂材料时，树脂材料被固化。以此方式，基于该固化的树脂材料，底层填料膜25形成在LSI芯片21与印刷电路板14之间。
在散热器15的该相对面的预定范围上覆盖该第二金属膜28。例如，在散热器15的该相对面上形成具有约3μm厚的Ni膜。然后，在Ni膜表面形成具有约0.3μm厚的Au膜。例如，使用电镀来形成Ni膜和Au膜。因此，Ni膜和Au膜构成上述的第二金属膜28。
在LSI芯片21的正面覆盖该第一金属膜27。例如，在LSI芯片21的正面形成具有约500nm厚的Ti膜。例如，然后在Ti膜表面形成具有约0.3μm厚的Au膜。例如，使用真空镀膜(sputtering)来形成Ti膜和Au膜。因此，在LSI芯片21的正面上的Ti膜和Au膜构成上述第一金属膜27。
例如，这里散热器15可以由无氧铜制成。由Ni膜和Au膜制成的第二金属膜28用于避免散热器15的该相对面的氧化。第一、第二二金属膜27、28用于提高接点材料26的湿度。
然后，将散热器15安装在LSI芯片21的正面。将接点材料26插入在第一、第二金属膜27、28之间，以将散热器15安装在LSI芯片21上。例如，接点材料26形成为片状。例如，这里接点材料26由In-10Ag制成。同时，将黏着片插入在散热器15与支撑构件29之间。支撑构件29抵靠在印刷电路板14的正面上。例如，挤压力可以设置为等于或低于1.96×10-3[Pa]。然后，热量传递给散热器15与LSI芯片21。于是，接点材料26熔化。随后经冷却，接点材料固化或硬化。以此方式，散热器15安装在LSI芯片21的正面。
随后，将导电端子18连接到印刷电路板14的背面。导电端子18由Sn-37Sb等焊接材料制成。热量传递给导电端子18。例如，温度的峰值设置在230摄氏度左右。于是，导电端子18熔化。随后经冷却，导电端子18固化或硬化。以此方式，导电端子18连接在印刷电路板14的背面。从而完成了电子元件封装件13的制造。然后，电子元件封装件13可以安装在印刷电路板12的正面。
在上述方式中，这种类型的电子元件封装件13使用由In-10Ag制成的接点材料26。因此使得接点材料26具有231摄氏度的液相线温度，从图3中可见。例如，由Sn-Pb37制成的导电端子18、23通常在等于或低于230摄氏度的温度范围内熔化。因此，即使当传递过来的热量使导电端子18、23熔化，也能够可靠地使接点材料26免受二次熔化。只要将接点材料26的液相线温度或熔点设置得高于导电端子18、23的熔点，可以消除在第一金属膜27中制备Ni膜。第一金属膜27的结构可以比以往更为简化。
另一方面，如果使用In-5Ag或In-7Ag作为接点材料26，可以使接点材料26具有160或200摄氏度的液相线温度，从图3中可见。换言之，将接点材料26的熔点设置成低于导电端子18、23的熔点。即使利用有机基板作为印刷电路板14，接点材料26也可以在印刷电路板14的耐热温度的温度范围内熔化。接点材料26也可以在电子元件即LSI芯片21的耐热温度的温度范围内熔化。以此方式，只要将接点材料26的熔点设置得低于导电端子18、23的熔点以及低于印刷电路板14和LSI芯片21的耐热温度，就可以避免导电端子18、23的二次熔化以及印刷电路板14和LSI芯片21的损坏。
例如，尤其是In具有低于Pb的弹性系数。In的弹性系数在Pb的弹性系数的四分之一到二分之一的范围内。即使基于散热器15与LSI芯片21之间的热膨胀系数的不同而导致压力引入到散热器15与接点材料16之间的界面以及引入到接点材料26与LSI芯片21之间的界面，接点材料26也能充分地可靠地吸收该压力。还能可靠地避免散热器15与接点材料26之间的脱离以及接点材料26与LSI芯片21之间的脱离。
接着，发明人观察了与接点材料26的组成相关联的空隙的产生。在该观察过程中，发明人准备了本发明的第一到第四示例以及一个比较示例。在第一示例中，使用In-5Ag形成接点材料26。在第二示例中，使用In-7Ag形成接点材料26。在第三示例中，使用In-10Ag形成接点材料26。在第四示例中，使用In-15Ag形成接点材料26。在比较示例中，使用In-3Ag形成接点材料。将第一到第四示例以及比较示例中的接点材料插入在散热器15与LSI芯片21之间。例如，在接点材料26与散热器15之间视觉观察它们的接触面。
如图4所示，在比较示例的接点材料的接触面中产生大量的空隙。如图5所示，与比较示例相比，在第一示例的接触面中产生较少量的空隙。与第一示例相比，如图6所示，在第二示例中空隙数量继续减少。如图7所示，在第三示例中空隙数量继续减少。如图8所示，在第四示例中的接触面上几乎难以观察到空隙。
上述观察表明随着接点材料26的总重量中Ag含量的增加，空隙数量减少。换言之，随着接点材料26中Ag含量的增加，接点材料26的湿度增加。从图3中可见，可以确认随着固相线温度与液相线温度之间的差增大，空隙减少。空隙数量的减少使得散热器15与接点材料26之间以及LSI芯片21与接点材料26之间能可靠地接触，而无需增加助焊剂等催化剂。因此，散热器15能有效地从LSI芯片21吸收热量。
接着，发明人测量了接点材料26的热阻。发明人为此测量准备了本发明的特定示例以及第一到第三比较示例。在此特定示例中使用In-10Ag。在第一比较示例中使用In-48Sn。在第二比较示例中使用Sn-20Pb。在第三比较示例中使用Sn-20Pb、Sn-95Pb以及Sn-20Pb的多层膜。对该特定示例以及第一到第三比较示例进行热阻测量[℃/W]。
该特定示例呈现出热阻等于0.0383[℃/W]。该第一比较示例获得0.0696[℃/W]的热阻。该第二比较示例获得0.0543[℃/W]的热阻。该第三比较示例呈现0.0545[℃/W]的热阻。该特定示例具有比该第一到第三比较示例更小的热阻。该特定示例的接点材料26具有比由传统焊接材料制成的接点材料更优的导热率。此测量结果表明这种类型的接点材料26能够可靠地将热量有效地从LSI芯片21传递给散热器15。
接着，发明人观察了接点材料26的厚度与热阻之间的关系。发明人为此观察准备了特定示例以及第一到第三比较示例。在此特定示例中使用In-10Ag。在第一比较示例中使用Sn-37Pb、Sn-95Pb以及Sn-37Pb的多层膜。在第二比较示例中使用Sn-20Pb。在第三比较示例中使用In-52Sn。发明人为特定示例以及第一到第三比较示例中的每个都准备了三个样本，分别具有100μm、200μm以及250μm的厚度。对这些示例的每个样本进行热阻测量[℃/W]。
如图9所示，对于任何样本，该特定示例均具有比第一到第三比较示例更小的热阻。这证实了该特定示例的接点材料26具有比由传统焊接材料制成的接点材料更优的导热率。因此，散热器15能够有效地从LSI芯片21吸收热量。

Claims (4)

1.一种电子元件封装件，其包括：
印刷电路板；
电子元件，其安装在该印刷电路板的表面上；
导热构件，其容置在该印刷电路板上的该电子元件的表而上；和接点材料，其插入在该电子元件与该导热构件之间，所述接点材料由包含In以及3wt％以上的Ag的材料制成。
2.如权利要求1所述的电子元件封装件，其中，所述接点材料的熔点低于将该电子元件连接至该印刷电路板的端子的熔点。
3.如权利要求1所述的电子元件封装件，其中，所述接点材料的熔点低于该电子元件的耐热温度。
4.一种联合组件，其包括：
第一构件，其表面上至少部分地出现第一金属；
第二构件，其表面上至少部分地出现第二金属，所述第二构件在该第二二金属处容置在该第一金属上；以及
接点材料，其插入在该第一金属与该第二金属之间，所述接点材料由包含In以及3wt％以上的Ag的材料制成。
CNA2005101086528A 2005-06-27 2005-10-10 包括具有高导热率的接点材料的电子元件封装件 Pending CN1889255A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005186004A JP2007005670A (ja) 2005-06-27 2005-06-27 電子部品パッケージおよび接合組立体
JP2005186004 2005-06-27

Publications (1)

Publication Number Publication Date
CN1889255A true CN1889255A (zh) 2007-01-03

Family

ID=37036788

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2005101086528A Pending CN1889255A (zh) 2005-06-27 2005-10-10 包括具有高导热率的接点材料的电子元件封装件

Country Status (6)

Country Link
US (1) US20070012477A1 (zh)
EP (1) EP1739743A3 (zh)
JP (1) JP2007005670A (zh)
KR (1) KR100755254B1 (zh)
CN (1) CN1889255A (zh)
TW (1) TWI276210B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108260273A (zh) * 2016-12-29 2018-07-06 盟创科技股份有限公司 网络通讯装置及其电子模组与散热基板结构

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5211457B2 (ja) * 2006-09-19 2013-06-12 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP4553032B2 (ja) * 2008-05-12 2010-09-29 株式会社デンソー 負荷駆動装置
JP5447175B2 (ja) 2010-05-17 2014-03-19 富士通セミコンダクター株式会社 半導体装置
US20120126387A1 (en) * 2010-11-24 2012-05-24 Lsi Corporation Enhanced heat spreader for use in an electronic device and method of manufacturing the same
JP5983032B2 (ja) * 2012-05-28 2016-08-31 富士通株式会社 半導体パッケージ及び配線基板ユニット
JP6036083B2 (ja) * 2012-09-21 2016-11-30 株式会社ソシオネクスト 半導体装置及びその製造方法並びに電子装置及びその製造方法
JP6056490B2 (ja) 2013-01-15 2017-01-11 株式会社ソシオネクスト 半導体装置とその製造方法
JP5796627B2 (ja) * 2013-12-27 2015-10-21 株式会社ソシオネクスト 半導体装置とその製造方法
US9401590B2 (en) * 2014-01-06 2016-07-26 Hamilton Sundstrand Corporation Heat sink for contactor in power distribution assembly

Family Cites Families (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4034469A (en) * 1976-09-03 1977-07-12 Ibm Corporation Method of making conduction-cooled circuit package
US4265775A (en) * 1979-08-16 1981-05-05 International Business Machines Corporation Non-bleeding thixotropic thermally conductive material
JPS6332956A (ja) * 1986-07-26 1988-02-12 Nec Corp パツケ−ジ
JPS63192250A (ja) * 1987-02-04 1988-08-09 Hitachi Ltd 熱伝導冷却モジユ−ル装置
US4869954A (en) * 1987-09-10 1989-09-26 Chomerics, Inc. Thermally conductive materials
US4914551A (en) * 1988-07-13 1990-04-03 International Business Machines Corporation Electronic package with heat spreader member
US5213715A (en) * 1989-04-17 1993-05-25 Western Digital Corporation Directionally conductive polymer
US5538789A (en) * 1990-02-09 1996-07-23 Toranaga Technologies, Inc. Composite substrates for preparation of printed circuits
US5213868A (en) * 1991-08-13 1993-05-25 Chomerics, Inc. Thermally conductive interface materials and methods of using the same
KR960003764B1 (ko) * 1992-03-06 1996-03-22 신꼬오 덴기 고오교오 가부시끼가이샤 전자부품용 패키지의 메탈벽 형성방법
JP3039584B2 (ja) * 1992-07-03 2000-05-08 株式会社日立製作所 半導体集積回路モジュールの組立方法
US5527998A (en) * 1993-10-22 1996-06-18 Sheldahl, Inc. Flexible multilayer printed circuit boards and methods of manufacture
US5551627A (en) * 1994-09-29 1996-09-03 Motorola, Inc. Alloy solder connect assembly and method of connection
JPH08130267A (ja) * 1994-11-01 1996-05-21 Mitsubishi Electric Corp 樹脂封止型半導体パッケージ、それを用いた樹脂封止型半導体装置およびその製造方法
JPH0970687A (ja) * 1995-07-04 1997-03-18 Toyota Central Res & Dev Lab Inc 無鉛はんだ合金
US5736790A (en) * 1995-09-21 1998-04-07 Kabushiki Kaisha Toshiba Semiconductor chip, package and semiconductor device
US5730932A (en) * 1996-03-06 1998-03-24 International Business Machines Corporation Lead-free, tin-based multi-component solder alloys
KR980006783A (ko) * 1996-05-13 1998-03-30 이. 힐러 윌리엄 저가의 위상 고정 모터 제어 방법 및 구조
JPH09306954A (ja) * 1996-05-20 1997-11-28 Hitachi Ltd 半導体装置及びその実装方法並びに実装構造体
AU6279296A (en) * 1996-06-12 1998-01-07 International Business Machines Corporation Lead-free, high tin ternary solder alloy of tin, silver, and indium
US20010002982A1 (en) * 1996-06-12 2001-06-07 Sarkhel Amit Kumar Lead-free, high tin ternary solder alloy of tin, silver, and bismuth
US5738936A (en) * 1996-06-27 1998-04-14 W. L. Gore & Associates, Inc. Thermally conductive polytetrafluoroethylene article
US5786635A (en) * 1996-12-16 1998-07-28 International Business Machines Corporation Electronic package with compressible heatsink structure
US6114413A (en) * 1997-07-10 2000-09-05 International Business Machines Corporation Thermally conducting materials and applications for microelectronic packaging
JP2000012748A (ja) * 1998-06-22 2000-01-14 Hitachi Ltd 電子回路装置
KR100315023B1 (ko) * 1998-12-26 2002-04-24 박종섭 스택패키지의리드프레임접합장치및이를이용한접합방법
US6176947B1 (en) * 1998-12-31 2001-01-23 H-Technologies Group, Incorporated Lead-free solders
US6706219B2 (en) * 1999-09-17 2004-03-16 Honeywell International Inc. Interface materials and methods of production and use thereof
JP2001127074A (ja) * 1999-10-29 2001-05-11 Hitachi Ltd 半導体装置及びそれを用いた全波整流装置
US6365973B1 (en) * 1999-12-07 2002-04-02 Intel Corporation Filled solder
JP2001308215A (ja) * 2000-04-24 2001-11-02 Ngk Spark Plug Co Ltd 半導体装置
US6724078B1 (en) * 2000-08-31 2004-04-20 Intel Corporation Electronic assembly comprising solderable thermal interface
JP2003112288A (ja) * 2001-10-03 2003-04-15 Mitsubishi Heavy Ind Ltd 銀鑞材料
US7311967B2 (en) * 2001-10-18 2007-12-25 Intel Corporation Thermal interface material and electronic assembly having such a thermal interface material
US6504242B1 (en) * 2001-11-15 2003-01-07 Intel Corporation Electronic assembly having a wetting layer on a thermally conductive heat spreader
US7036573B2 (en) * 2002-02-08 2006-05-02 Intel Corporation Polymer with solder pre-coated fillers for thermal interface materials
US7436058B2 (en) * 2002-05-09 2008-10-14 Intel Corporation Reactive solder material
US7029358B2 (en) * 2002-06-28 2006-04-18 Canon Kabushiki Kaisha Hermetic container and image display apparatus using the same
JP3761846B2 (ja) * 2002-07-11 2006-03-29 内橋エステック株式会社 合金型温度ヒューズ及び温度ヒューズエレメント用線材
WO2004047507A2 (en) * 2002-11-18 2004-06-03 Honeywell International Inc Coating compositions for solder spheres, powders and preforms, methods of production and uses thereof
US7210227B2 (en) * 2002-11-26 2007-05-01 Intel Corporation Decreasing thermal contact resistance at a material interface
US6841867B2 (en) * 2002-12-30 2005-01-11 Intel Corporation Gel thermal interface materials comprising fillers having low melting point and electronic packages comprising these gel thermal interface materials
US20070164424A1 (en) * 2003-04-02 2007-07-19 Nancy Dean Thermal interconnect and interface systems, methods of production and uses thereof
US7030485B2 (en) * 2003-06-26 2006-04-18 Intel Corporation Thermal interface structure with integrated liquid cooling and methods
US7218000B2 (en) * 2003-06-27 2007-05-15 Intel Corporation Liquid solder thermal interface material contained within a cold-formed barrier and methods of making same
US20060113683A1 (en) * 2004-09-07 2006-06-01 Nancy Dean Doped alloys for electrical interconnects, methods of production and uses thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108260273A (zh) * 2016-12-29 2018-07-06 盟创科技股份有限公司 网络通讯装置及其电子模组与散热基板结构

Also Published As

Publication number Publication date
TW200701419A (en) 2007-01-01
EP1739743A2 (en) 2007-01-03
TWI276210B (en) 2007-03-11
US20070012477A1 (en) 2007-01-18
EP1739743A3 (en) 2008-12-24
KR100755254B1 (ko) 2007-09-05
KR20070000324A (ko) 2007-01-02
JP2007005670A (ja) 2007-01-11

Similar Documents

Publication Publication Date Title
CN1889255A (zh) 包括具有高导热率的接点材料的电子元件封装件
US8920580B2 (en) Solder paste and electronic device
EP2617515B1 (en) Semiconductor device bonding material
CN1080616C (zh) 焊料、用焊接法贴装的电子元件及电路板
JP4817951B2 (ja) 厚膜導体組成物ならびにｌｔｃｃ回路およびデバイスにおけるその使用
EP2296177A1 (en) Substrate for power module, power module, and method for producing substrate for power module
TWI476266B (zh) 異方性導電膏
CN1738039A (zh) 半导体器件及其制造方法
KR20180050712A (ko) 접합용 구리 페이스트, 접합체의 제조 방법 및 반도체 장치의 제조 방법
JP4917668B1 (ja) 多層配線基板、多層配線基板の製造方法
CN104704618A (zh) 半导体装置、陶瓷电路基板及半导体装置的制造方法
JP4795488B1 (ja) 配線基板、配線基板の製造方法、及びビアペースト
US20070298244A1 (en) Bonding materials having particle with anisotropic shape
KR20120007008A (ko) 태양전지 모듈 및 그 제조 방법
US8125088B2 (en) Semiconductor device
CN1592538A (zh) 电路装置
JP4030930B2 (ja) 半導体パワーモジュール
TW201038349A (en) Metal filler, low-temperature-bonding lead-free solder and bonded structure
CN112192085A (zh) 一种复合焊料预成型片及其制备方法、及封装方法
CN1456031A (zh) 电路板及其制造方法
KR101831322B1 (ko) 니켈도금층이 제거된 연성외부전극 제조용 도전성 페이스트 및 이를 포함하는 수동 전자 부품
TW201742215A (zh) 半導體裝置
JP2018098219A (ja) 半導体装置及びその製造方法。
US20060249836A1 (en) Chip-scale package
US11581239B2 (en) Lead-free solder paste as thermal interface material

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20070103