CN1515026A - 半导体片的分割方法 - Google Patents
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Abstract
一种半导体片的分割方法,在分割半导体片时,把在由直道划分的多个区域中形成有电路的半导体片W分割成各个电路的半导体片芯片,用胶带构件10覆盖半导体片W的电路面,通过切割来除去覆盖直道的上部的胶带构件10,形成切削沟11,对除去了覆盖直道的上部的胶带构件10的半导体片W进行化学蚀刻处理,侵蚀直道来分割成各个半导体片芯片,以经济的方法形成没有缺陷或应力的高质量的芯片。
Description
技术领域
本发明涉及通过化学蚀刻处理分割半导体片来作为各个芯片的半导体片分割方法。
背景技术
图12所示的半导体片W通过保持胶带T与框F成为一体。在半导体片W的表面上,直道S隔开一定间隔排列成格子状,在由直道S划分的多个矩形区域中形成电路。而且,通过使用旋转刀切削直道S而形成各半导体芯片C。
但是,在利用旋转刀进行的切削中存在以下问题:有时会在半导体芯片的外周产生细小的缺陷或应力,由于该缺陷或应力而导致抗折强度下降,由于外力或加热周期而使半导体芯片容易破损,寿命缩短。例如在厚度50μm以下的半导体芯片中,所述缺陷或应力就成为致命的问题。
因此,正在研究不使用旋转刀,而是通过化学蚀刻处理来分割半导体片的方法。该方法首先在形成有电路的半导体片W的表面上粘贴胶带构件来进行遮挡,使用光掩模仅使直道的上部曝光,除去因曝光而变质的胶带构件后,通过蚀刻对直道进行侵蚀而分割成各半导体芯片的方法。
但是,在所述方法中,为了仅使粘贴在直道上部的胶带构件曝光,必须准备多种与半导体片W的大小以及直道间隔单独对应的光掩模,所以存在经济上不合算并且管理繁琐的问题。
另外,还存在以下问题:因为需要使形成在半导体片W的表面的直道S和与它对应形成在光掩模上的对应部分进行精密位置对位来进行曝光的曝光装置和用于除去因曝光而变质的胶带构件的除去装置,所以导致设备投资的增大。
当使用靠蚀刻处理无法除去的材料在半导体片W的直道S上形成对齐标记等层叠体时,存在实质上无法分割半导体片W的问题。
另一方面,如例如特开2001-127011号公报所公开的发明那样,由光致抗蚀剂膜覆盖半导体片的整个电路面,使用旋转刀用机械方法除去覆盖直道上部的光致抗蚀剂膜,然后用化学方法蚀刻、分割成各个半导体芯片的方法。
但是,利用该方法时,很难使覆盖的光致抗蚀剂膜厚度均匀,并且无法使光致抗蚀剂膜形成得很厚,所以在蚀刻时,有时连光致抗蚀剂膜也会被蚀刻,从而出现光致抗蚀剂膜在分割前就已经被去掉这一问题。
因此,存在着以下课题:在通过化学蚀刻处理来分割半导体片时,通过经济且可靠的方法来形成没有缺陷或应力的高质量的半导体芯片。
发明内容
作为用于解决所述课题的具体方法,本发明提供一种半导体片的分割方法,把在由直道划分的多个区域中形成有电路的半导体片分割成各个电路的半导体芯片,包括:用胶带构件覆盖半导体片的电路面的遮盖步骤;切割除去覆盖直道上部的胶带构件的胶带构件除去步骤;对除去覆盖直道上部的胶带构件的半导体片进行化学蚀刻处理,侵蚀直道而分割成各半导体芯片的分割步骤。
而且,该半导体片的分割方法把以下作为附加的要件:根据分割步骤中侵蚀半导体片的深度决定胶带构件的厚度;当分割在直道上形成通过化学蚀刻处理无法除去的层叠体的半导体片时,通过切割除去层叠体;化学蚀刻处理是干蚀刻处理。
根据这样构成的半导体片的分割方法,在半导体片的电路面上粘贴胶带构件,通过切削除去直道上的胶带构件后,通过用化学方法蚀刻直道,分割成各半导体芯片,所以不使用光掩模、曝光装置等,能形成没有缺陷的抗折强度高的半导体片芯片。特别是当厚度为50μm以下的薄半导体片时,如果根据切削来进行分割的方法,就容易产生缺陷或应力,但如果根据化学蚀刻则很难产生缺陷或应力。
另外,使用切片装置把半导体片分割成各半导体片芯片是主流,因为半导体制造商已经拥有切片装置,所以在本发明的实施中,不需要大的设备投资。
半导体片的厚度越厚,化学蚀刻处理越费时间,但是如果是厚度50μm以下的薄半导体片,在干蚀刻处理中并不需要这么多时间。
另外,当是在直道上形成由蚀刻处理无法除去的材料的图案等层叠体的半导体片时,通过使旋转刀切入数μm左右,除去该层叠体,能使由硅等构成的半导体衬底露出。
附图说明
下面简要说明附图。
图1是表示构成本发明的遮盖步骤的立体图。
图2是表示在半导体片上粘贴了胶带构件时的状态的立体图。
图3是表示在半导体片上粘贴了胶带构件时的状态主视图。
图4是表示构成本发明的胶带构件除去步骤中使用的切片步骤一例的立体图。
图5是表示在直道上部的胶带构件上形成切削沟的状态的主视图。
图6是表示粘贴纵横形成切削沟的胶带构件的半导体片的立体图。
图7是表示分割步骤中使用的干蚀刻装置一例的立体图。
图8是表示干蚀刻装置的搬出入室和处理室的剖视图。
图9是表示干蚀刻装置的处理室和气体供给部的结构的说明图。
图10是表示分割步骤后的半导体片和胶带构件的主视图。
图11是表示剥离了胶带构件后的半导体片的主视图。
图12是表示通过保持胶带与框成为一体的半导体片的平面图。
符号的说明。
10-胶带构件;11-切削沟;20-切片装置;21-盒子;22-搬出入部件;23-假放置区;24-输送部件;25-固定台;26-对齐部件;27-切削部件;28-旋转刀;30-干蚀刻装置;31-搬出入部件;32-搬出入室;33-处理室;34-气体供给部;35-第一门;36-保持部;37-第二门;38-高频电源和调谐器;39-高频电极;40-冷却部;41-容器;42-泵;43-冷水循环器;44、45-吸引泵;46-过滤器;47-排出部;W-半导体片;S-直道;C-半导体芯片;T-保持胶带;F-框。
具体实施方式
作为本发明实施例,说明分割图1所示的半导体片W的方法。在堵塞框F的开口部而从背面一侧粘贴的保持胶带T的粘贴面上,使电路面(表面)向上粘贴图1的半导体片W,通过保持胶带T与框F成为一体而被支撑。
如图1所示,在该半导体片W上粘贴覆盖半导体片W的表面全体的胶带构件10,如图2和图3所示,与半导体片W成为一体(遮盖步骤)。在图示的例子中,胶带构件10是透明的,但是也可以是半透明的。胶带构件10可以是抗蚀剂胶带(形成给定厚度的薄板),但是也可以是通常作为保持胶带T使用的粘合胶带,也可以是在聚对苯二甲酸乙二醇酯(PET)等的薄膜上涂敷粘合剂而取得的材料。
如图2和图3所示,在粘贴了胶带构件10的半导体片W通过保持胶带T与框F成为一体的状态下,输送到图4所示的切片装置20中,在盒子21中收容多个。
然后,通过搬出入部件22把半导体片W一片一片取出到假放置区23中,由输送部件24吸附,输送到固定台25上保持。
接着,通过固定台25在+X方向移动,半导体片W首先位于对齐部件26的正下方,在此检测直道,进行该直道和构成切削部件27的旋转刀28的Y轴方向的对位(对齐)。须指出的是,在图2的例子中,胶带构件10是透明的,但是当半透明时,如果进行基于红外线的对齐,则透射胶带构件10能检测到。
如果这样进行对位,则固定台25在+X方向移动,并且旋转刀28一边高速旋转,切削部件27一边下降,高速旋转的旋转刀28切入检测的直道上部的胶带构件10。
此时,通过以高精度控制基于旋转刀28的切入量,旋转刀28只切入胶带构件10,不切入半导体片W。
如果使固定台25在X轴方向往返移动,同时一面使切削部件27以各直道间隔在Y轴方向进给,一面进行这种方式的切削,则如图5所示,在同方向的全部直道的上部形成切削沟11。
如果使固定台25旋转90度后,与所述同样进行切削,则如图6所示,在全部直道的上部的胶带构件10上纵横形成切削沟11(胶带构件除去步骤)。这样,能切削除去直道上的胶带构件10,所以没必要象以往那样使用光掩模、曝光装置等。
须指出的是,在胶带构件除去步骤中,当旋转刀28的切入量产生误差时,在半导体片W的直道上切入若干,产生一些缺陷或应力,但是一些缺陷或应力能通过后面的分割步骤中的化学蚀刻处理出去,所以不会成为问题。
如果关于全部半导体片,胶带构件除去步骤结束,则各盒子21被输送到接着的分割步骤中。在分割步骤中使用例如图7所示的干蚀刻装置30。须指出的是,也能通过湿蚀刻进行分割步骤。
图7所示的干蚀刻装置30大致由进行从切片装置20输送来的盒子21的半导体片W的搬出和分割结束后的半导体片W向盒子21的搬入的搬出入部件31、收容由搬出入部件31搬出入的半导体片W的搬出入室32、进行干蚀刻的处理室33、向处理室33内供给蚀刻气体的气体供给部34构成。
胶带构件除去步骤结束的半导体片W由搬出入部件31从盒子21取出。然后搬出入室32上设置的第一门35打开,把半导体片W放置在位于图8所示的搬出入室32内的保持部36上。
如图8所示,搬出入室32和处理室33由第二门37遮断,第在第二门37打开时,保持部36能在搬出入室32的内部和处理室33的内部之间移动。
如图9所示,在处理室33中,在上下方向对峙配置连接在高频电源和调谐器38上,并且产生等离子体的一对高频电极39,在本实施例中,成为一方的高频电极39兼任保持部36的结构。另外,在保持部36上设置有冷却保持的半导体片W的冷却部40。
而在气体供给部34中具有:存储蚀刻气体的容器41;把容器41中存储的蚀刻气体向处理室33供给的泵42;向冷却部40供给冷却水的冷水循环器43;向保持部36供给吸引力的吸引泵44;吸引处理室33内的蚀刻气体的吸引泵45;中和吸引泵45吸引的蚀刻气体而排出的排出部47;过滤器46。
当干蚀刻胶带构件除去步骤结束的半导体片W时,打开搬出入室32上设置的第一门35,搬出入部件31保持半导体片W,向图8的箭头方向移动,使表面向上,把半导体片W放置在位于搬出入室32内的保持部36上。然后,关闭第一门35,使搬出入室32为真空。接着,通过打开第二门37,使保持部36在处理室33内移动,半导体片W收容在处理室33内。在处理室33内,通过泵42供给蚀刻气体例如稀薄的氟类气体,并且从高频电源和调谐器38向高频电极39供给高频电压,通过等离子体干蚀刻半导体片W的表面。此时,通过冷水循环器43向冷却部40供给冷却水。
如果这样进行干蚀刻,则半导体片W的表面中,粘贴在直道上部的胶带构件10在胶带构件除去步骤中除去,但是其他部分由胶带构件10覆盖,所以胶带构件10变为遮盖构件,直道通过蚀刻处理被侵蚀,如图10所示,分割成各半导体芯片C(分割步骤)。
须指出的是,胶带构件10可以是通过所述分割步骤中的干蚀刻能侵蚀的材料,也可以是不能侵蚀的材料。当为能侵蚀的材料时,如果与侵蚀半导体片的直道的深度对应,决定胶带构件的厚度,就能不损伤半导体片W的表面。即当侵蚀直道S,分割成半导体片芯片C时,可以在半导体片芯片C的上部残存胶带构件10。而当为通过干蚀刻不能侵蚀的材料时,不考虑半导体片的侵蚀深度,就能决定厚度。
在蚀刻结束后,通过吸引泵45吸引提供给处理室33的蚀刻气体,在过滤器46中中和,从排出部47向外部排出。然后,使处理室33内为真空,打开第二门37,把保持了蚀刻完毕的半导体片W的保持部36移动到搬出入室32,关闭第二门37。
如果半导体片W移动到搬出入室32,就打开第一门35,搬出入部件31保持半导体片W,从搬出入室32搬出,收容在盒子21中。
通过关于全部半导体片进行以上的步骤,通过化学蚀刻处理分割成半导体片芯片C,在通过胶带构件10维持半导体片W的外形的状态下,收容在盒子21中。
然后,通过剥离粘贴在各半导体片芯片C表面的胶带构件10,如图11所示,变为各半导体片芯片C。
这样形成的各半导体片芯片C不是使用旋转刀通过切削而分割的,是通过化学蚀刻处理分割的,所以成为没有缺陷或应力的高质量的半导体片芯片C。特别是厚度为50μm以下的薄半导体片时,如果基于切削分割的方法,则容易产生缺陷或应力,所以如果利用本发明,则特别有效。
另外,半导体片的厚度越大,干蚀刻处理所花费时间越多,但是如果是厚度50μm以下的薄半导体片,则干蚀刻处理并不需要这么多时间,所以能确保生产性,在这一点上,本发明是有用的。
须指出的是,当在直道上形成蚀刻处理中无法除去的图案等层叠体时,在胶带构件除去步骤中,如果使旋转刀28切入到该覆盖层,进行切削,就能除去该覆盖层,所以通过蚀刻也能分割形成这样的层叠体的半导体片。
产业上的可应用性
综上所述,根据本发明的半导体片的分割方法,在半导体片的电路面上粘贴胶带构件,通过切削除去直道上的胶带构件后,通过用化学方法对直道进行蚀刻,分割成各个半导体片芯片,所以不使用光掩模、曝光装置,就能形成没有缺陷的抗折强度高的半导体片芯片,从而能提高半导体片芯片的质量。特别是,当厚度是50μm以下的薄半导体片芯片时,如果基于切削分割的方法,就容易产生缺陷或应力,但如果根据化学蚀刻,就很难产生缺陷或应力,因而是有效的。
另外,使用切片装置来把半导体片分割成各半导体片芯片是主流,因为半导体制造商已经拥有切片装置,所以在本发明的实施中,不需要大的设备投资,因此是很经济的。
半导体片的厚度越大,化学蚀刻处理所需时间越长,但是,如果是厚度50μm以下的薄半导体片,则在干蚀刻处理中并不需要那么多时间,所以能确保生产效率。
而且,如果象以往那样通过光致抗蚀剂膜来遮盖半导体片的表面,则有时光致抗蚀剂膜的厚度会不均匀,另外,因为无法使光致抗蚀剂膜具有较大的厚度,所以通过化学蚀刻来蚀刻光致抗蚀剂膜,在分割半导体片前遮盖就消失了,但因为使用了胶带构件进行遮盖,并通过切削来除去直道上部的胶带构件,所以能确保遮盖有足够的厚度,这样就解决了上述问题,从而能可靠地分割半导体片。
Claims (4)
1.一种半导体片的分割方法,把在由直道划分的多个区域中形成有电路的半导体片分割成各个电路的半导体芯片,其特征在于:包括:
用胶带构件覆盖该半导体片的电路面的遮盖步骤;
切割除去覆盖着该直道的上部的胶带构件的胶带构件除去步骤;
对除去覆盖直道上部的胶带构件的半导体片进行化学蚀刻处理,侵蚀直道而分割成各个半导体芯片的分割步骤。
2.根据权利要求1所述的半导体片的分割方法,其特征在于:
根据分割步骤中侵蚀半导体片的深度来决定胶带构件的厚度。
3.根据权利要求1或2所述的半导体片的分割方法,其特征在于:
当分割在直道上形成了通过化学蚀刻处理无法除去的层叠体的半导体片时,通过切割来除去该层叠体。
4.根据权利要求1所述的半导体片的分割方法,其特征在于:
化学蚀刻处理是干蚀刻处理。
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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CN101647096B (zh) * | 2007-04-05 | 2012-01-04 | 日立化成工业株式会社 | 半导体芯片的制造方法和半导体用粘接膜及其复合片 |
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Families Citing this family (107)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10391811B4 (de) * | 2002-02-25 | 2012-06-21 | Disco Corp. | Verfahren zum Zerlegen eines Halbleiterwafers |
US6716723B2 (en) * | 2002-06-05 | 2004-04-06 | Intel Corporation | Wafer cutting using laser marking |
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US20070173032A1 (en) * | 2006-01-25 | 2007-07-26 | Lexmark International, Inc. | Wafer dicing by channels and saw |
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US8642448B2 (en) | 2010-06-22 | 2014-02-04 | Applied Materials, Inc. | Wafer dicing using femtosecond-based laser and plasma etch |
US8946058B2 (en) | 2011-03-14 | 2015-02-03 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US9070760B2 (en) | 2011-03-14 | 2015-06-30 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US8557682B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-layer mask for substrate dicing by laser and plasma etch |
US8912077B2 (en) | 2011-06-15 | 2014-12-16 | Applied Materials, Inc. | Hybrid laser and plasma etch wafer dicing using substrate carrier |
US8759197B2 (en) | 2011-06-15 | 2014-06-24 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US8598016B2 (en) | 2011-06-15 | 2013-12-03 | Applied Materials, Inc. | In-situ deposited mask layer for device singulation by laser scribing and plasma etch |
US9029242B2 (en) | 2011-06-15 | 2015-05-12 | Applied Materials, Inc. | Damage isolation by shaped beam delivery in laser scribing process |
US8703581B2 (en) | 2011-06-15 | 2014-04-22 | Applied Materials, Inc. | Water soluble mask for substrate dicing by laser and plasma etch |
US9129904B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch |
US9126285B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using physically-removable mask |
US8507363B2 (en) | 2011-06-15 | 2013-08-13 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using water-soluble die attach film |
US8557683B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US8951819B2 (en) | 2011-07-11 | 2015-02-10 | Applied Materials, Inc. | Wafer dicing using hybrid split-beam laser scribing process with plasma etch |
US8652940B2 (en) | 2012-04-10 | 2014-02-18 | Applied Materials, Inc. | Wafer dicing used hybrid multi-step laser scribing process with plasma etch |
US8946057B2 (en) | 2012-04-24 | 2015-02-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using UV-curable adhesive film |
US8969177B2 (en) | 2012-06-29 | 2015-03-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film |
US9048309B2 (en) | 2012-07-10 | 2015-06-02 | Applied Materials, Inc. | Uniform masking for wafer dicing using laser and plasma etch |
US8940619B2 (en) | 2012-07-13 | 2015-01-27 | Applied Materials, Inc. | Method of diced wafer transportation |
US8845854B2 (en) | 2012-07-13 | 2014-09-30 | Applied Materials, Inc. | Laser, plasma etch, and backside grind process for wafer dicing |
US8993414B2 (en) | 2012-07-13 | 2015-03-31 | Applied Materials, Inc. | Laser scribing and plasma etch for high die break strength and clean sidewall |
US8859397B2 (en) | 2012-07-13 | 2014-10-14 | Applied Materials, Inc. | Method of coating water soluble mask for laser scribing and plasma etch |
US9159574B2 (en) | 2012-08-27 | 2015-10-13 | Applied Materials, Inc. | Method of silicon etch for trench sidewall smoothing |
US9252057B2 (en) | 2012-10-17 | 2016-02-02 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with partial pre-curing of UV release dicing tape for film frame wafer application |
US8975162B2 (en) | 2012-12-20 | 2015-03-10 | Applied Materials, Inc. | Wafer dicing from wafer backside |
US9236305B2 (en) | 2013-01-25 | 2016-01-12 | Applied Materials, Inc. | Wafer dicing with etch chamber shield ring for film frame wafer applications |
US8980726B2 (en) | 2013-01-25 | 2015-03-17 | Applied Materials, Inc. | Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers |
US9620379B2 (en) | 2013-03-14 | 2017-04-11 | Applied Materials, Inc. | Multi-layer mask including non-photodefinable laser energy absorbing layer for substrate dicing by laser and plasma etch |
US8883614B1 (en) | 2013-05-22 | 2014-11-11 | Applied Materials, Inc. | Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach |
US20150037915A1 (en) * | 2013-07-31 | 2015-02-05 | Wei-Sheng Lei | Method and system for laser focus plane determination in a laser scribing process |
US9105710B2 (en) | 2013-08-30 | 2015-08-11 | Applied Materials, Inc. | Wafer dicing method for improving die packaging quality |
US9224650B2 (en) | 2013-09-19 | 2015-12-29 | Applied Materials, Inc. | Wafer dicing from wafer backside and front side |
US9460966B2 (en) | 2013-10-10 | 2016-10-04 | Applied Materials, Inc. | Method and apparatus for dicing wafers having thick passivation polymer layer |
US9041198B2 (en) | 2013-10-22 | 2015-05-26 | Applied Materials, Inc. | Maskless hybrid laser scribing and plasma etching wafer dicing process |
US9312177B2 (en) | 2013-12-06 | 2016-04-12 | Applied Materials, Inc. | Screen print mask for laser scribe and plasma etch wafer dicing process |
US9299614B2 (en) | 2013-12-10 | 2016-03-29 | Applied Materials, Inc. | Method and carrier for dicing a wafer |
US9293304B2 (en) | 2013-12-17 | 2016-03-22 | Applied Materials, Inc. | Plasma thermal shield for heat dissipation in plasma chamber |
US9299611B2 (en) | 2014-01-29 | 2016-03-29 | Applied Materials, Inc. | Method of wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance |
US9018079B1 (en) | 2014-01-29 | 2015-04-28 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate reactive post mask-opening clean |
US8927393B1 (en) | 2014-01-29 | 2015-01-06 | Applied Materials, Inc. | Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing |
US9012305B1 (en) | 2014-01-29 | 2015-04-21 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate non-reactive post mask-opening clean |
US9236284B2 (en) | 2014-01-31 | 2016-01-12 | Applied Materials, Inc. | Cooled tape frame lift and low contact shadow ring for plasma heat isolation |
US8991329B1 (en) | 2014-01-31 | 2015-03-31 | Applied Materials, Inc. | Wafer coating |
US9130030B1 (en) | 2014-03-07 | 2015-09-08 | Applied Materials, Inc. | Baking tool for improved wafer coating process |
US20150255349A1 (en) | 2014-03-07 | 2015-09-10 | JAMES Matthew HOLDEN | Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes |
US9275902B2 (en) | 2014-03-26 | 2016-03-01 | Applied Materials, Inc. | Dicing processes for thin wafers with bumps on wafer backside |
US9076860B1 (en) | 2014-04-04 | 2015-07-07 | Applied Materials, Inc. | Residue removal from singulated die sidewall |
JP6260416B2 (ja) * | 2014-04-07 | 2018-01-17 | 株式会社ディスコ | 板状物の加工方法 |
US8975163B1 (en) | 2014-04-10 | 2015-03-10 | Applied Materials, Inc. | Laser-dominated laser scribing and plasma etch hybrid wafer dicing |
US8932939B1 (en) | 2014-04-14 | 2015-01-13 | Applied Materials, Inc. | Water soluble mask formation by dry film lamination |
US8912078B1 (en) | 2014-04-16 | 2014-12-16 | Applied Materials, Inc. | Dicing wafers having solder bumps on wafer backside |
US8999816B1 (en) | 2014-04-18 | 2015-04-07 | Applied Materials, Inc. | Pre-patterned dry laminate mask for wafer dicing processes |
US8912075B1 (en) | 2014-04-29 | 2014-12-16 | Applied Materials, Inc. | Wafer edge warp supression for thin wafer supported by tape frame |
US9159621B1 (en) | 2014-04-29 | 2015-10-13 | Applied Materials, Inc. | Dicing tape protection for wafer dicing using laser scribe process |
US8980727B1 (en) | 2014-05-07 | 2015-03-17 | Applied Materials, Inc. | Substrate patterning using hybrid laser scribing and plasma etching processing schemes |
US9112050B1 (en) | 2014-05-13 | 2015-08-18 | Applied Materials, Inc. | Dicing tape thermal management by wafer frame support ring cooling during plasma dicing |
US9034771B1 (en) | 2014-05-23 | 2015-05-19 | Applied Materials, Inc. | Cooling pedestal for dicing tape thermal management during plasma dicing |
US9142459B1 (en) | 2014-06-30 | 2015-09-22 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination |
US9093518B1 (en) | 2014-06-30 | 2015-07-28 | Applied Materials, Inc. | Singulation of wafers having wafer-level underfill |
US9165832B1 (en) | 2014-06-30 | 2015-10-20 | Applied Materials, Inc. | Method of die singulation using laser ablation and induction of internal defects with a laser |
US9130057B1 (en) | 2014-06-30 | 2015-09-08 | Applied Materials, Inc. | Hybrid dicing process using a blade and laser |
US9349648B2 (en) | 2014-07-22 | 2016-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a rectangular shaped two-dimensional top hat laser beam profile or a linear shaped one-dimensional top hat laser beam profile laser scribing process and plasma etch process |
US9196498B1 (en) | 2014-08-12 | 2015-11-24 | Applied Materials, Inc. | Stationary actively-cooled shadow ring for heat dissipation in plasma chamber |
US9117868B1 (en) | 2014-08-12 | 2015-08-25 | Applied Materials, Inc. | Bipolar electrostatic chuck for dicing tape thermal management during plasma dicing |
US9281244B1 (en) | 2014-09-18 | 2016-03-08 | Applied Materials, Inc. | Hybrid wafer dicing approach using an adaptive optics-controlled laser scribing process and plasma etch process |
US9177861B1 (en) | 2014-09-19 | 2015-11-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using laser scribing process based on an elliptical laser beam profile or a spatio-temporal controlled laser beam profile |
US11195756B2 (en) | 2014-09-19 | 2021-12-07 | Applied Materials, Inc. | Proximity contact cover ring for plasma dicing |
US9196536B1 (en) | 2014-09-25 | 2015-11-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a phase modulated laser beam profile laser scribing process and plasma etch process |
US9130056B1 (en) | 2014-10-03 | 2015-09-08 | Applied Materials, Inc. | Bi-layer wafer-level underfill mask for wafer dicing and approaches for performing wafer dicing |
SG10201903242QA (en) | 2014-10-13 | 2019-05-30 | Utac Headquarters Pte Ltd | Methods for singulating semiconductor wafer |
US9245803B1 (en) | 2014-10-17 | 2016-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a bessel beam shaper laser scribing process and plasma etch process |
US10692765B2 (en) | 2014-11-07 | 2020-06-23 | Applied Materials, Inc. | Transfer arm for film frame substrate handling during plasma singulation of wafers |
US9330977B1 (en) | 2015-01-05 | 2016-05-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using a galvo scanner and linear stage hybrid motion laser scribing process and plasma etch process |
US9159624B1 (en) | 2015-01-05 | 2015-10-13 | Applied Materials, Inc. | Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach |
US9355907B1 (en) | 2015-01-05 | 2016-05-31 | Applied Materials, Inc. | Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process |
US9601375B2 (en) | 2015-04-27 | 2017-03-21 | Applied Materials, Inc. | UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach |
US9478455B1 (en) | 2015-06-12 | 2016-10-25 | Applied Materials, Inc. | Thermal pyrolytic graphite shadow ring assembly for heat dissipation in plasma chamber |
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Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5597767A (en) * | 1995-01-06 | 1997-01-28 | Texas Instruments Incorporated | Separation of wafer into die with wafer-level processing |
JPH10256331A (ja) | 1997-03-14 | 1998-09-25 | Super Silicon Kenkyusho:Kk | 評価用半導体ウェーハの作成方法 |
JP4387007B2 (ja) | 1999-10-26 | 2009-12-16 | 株式会社ディスコ | 半導体ウェーハの分割方法 |
JP2001148358A (ja) * | 1999-11-19 | 2001-05-29 | Disco Abrasive Syst Ltd | 半導体ウェーハ及び該半導体ウェーハの分割方法 |
JP4757398B2 (ja) * | 2001-04-24 | 2011-08-24 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
US6642127B2 (en) * | 2001-10-19 | 2003-11-04 | Applied Materials, Inc. | Method for dicing a semiconductor wafer |
US6716723B2 (en) * | 2002-06-05 | 2004-04-06 | Intel Corporation | Wafer cutting using laser marking |
-
2002
- 2002-02-28 JP JP2002053436A patent/JP2003257896A/ja active Pending
-
2003
- 2003-02-06 WO PCT/JP2003/001236 patent/WO2003073488A1/ja active Application Filing
- 2003-02-06 KR KR10-2003-7014079A patent/KR20040086724A/ko not_active Application Discontinuation
- 2003-02-06 US US10/475,675 patent/US6803247B2/en not_active Expired - Lifetime
- 2003-02-06 DE DE10391810T patent/DE10391810T5/de not_active Ceased
- 2003-02-06 AU AU2003248339A patent/AU2003248339A1/en not_active Abandoned
- 2003-02-06 CN CNA038003821A patent/CN1515026A/zh active Pending
- 2003-02-21 TW TW092103690A patent/TWI259555B/zh not_active IP Right Cessation
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CN101647096B (zh) * | 2007-04-05 | 2012-01-04 | 日立化成工业株式会社 | 半导体芯片的制造方法和半导体用粘接膜及其复合片 |
CN101339910B (zh) * | 2007-07-03 | 2010-06-02 | 台湾积体电路制造股份有限公司 | 晶片级芯片尺寸封装的制造方法 |
CN104810274A (zh) * | 2011-03-14 | 2015-07-29 | 等离子瑟姆有限公司 | 用于对基板进行等离子切割的方法 |
CN104810274B (zh) * | 2011-03-14 | 2017-11-07 | 等离子瑟姆有限公司 | 用于对基板进行等离子切割的方法 |
CN102923939A (zh) * | 2012-09-17 | 2013-02-13 | 江西沃格光电科技有限公司 | 强化玻璃的切割方法 |
CN108630599A (zh) * | 2017-03-22 | 2018-10-09 | 东莞新科技术研究开发有限公司 | 芯片的形成方法 |
CN109087872A (zh) * | 2018-08-04 | 2018-12-25 | 戴先富 | Led扩晶机 |
CN110581100A (zh) * | 2019-09-29 | 2019-12-17 | 歌尔股份有限公司 | 一种传感器的划切方法 |
CN110581100B (zh) * | 2019-09-29 | 2021-12-31 | 潍坊歌尔微电子有限公司 | 一种传感器的划切方法 |
Also Published As
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US20040115901A1 (en) | 2004-06-17 |
DE10391810T5 (de) | 2005-05-19 |
US6803247B2 (en) | 2004-10-12 |
WO2003073488A1 (fr) | 2003-09-04 |
JP2003257896A (ja) | 2003-09-12 |
AU2003248339A1 (en) | 2003-09-09 |
TW200303601A (en) | 2003-09-01 |
KR20040086724A (ko) | 2004-10-12 |
TWI259555B (en) | 2006-08-01 |
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