CN1292153A - 隔离栅双极型晶体管 - Google Patents

隔离栅双极型晶体管 Download PDF

Info

Publication number
CN1292153A
CN1292153A CN99803384A CN99803384A CN1292153A CN 1292153 A CN1292153 A CN 1292153A CN 99803384 A CN99803384 A CN 99803384A CN 99803384 A CN99803384 A CN 99803384A CN 1292153 A CN1292153 A CN 1292153A
Authority
CN
China
Prior art keywords
grid
igbt
chip
terminals
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN99803384A
Other languages
English (en)
Other versions
CN1183603C (zh
Inventor
F·保尔
H·R·策勒尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB Schweiz AG
Original Assignee
ABB Schweiz AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19808154A external-priority patent/DE19808154A1/de
Priority claimed from DE1998123170 external-priority patent/DE19823170A1/de
Application filed by ABB Schweiz AG filed Critical ABB Schweiz AG
Publication of CN1292153A publication Critical patent/CN1292153A/zh
Application granted granted Critical
Publication of CN1183603C publication Critical patent/CN1183603C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1302—Disposition
    • H01L2224/13026—Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body
    • H01L2224/13028—Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body the bump connector being disposed on at least two separate bonding areas, e.g. bond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Thyristors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

本发明涉及隔离栅双极型晶体管,它生产方法简单,但仍可以均一地开启。为此目的,本发明的晶体管没有任何栅指,并在IGBT芯片内的栅电流从栅接线端出发,直接经栅极多晶硅层传输到IGBT单元。

Description

隔离栅双极型晶体管
技术领域
本发明涉及半导体技术领域。尤其涉及权利要求1的前序部分的IGBT(隔离栅双极型晶体管)。这种IGBT可见于德国专利公开说明书DE 196 12 516 A1。
技术现状
按当前技术构造的IGBT内，具有0．2cm2极小表面的IGBT芯片的栅极信号首先借助于栅极导片分布在芯片的周边上(参阅DE 196 12516 A1)。窄带状栅(栅指)随后把这信号引入芯片内部(详见EP 0755 076 A2)。无论栅极导片或栅指都由铝金属化层形成。信号也可从安排在一个角上或中央的栅极垫片出发经栅指分布在芯片表面上(见图1)。一般采用的设计规则指出，栅指的间距x必须满足以下条件。 x < < &tau; / ( R c )
R是多晶硅的薄层电阻，它把信号从栅指引到实际的栅极，c是单位面积栅极的MOS电容量，τ是由τ=RGate·Ctot给出的IGBT的特征开关时间，RGate是栅极偏置电阻，Ctot是芯片总MOS电容量，典型值是c=30nF／cm2，R=30欧姆，τ=200纳秒。这样x＜＜0．47cm。如果满足上述条件，则在导通期间，与栅极偏置电阻无关，任一时刻栅极上的电压分布是平缓的，因而电流密度是均匀的。
然而如果需要阴极侧焊接，则栅指需要复杂且昂贵的焊接金属化，及对钝化提出很高要求。钝化缺陷导至栅极发射极短路，这表现为早期失效，且只有通过昂贵的老化试验才可以发现。类似的问题在压力接触情况下会出现。
发明描述
本发明的任务是提供制造方式简单，但仍然可以均一开启的IGBT。该任务通过独立权利要求的特征来解决。
本发明的核心是：IGBT芯片的栅极电流从栅接线端出发，不用栅指，直接经栅极的多晶硅层转接到IGBT-单元。栅极信号按照第1实施例可以经安排在一个角上的栅接线端(栅极垫片)或按照第2实施例经一个中央栅接线端输入到IGBT芯片。
因此本发明恰恰有别于目前主导的观点，即从一定的芯片尺寸起，只在应用栅指的情况下才能达到均一接通。更确切地说本发明人第一次认识到，与适用于MOS晶体管的设计规则不同的另外的设计规则适用于IGBT均一关断。本发明人尤其发现，当等离子体分布还是均匀时，最大损耗功率密度总是均匀的。特别是在MOS电流不再能够用来维持外部电流时，一个双极型器件表现出基本上不同于单极型器件的性能，如MOS晶体管。在该时刻之后，从双极型电流过渡到纯空穴电流，并与主结的耗尽相联系。一旦这个过程中止，则全部电流由空穴输运，并且形成空间电荷区。但是，等离子分布横向总还是相当均匀的。因此，极不均匀的电流分布也会很快均匀化。在最大功率耗损时，电流分布差不多是均匀的。因此安全运行区并不减小，而且关断能量几乎不变。结果可以制造没有栅指的IGBT，尽管超过了适合无栅指MOS晶体管的0．2cm2最小面积。
图2a和2b示出本发明的IGBT-芯片1的一个实施例。示出的主接线端3被绝缘体7和栅极性8包围。栅极性8与栅接线端4相连，从接线端4例如可以把压焊丝连接至相应的外壳引线端。与此相反，在按照图1a和1b的当前技术中安排了栅指6，它从栅接线端4出发，将栅极信号分布在芯片表面。
本发明的优点尤其在于：
-通过去掉栅指使简单和低成本地实施焊接金属化成为可能。
-较简单的工艺使对芯片压触时，较高的可靠性成为可能。
附图简介
本发明依靠附图进一步说明如下：
图1a：按照当前技术的IGBT芯片俯视图；
图1b：根据图1a的IGBT芯片部分透视图；
图2a：按本发明第1实施例的IGBT芯片俯视图；
图2b：根据图2a的IGBT芯片部分透视图；
图3：按本发明第2实施例的IGBT芯片俯视图；
图4：按本发明的IGBT芯片剖面图；
图5：多晶硅层俯视图。
附图中用的参考符号在参考符号表内一起列出。
发明实施途径
在预试验中，制造了具有0．2cm2最小表面没有栅指的慢速2．5kV芯片并测量其特性。它在误差范围内与带栅指的类型没有差别。然而令人担心的是，快速芯片没有栅指的话可能会在极不均匀的电流分布情况下关断，因此会具有高的开关损耗、缓慢瞬变过程以及小的SOA。然而开关特性的分析计算、数字模拟以及没有栅指的快速IGBT的开关试验给出令人惊愕的结果。事实表明在关断时与开关时间τ可比较的信号传输时间并非一定导至不均匀的电流分布。试验还表明，与关断相比，接通是非关键的。对于进行芯片周边的栅极控制和选择 x &ap; &tau; / ( R &CenterDot; c ) 的情况，在关断时首先出现电流重新分布。芯片外部开始关断，负荷维持总电流恒定，并将电流引入芯片中央。在此时刻阳极电压基本上还是零。
在此时刻，MOS电流不再够用于维持外部电流。在纯MOS晶体管内，现在开始电压上升。电压上升是这样经栅-阳极(密勒效应)将电容电荷耦合到栅极，使得在栅极上的电压分布维持恒定，并且电流不再下降。一旦达到满负载电压，则调节机制中止栅压下降且使器件关断。
本发明的核心是，识别和充分利用双极型器件从上述时刻起主要表现出的另一种性能。在该时刻之后，与主结耗尽相联系双极型电流过渡到纯空穴电流。一旦该过程中止，则全部电流由空穴输运，而且形成空间电荷区。但等离子区横向仍旧维持均匀分布。因此，在该时刻极其不均匀的电流分布快速均匀化。到最大耗损功率时，电流分布几乎是均匀的。因此安全运行区不减小且关断能量几乎不变。因此，可以制造没有栅指也行的IGBT。
图2a和2b为由俯视或透视示出的按本发明的无栅指IGBT芯片1，它具有可见的第1主接线端3和未示出的第2主接线端以及栅接线端4，该接线端4在由图2a、2b所示实施例内安排在IGBT-芯片1的边缘，尤其是在一个角上。与展示现有技术的图1a和1b相反，它没有栅指6，而是栅极信号从栅接线端4出发经栅极性8分布在周边上。如图2b所看到的，栅极框8也是直接与栅极5有效连接的。栅极框最好具有小于5欧姆的电阻。
因此，第1主接线端3经一面形成，该面直到栅极引线4的凹槽为止是凸出的。其中在图2a和2b的实施例情况下，其凸出构形的面区被栅极性8所包围。如果存在多个栅接线端4，则第1主接线端的实际凸出的面具有相应数目的凹槽。
在尤其由IGBT的阴极形成的大面积第1主接线端(作为金属化层示出)和栅接线端4以及栅极框8之间安排绝缘体7。根据本发明，栅接线端4或栅极框8与IGBT的栅极5的多晶硅层直接连接，即没用栅指的中间连接。这在图4中用剖面示出。IGBT的多晶硅层5直接与栅接线端4相连。其余的IGBT单元2的多晶硅层5在组件内并联。图5描绘了多晶硅层5排列的实施例。在这种情况下它大面积复盖芯片并且具有凹槽5’。在图4也可以清楚地看到安排在栅接线端4和主接线端3之间的绝缘体7或为此用的沟。
显然栅接线端4也可以安排在IGBT芯片1的中央。图3示出该实施例。栅接线端4仍是被绝缘体7包围，该绝缘体7使栅接线端4与主接线端3断开。
参考符号表
1   IGBT-芯片
2   IGBT-单元
3   第一主接线端
4   栅接线端(栅极垫片)
5   栅极
5’   凹槽
6   栅指
7   绝缘体
8   栅极框

Claims (8)

1．隔离栅双极型晶体管(IGBT)，包含至少一只具有多个并联IGBT-单元(2)的IGBT芯片(1)，每只芯片具有第1主接线端(3)和第2主接线端以及至少一条与IGBT单元(2)的栅极(5)电气有效连接的栅接线端(4)，其中栅极(5)通过电气并联的多晶硅层形成，其特征为：
IGBT芯片(1)具有按一种大小的无栅指面，该面在无栅指MOS晶体管的情况下导至不均匀的关断，并且多晶硅层直接与该或每条栅接线端(4)有效连接。
2．隔离栅双极型晶体管(IGBT)，包含至少一只具有多个并联IGBT单元(2)的IGBT芯片(1)，每只芯片具有第1主接线端(3)和第2主接线端以及至少一条与IGBT单元(2)的栅极(5)电气有效连接的栅接线端(4)，其中栅极(5)通过电气并联的多晶硅层形成，其特征为：
每一IGBT芯片(1)具有至少0．2cm2的面积，并且多晶硅层直接与该或每条栅接线端(4)有效连接。
3．根据权利要求1或2之一所述的双极型晶体管，其特征为：
第1主接线端(3)由一表面形成，该表面除至少一条栅接线端(4)的至少一个凹槽外是凸出的。
4．根据权利要求1或2之一所述的隔离栅双极型晶体管，其特征为：
在IGBT芯片(1)的边缘，尤其在一个角上安排了栅接线端(4)。
5．根据权利要求4所述的双极型晶体管，其特征为：
安排了包围IGBT芯片(1)的金属化栅极框(8)，该栅极框(8)与栅接线端(4)电气连接，并且在与栅接线端同一芯片面上安排的第一主接线端(3)和栅极框(8)或栅接线端(4)之间安放绝缘体(7)。
6．根据权利要求5所述的双极型晶体管，其特征为：
栅极框(8)具有小于5欧姆的薄层电阻。
7．根据权利要求3和5所述的双极型晶体管，其特征为：
栅极框(8)包围第1主接线端(3)的凸出构形表面区。
8．根据权利要求1或2之一所述的双极型晶体管，其特征为：
栅接线端(4)主要安排在IGBT芯片(1)中央并且被绝缘体(7)包围。
CNB998033847A 1998-02-27 1999-02-25 隔离栅双极型晶体管 Expired - Lifetime CN1183603C (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE19808154A DE19808154A1 (de) 1998-02-27 1998-02-27 Bipolartransistor mit isolierter Gateelektrode
DE19808154.5 1998-02-27
DE19823170.9 1998-05-23
DE1998123170 DE19823170A1 (de) 1998-05-23 1998-05-23 Bipolartransistor mit isolierter Gateelektrode

Publications (2)

Publication Number Publication Date
CN1292153A true CN1292153A (zh) 2001-04-18
CN1183603C CN1183603C (zh) 2005-01-05

Family

ID=26044178

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB998033847A Expired - Lifetime CN1183603C (zh) 1998-02-27 1999-02-25 隔离栅双极型晶体管

Country Status (5)

Country Link
US (1) US6576936B1 (zh)
EP (1) EP1060517A1 (zh)
JP (1) JP2002505525A (zh)
CN (1) CN1183603C (zh)
WO (1) WO1999044240A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104979350A (zh) * 2014-04-14 2015-10-14 株式会社捷太格特 半导体装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060151785A1 (en) * 2005-01-13 2006-07-13 Campbell Robert J Semiconductor device with split pad design
JP2015204375A (ja) * 2014-04-14 2015-11-16 株式会社ジェイテクト 半導体装置
JP6476000B2 (ja) * 2015-02-17 2019-02-27 三菱電機株式会社 半導体装置および半導体モジュール
US9698144B2 (en) * 2015-08-19 2017-07-04 Raytheon Company Field effect transistor having loop distributed field effect transistor cells
US9685438B2 (en) 2015-08-19 2017-06-20 Raytheon Company Field effect transistor having two-dimensionally distributed field effect transistor cells

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987828A (ja) 1982-11-12 1984-05-21 Hitachi Ltd 半導体装置
IE55753B1 (en) * 1983-09-06 1991-01-02 Gen Electric Power semiconductor device with main current section and emulation current section
US4783690A (en) 1983-09-06 1988-11-08 General Electric Company Power semiconductor device with main current section and emulation current section
US4644637A (en) 1983-12-30 1987-02-24 General Electric Company Method of making an insulated-gate semiconductor device with improved shorting region
US4672407A (en) 1984-05-30 1987-06-09 Kabushiki Kaisha Toshiba Conductivity modulated MOSFET
US5528058A (en) 1986-03-21 1996-06-18 Advanced Power Technology, Inc. IGBT device with platinum lifetime control and reduced gaw
US5208471A (en) 1989-06-12 1993-05-04 Hitachi, Ltd. Semiconductor device and manufacturing method therefor
EP0450082B1 (en) 1989-08-31 2004-04-28 Denso Corporation Insulated gate bipolar transistor
JP2858404B2 (ja) 1990-06-08 1999-02-17 株式会社デンソー 絶縁ゲート型バイポーラトランジスタおよびその製造方法
US5448083A (en) 1991-08-08 1995-09-05 Kabushiki Kaisha Toshiba Insulated-gate semiconductor device
US5260590A (en) 1991-12-23 1993-11-09 Harris Corp. Field effect transistor controlled thyristor having improved turn-on characteristics
JPH05206469A (ja) 1992-01-29 1993-08-13 Hitachi Ltd 絶縁ゲート型バイポーラトランジスタ
JPH05235345A (ja) * 1992-02-20 1993-09-10 Nec Corp 半導体装置およびその製造方法
EP0559945B1 (de) 1992-03-13 1996-10-16 Asea Brown Boveri Ag Abschaltbares Leistungshalbleiter-Bauelement
GB2268332A (en) 1992-06-25 1994-01-05 Gen Electric Power transistor with reduced gate resistance and inductance
JP2837033B2 (ja) 1992-07-21 1998-12-14 三菱電機株式会社 半導体装置及びその製造方法
JP3163820B2 (ja) 1992-07-28 2001-05-08 富士電機株式会社 半導体装置
JPH06244429A (ja) 1992-12-24 1994-09-02 Mitsubishi Electric Corp 絶縁ゲート型半導体装置及びその製造方法
DE4315178A1 (de) 1993-05-07 1994-11-10 Abb Management Ag IGBT mit selbstjustierender Kathodenstruktur sowie Verfahren zu dessen Herstellung
JPH07161992A (ja) 1993-10-14 1995-06-23 Fuji Electric Co Ltd 絶縁ゲート型バイポーラトランジスタ
JP2987040B2 (ja) 1993-11-05 1999-12-06 三菱電機株式会社 絶縁ゲート型半導体装置
JPH07235672A (ja) 1994-02-21 1995-09-05 Mitsubishi Electric Corp 絶縁ゲート型半導体装置およびその製造方法
JP3481287B2 (ja) 1994-02-24 2003-12-22 三菱電機株式会社 半導体装置の製造方法
US5539232A (en) 1994-05-31 1996-07-23 Kabushiki Kaisha Toshiba MOS composite type semiconductor device
US5581100A (en) 1994-08-30 1996-12-03 International Rectifier Corporation Trench depletion MOSFET
US5665996A (en) 1994-12-30 1997-09-09 Siliconix Incorporated Vertical power mosfet having thick metal layer to reduce distributed resistance
JPH08186258A (ja) 1995-01-06 1996-07-16 Hitachi Ltd 半導体装置およびその製法
DE19512799C2 (de) 1995-04-05 1998-11-12 Siemens Ag Durch Feldeffekt steuerbares Halbleiterbauelement
JP3384198B2 (ja) 1995-07-21 2003-03-10 三菱電機株式会社 絶縁ゲート型半導体装置およびその製造方法
JP3493903B2 (ja) 1995-09-29 2004-02-03 株式会社デンソー 半導体装置
US5744861A (en) 1995-11-13 1998-04-28 Asea Brown Boveri Ag Power semiconductor module
US5661315A (en) 1995-12-28 1997-08-26 Asea Brown Boveri Ag Controllable power semiconductor component
US6008092A (en) 1996-02-12 1999-12-28 International Rectifier Corporation Short channel IGBT with improved forward voltage drop and improved switching power loss
GB9605672D0 (en) 1996-03-18 1996-05-22 Westinghouse Brake & Signal Insulated gate bipolar transistors
JP3410286B2 (ja) 1996-04-01 2003-05-26 三菱電機株式会社 絶縁ゲート型半導体装置
DE19651108C2 (de) 1996-04-11 2000-11-23 Mitsubishi Electric Corp Halbleitereinrichtung des Gategrabentyps mit hoher Durchbruchsspannung und ihr Herstellungsverfahren
JPH09331062A (ja) 1996-06-11 1997-12-22 Mitsubishi Electric Corp 半導体装置およびその製造方法
DE19705276A1 (de) 1996-12-06 1998-08-20 Semikron Elektronik Gmbh IGBT mit Trench-Gate-Struktur
JP2982785B2 (ja) * 1998-04-03 1999-11-29 富士電機株式会社 デプレッション型ｍｏｓ半導体素子およびｍｏｓパワーｉｃ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104979350A (zh) * 2014-04-14 2015-10-14 株式会社捷太格特 半导体装置

Also Published As

Publication number Publication date
US6576936B1 (en) 2003-06-10
WO1999044240A1 (de) 1999-09-02
EP1060517A1 (de) 2000-12-20
JP2002505525A (ja) 2002-02-19
CN1183603C (zh) 2005-01-05

Similar Documents

Publication Publication Date Title
EP0237932B1 (en) Wiring layout for bipolar and unipolar insulated gate transistors
CN1336689A (zh) 小电感的电路结构
CN109768694A (zh) 一种具有熔断器的功率模块
CN1183603C (zh) 隔离栅双极型晶体管
CN87106746A (zh) 半导体元件
US4862239A (en) Power semiconductor component
CN219513109U (zh) 一种中高压屏蔽栅极功率mosfet版图
US6144046A (en) Power inverter having series connection of semiconductor devices each having an inverse parallel connection of an insulated gate bipolar transistor and a diode
CN109768039A (zh) 一种双面散热功率模块
US5635734A (en) Insulated gate type semiconductor device in which the reliability and characteristics thereof are not deteriorated due to pressing action and power inverter using the same
US4692789A (en) Semiconductor apparatus
JP3124513B2 (ja) 電力半導体スイッチ装置
EP0674380B1 (en) Parallel connection structure for flat type semiconductor switches
CN212342635U (zh) 一种沟槽栅igbt器件
CN115132825A (zh) 绝缘栅双极型晶体管
Nimura et al. A 8 kV 3500 A light triggered thyristor
CN109427709B (zh) 电气器件以及电气装置
US6521919B2 (en) Semiconductor device of reduced thermal resistance and increased operating area
JPH06236990A (ja) Ｍｏｓ制御ダイオード
EP3690939A1 (en) Semiconductor arrangements
EP0077930B1 (en) Gate turn-off thyristor
CN111900202A (zh) 一种沟槽栅igbt器件
CN110767643B (zh) 一种电气器件
CN110208677B (zh) 一种测量垂直结构功率器件阻断电压的装置
CN215955286U (zh) 一种半导体放电管及过电压保护装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: ABB SWITZERLAND CO., LTD.

Free format text: FORMER OWNER: ABB SWITZERLAND HOLDINGS CO., LTD.

Effective date: 20050218

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20050218

Address after: Baden, Switzerland

Patentee after: ABB Schweiz AG

Address before: Baden, Switzerland

Patentee before: Asea Brown Boveri AB

CX01 Expiry of patent term

Granted publication date: 20050105

CX01 Expiry of patent term