CN1255815C - 具有冗余结构的薄膜磁性体存储装置 - Google Patents

具有冗余结构的薄膜磁性体存储装置 Download PDF

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Publication number
CN1255815C
CN1255815C CNB021422907A CN02142290A CN1255815C CN 1255815 C CN1255815 C CN 1255815C CN B021422907 A CNB021422907 A CN B021422907A CN 02142290 A CN02142290 A CN 02142290A CN 1255815 C CN1255815 C CN 1255815C
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CN
China
Prior art keywords
data
mentioned
spare
memory cells
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CNB021422907A
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English (en)
Chinese (zh)
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CN1421864A (zh
Inventor
日高秀人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Mitsubishi Electric Corp
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Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN1421864A publication Critical patent/CN1421864A/zh
Application granted granted Critical
Publication of CN1255815C publication Critical patent/CN1255815C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
CNB021422907A 2001-11-27 2002-08-29 具有冗余结构的薄膜磁性体存储装置 Expired - Fee Related CN1255815C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP360441/2001 2001-11-27
JP2001360441A JP4229607B2 (ja) 2001-11-27 2001-11-27 薄膜磁性体記憶装置
JP360441/01 2001-11-27

Publications (2)

Publication Number Publication Date
CN1421864A CN1421864A (zh) 2003-06-04
CN1255815C true CN1255815C (zh) 2006-05-10

Family

ID=19171247

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021422907A Expired - Fee Related CN1255815C (zh) 2001-11-27 2002-08-29 具有冗余结构的薄膜磁性体存储装置

Country Status (6)

Country Link
US (1) US6865103B2 (https=)
JP (1) JP4229607B2 (https=)
KR (1) KR100489573B1 (https=)
CN (1) CN1255815C (https=)
DE (1) DE10239600A1 (https=)
TW (1) TWI224334B (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004013961A (ja) * 2002-06-04 2004-01-15 Mitsubishi Electric Corp 薄膜磁性体記憶装置
JP3808802B2 (ja) * 2002-06-20 2006-08-16 株式会社東芝 磁気ランダムアクセスメモリ
JP2004079138A (ja) * 2002-08-22 2004-03-11 Renesas Technology Corp 不揮発性半導体記憶装置
KR100955264B1 (ko) * 2003-12-29 2010-04-30 주식회사 하이닉스반도체 효율적으로 에러셀을 리페어 할 수 있는 반도체 메모리 장치
US7123506B2 (en) * 2004-02-13 2006-10-17 Applied Spintronics Technology, Inc. Method and system for performing more consistent switching of magnetic elements in a magnetic memory
JPWO2005081260A1 (ja) * 2004-02-20 2008-01-17 スパンション エルエルシー 半導体記憶装置および半導体記憶装置の冗長方法
JPWO2005081261A1 (ja) * 2004-02-20 2007-08-02 スパンション エルエルシー 半導体記憶装置および半導体記憶装置の冗長制御方法
JP2005276276A (ja) * 2004-03-23 2005-10-06 Toshiba Corp 半導体集積回路装置
KR101069725B1 (ko) * 2009-12-24 2011-10-04 주식회사 하이닉스반도체 반도체 메모리 장치와 이를 위한 고장번지 제어 회로 및 방법
JP6360610B1 (ja) * 2017-11-22 2018-07-18 力晶科技股▲ふん▼有限公司 Ｓｒａｍ装置のための冗長回路、ｓｒａｍ装置、及び半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6317376B1 (en) * 2000-06-20 2001-11-13 Hewlett-Packard Company Reference signal generation for magnetic random access memory devices
DE10032274A1 (de) * 2000-07-03 2002-01-24 Infineon Technologies Ag Integrierte Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt

Also Published As

Publication number Publication date
US6865103B2 (en) 2005-03-08
JP2003162898A (ja) 2003-06-06
US20030099130A1 (en) 2003-05-29
KR20030043596A (ko) 2003-06-02
TWI224334B (en) 2004-11-21
JP4229607B2 (ja) 2009-02-25
KR100489573B1 (ko) 2005-05-16
CN1421864A (zh) 2003-06-04
DE10239600A1 (de) 2003-06-12

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C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CI03 Correction of invention patent

Correction item: Drawings

Correct: See the replacement manual, Figure 12

False: Manual, Figure 12 error

Number: 19

Volume: 22

COR Change of bibliographic data

Free format text: CORRECT: FIGURE OF DESCRIPTION; FROM: FIGURE OF DESCRIPTION 12 ERROR TO: SEE AFTER THE REPLACEMENT FIGURE OF DESCRIPTION 12

ASS Succession or assignment of patent right

Owner name: RENESAS ELECTRONICS CORPORATION

Free format text: FORMER OWNER: MISSUBISHI ELECTRIC CORP.

Effective date: 20140416

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20140416

Address after: Kawasaki, Kanagawa, Japan

Patentee after: Renesas Electronics Corporation

Address before: Tokyo, Japan, Japan

Patentee before: Missubishi Electric Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20060510

Termination date: 20160829

CF01 Termination of patent right due to non-payment of annual fee