CN1197161C - 带有竖直晶体管和掩埋字线的半导体器件 - Google Patents

带有竖直晶体管和掩埋字线的半导体器件 Download PDF

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Publication number
CN1197161C
CN1197161C CNB991044169A CN99104416A CN1197161C CN 1197161 C CN1197161 C CN 1197161C CN B991044169 A CNB991044169 A CN B991044169A CN 99104416 A CN99104416 A CN 99104416A CN 1197161 C CN1197161 C CN 1197161C
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CN
China
Prior art keywords
layer
semiconductor device
word line
buried
vertically oriented
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB991044169A
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English (en)
Chinese (zh)
Other versions
CN1230026A (zh
Inventor
托马斯·S·拉普
约翰·奥尔斯梅尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens Corp
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Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of CN1230026A publication Critical patent/CN1230026A/zh
Application granted granted Critical
Publication of CN1197161C publication Critical patent/CN1197161C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
CNB991044169A 1998-03-25 1999-03-25 带有竖直晶体管和掩埋字线的半导体器件 Expired - Lifetime CN1197161C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US047581 1993-04-13
US09/047,581 US6172390B1 (en) 1998-03-25 1998-03-25 Semiconductor device with vertical transistor and buried word line

Publications (2)

Publication Number Publication Date
CN1230026A CN1230026A (zh) 1999-09-29
CN1197161C true CN1197161C (zh) 2005-04-13

Family

ID=21949806

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB991044169A Expired - Lifetime CN1197161C (zh) 1998-03-25 1999-03-25 带有竖直晶体管和掩埋字线的半导体器件

Country Status (6)

Country Link
US (1) US6172390B1 (https=)
EP (1) EP0948053B1 (https=)
JP (1) JP5175010B2 (https=)
KR (1) KR100643425B1 (https=)
CN (1) CN1197161C (https=)
TW (1) TW410463B (https=)

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US6284593B1 (en) * 2000-11-03 2001-09-04 International Business Machines Corporation Method for shallow trench isolated, contacted well, vertical MOSFET DRAM
DE10111755C1 (de) * 2001-03-12 2002-05-16 Infineon Technologies Ag Verfahren zur Herstellung einer Speicherzelle eines Halbleiterspeichers
US6437388B1 (en) * 2001-05-25 2002-08-20 Infineon Technologies Ag Compact trench capacitor memory cell with body contact
US6610573B2 (en) * 2001-06-22 2003-08-26 Infineon Technologies Ag Method for forming a single wiring level for transistors with planar and vertical gates on the same substrate
TW506059B (en) * 2001-09-25 2002-10-11 Promos Techvologies Inc Forming method for shallow trench
US7224024B2 (en) * 2002-08-29 2007-05-29 Micron Technology, Inc. Single transistor vertical memory gain cell
US6838723B2 (en) * 2002-08-29 2005-01-04 Micron Technology, Inc. Merged MOS-bipolar capacitor memory cell
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US6804142B2 (en) * 2002-11-12 2004-10-12 Micron Technology, Inc. 6F2 3-transistor DRAM gain cell
US7030436B2 (en) 2002-12-04 2006-04-18 Micron Technology, Inc. Embedded DRAM gain memory cell having MOS transistor body provided with a bi-polar transistor charge injecting means
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US6727141B1 (en) * 2003-01-14 2004-04-27 International Business Machines Corporation DRAM having offset vertical transistors and method
US6956256B2 (en) * 2003-03-04 2005-10-18 Micron Technology Inc. Vertical gain cell
US6830968B1 (en) * 2003-07-16 2004-12-14 International Business Machines Corporation Simplified top oxide late process
US8518457B2 (en) * 2004-05-11 2013-08-27 Pulmonox Technologies Corporation Use of inhaled gaseous nitric oxide as a mucolytic agent or expectorant
DE102005034387A1 (de) * 2005-07-22 2007-02-08 Infineon Technologies Ag Trench-DRAM-Halbleiterspeicher mit reduziertem Leckstrom
DE102005035641B4 (de) * 2005-07-29 2010-11-25 Qimonda Ag Herstellungsverfahren für eine Speicherzellenanordnung mit gefalteter Bitleitungs-Anordnung und entsprechende Speicherzellenanordnung mit gefalteter Bitleitungs-Anordnung
US20080108212A1 (en) * 2006-10-19 2008-05-08 Atmel Corporation High voltage vertically oriented eeprom device
US7800093B2 (en) * 2007-02-01 2010-09-21 Qimonda North America Corp. Resistive memory including buried word lines
KR100972900B1 (ko) * 2007-12-31 2010-07-28 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
KR101024771B1 (ko) 2008-12-24 2011-03-24 주식회사 하이닉스반도체 매립 워드라인을 갖는 반도체 소자 및 그 제조 방법
US7948027B1 (en) * 2009-12-10 2011-05-24 Nanya Technology Corp. Embedded bit line structure, field effect transistor structure with the same and method of fabricating the same
KR101139987B1 (ko) * 2010-07-15 2012-05-02 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
TWI553782B (zh) * 2014-04-30 2016-10-11 華邦電子股份有限公司 埋入式字元線及其隔離結構的製造方法
CN105097641B (zh) * 2014-05-09 2017-11-07 华邦电子股份有限公司 埋入式字线及其隔离结构的制造方法
CN109830480B (zh) * 2017-11-23 2022-02-18 联华电子股份有限公司 动态随机存取存储器
US10770585B2 (en) 2018-09-24 2020-09-08 Globalfoundries Inc. Self-aligned buried contact for vertical field-effect transistor and method of production thereof

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US5103276A (en) * 1988-06-01 1992-04-07 Texas Instruments Incorporated High performance composed pillar dram cell
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JPH0414868A (ja) * 1990-05-09 1992-01-20 Hitachi Ltd 半導体記憶装置とその製造方法
JPH0775247B2 (ja) * 1990-05-28 1995-08-09 株式会社東芝 半導体記憶装置
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US5448513A (en) * 1993-12-02 1995-09-05 Regents Of The University Of California Capacitorless DRAM device on silicon-on-insulator substrate
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US5907170A (en) 1997-10-06 1999-05-25 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
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US5949700A (en) 1998-05-26 1999-09-07 International Business Machines Corporation Five square vertical dynamic random access memory cell

Also Published As

Publication number Publication date
KR19990078241A (ko) 1999-10-25
JPH11330422A (ja) 1999-11-30
EP0948053A3 (en) 2003-08-13
KR100643425B1 (ko) 2006-11-13
TW410463B (en) 2000-11-01
EP0948053B1 (en) 2014-04-30
CN1230026A (zh) 1999-09-29
EP0948053A2 (en) 1999-10-06
US6172390B1 (en) 2001-01-09
JP5175010B2 (ja) 2013-04-03

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Owner name: INFINEON TECHNOLOGIES AG

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