CN113270375A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN113270375A
CN113270375A CN202010823141.9A CN202010823141A CN113270375A CN 113270375 A CN113270375 A CN 113270375A CN 202010823141 A CN202010823141 A CN 202010823141A CN 113270375 A CN113270375 A CN 113270375A
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semiconductor chip
resin layer
semiconductor
chip
semiconductor device
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CN113270375B (zh
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前田竹识
高野勇佑
本间庄一
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Kioxia Corp
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Kioxia Corp
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Abstract

实施方式的半导体装置具备具有第一面以及位于第一面的相反侧的第二面的第一半导体芯片。第一粘接层设于第一半导体芯片的第一面。第二半导体芯片具有第三面以及位于该第三面的相反侧的第四面，并在第三面具有连接凸起。第二半导体芯片在第四面上经由第一粘接层粘接于第一半导体芯片的第一面。布线基板在第二半导体芯片的第四面侧连接于连接凸起。第一树脂层在第二半导体芯片与布线基板之间覆盖连接凸起，并设于位于第三面与第四面之间的第二半导体芯片的侧面。第一粘接层覆盖第二半导体芯片的侧面的上部。第一树脂层覆盖该侧面的下部。第一粘接层与第一树脂层在该侧面上相互接触。

Description

半导体装置及其制造方法
关联申请的引用
本申请基于并主张2020年02月17日申请的在先日本专利申请第2020-24545号的优先权的权益，其全部内容通过引用而包含在本申请中。
技术领域
本实施方式涉及半导体装置及其制造方法。
背景技术
在将半导体芯片与中介层进行倒装连接时，覆盖半导体芯片的凸起的底部填料顺着半导体芯片的侧面攀升。由于这样的底部填料的攀升，存在底部填料附着在按压半导体芯片的安装器具上的问题。为了应对这种问题，考虑通过膜来保护安装器具。但是，在该情况下，需要按每个半导体芯片对膜开设吸附孔，生产率降低。此外，由于在每次安装处理时更换膜，因此耗费膜的成本。
在通过质量回流(mass reflow)连接的情况下，由于半导体芯片的翘曲，存在发生凸起的连接不良的隐患。
发明内容
提供能够抑制树脂向安装器具的附着，并且将半导体芯片可靠地与基板连接的半导体装置及其制造方法。
本实施方式的半导体装置具备具有第一面以及位于该第一面的相反侧的第二面的第一半导体芯片。第一粘接层设于第一半导体芯片的第一面。第二半导体芯片具有第三面以及位于该第三面的相反侧的第四面，并在第三面具有连接凸起。第二半导体芯片在第四面上经由第一粘接层粘接于第一半导体芯片的第一面。布线基板在第二半导体芯片的第四面侧，连接于连接凸起。第一树脂层在第二半导体芯片与布线基板之间覆盖连接凸起，并设于位于第三面与第四面之间的第二半导体芯片的侧面。第一粘接层覆盖第二半导体芯片的侧面的上部。第一树脂层覆盖侧面的下部。第一粘接层与第一树脂层在该侧面上相互接触。
根据上述构成，能够提供能够抑制树脂向安装器具的附着、并且将半导体芯片可靠地与基板连接的半导体装置及其制造方法。
附图说明
图1是表示第一实施方式的半导体装置的构成例的截面图。
图2是表示图1的框B1的内部的更详细的构成的截面图。
图3是表示半导体芯片以及树脂层的位置关系的概略俯视图。
图4是表示第一实施方式的半导体装置的制造方法的一例的截面图。
图5是表示接着图4的制造方法的一例的截面图。
图6是表示接着图5的制造方法的一例的截面图。
图7是表示接着图6的制造方法的一例的截面图。
图8是表示接着图7的制造方法的一例的截面图。
图9是表示接着图8的制造方法的一例的截面图。
图10是表示接着图9的制造方法的一例的截面图。
图11是表示接着图10的制造方法的一例的截面图。
图12是表示第二实施方式的半导体装置的制造方法的一例的截面图。
图13是表示接着图12的制造方法的一例的截面图。
图14是表示第三实施方式的半导体装置的构成例的截面图。
图15是表示第三实施方式的半导体装置的制造方法的一例的截面图。
图16是表示接着图15的制造方法的一例的截面图。
图17是表示第四实施方式的半导体装置的构成例的截面图。
图18是表示第五实施方式的半导体装置的构成例的截面图。
图19是表示第五实施方式的半导体装置的制造方法的一例的截面图。
图20是表示接着图19的制造方法的一例的截面图。
图21是表示第五实施方式的变形例的半导体装置的制造方法的一例的截面图。
图22是表示第六实施方式的半导体装置的构成例的截面图。
图23是表示第七实施方式的半导体装置的构成例的截面图。
图24是表示第八实施方式的半导体装置的构成例的截面图。
图25是表示第九实施方式的半导体装置的构成例的截面图。
图26是表示第十实施方式的半导体装置的构成例的截面图。
图27是表示第十一实施方式的半导体装置的构成例的截面图。
具体实施方式
以下，参照附图对本发明的实施方式进行说明。本实施方式不限定本发明。在以下的实施方式中，基板的上下方向表示以搭载半导体芯片的面为上方的情况下的相对方向，有时与沿着重力加速度的上下方向不同。附图为模式图或者概念图，各部分的比率等不一定与现实相同。在说明书与附图中，对于关于已出现的附图叙述过的要素相同的要素，标注相同的附图标记并适当省略详细的说明。
(第一实施方式)
图1是表示第一实施方式的半导体装置的构成例的截面图。半导体装置1具备作为第一半导体芯片的半导体芯片10、半导体芯片15、作为第二半导体芯片的半导体芯片20、布线基板30、作为第一树脂层的粘接层40与粘接层45、作为第二树脂层的树脂层50、接合线60、以及作为第三树脂层的密封树脂70。
半导体装置1例如是NAND型闪存的封装。半导体芯片10例如是NAND型闪存的存储器芯片。半导体芯片10具有作为第一面的背面10A、处于背面10A的相反侧的作为第二面的表面10B、以及处于背面10A与表面10B之间的侧面10C。在半导体芯片10的表面10B设有半导体元件11，被聚酰亚胺等保护膜覆盖。半导体元件11例如可以是存储器单元阵列或者周边电路(CMOS(Complementary Metal Oxide Semiconductor：互补金属氧化物半导体)电路)。存储器单元阵列也可以是将多个存储器单元配置为三维的立体型存储器单元阵列。此外，在表面10B设有与半导体元件11的某一个电连接的焊盘12。
粘接层40设于半导体芯片10的背面10A。粘接层40例如为DAF(Die AttachmentFilm：装片胶膜))，将半导体芯片10与半导体芯片20之间粘接。
半导体芯片20例如为控制存储器芯片的控制器芯片。半导体芯片20具有朝向布线基板的面即背面20A、处于背面20A的相反侧的表面20B、以及处于背面20A与表面20B之间的侧面20C。在半导体芯片20的背面20A设有半导体元件21，被聚酰亚胺等保护膜覆盖。半导体元件21例如可以是构成控制器的CMOS电路。在背面20A设有与半导体元件21电连接的凸起25。凸起25例如使用焊料等低电阻金属材料。
半导体芯片20在表面20B经由粘接层40粘接于半导体芯片10的背面10A。
布线基板30虽未图示但例如可以是包含多个布线层与多个绝缘层的印刷基板、中介层(Interposer)。布线层例如使用铜等低电阻金属。绝缘层例如使用玻璃环氧树脂等绝缘性材料。在布线基板30的表面设有与布线层的某一个电连接的焊盘32。半导体芯片20的金属凸起25经由布线基板30的表面上的焊盘(未图示)与布线层连接。由此，能够经由布线基板30的布线层控制半导体芯片10、20。
树脂层50例如是底部填料或者NCP(Non-Conductive Past)等树脂。树脂层50在半导体芯片20与布线基板30之间覆盖凸起25，保护凸起25与布线基板30之间的连接。此外，在将半导体芯片20的凸起25与布线基板30连接时，树脂层50被通过液体供给。因此，树脂层50将半导体芯片20与布线基板30之间填充，并且顺着半导体芯片20的侧面20C攀升并覆盖该侧面20C的至少下部。另外，参照图2在后面对树脂层50的构成进行说明。
也可以在半导体芯片10的表面10B上层叠其他半导体芯片15。半导体芯片15经由粘接层45粘接于半导体芯片10的表面10B上。半导体芯片15既可以是具有与半导体芯片10相同的构成的存储器芯片，也可以是其他构成的半导体芯片。此外，在图中，除了作为控制器芯片的半导体芯片20之外，还层叠有两个半导体芯片20、15。但是，半导体芯片的层叠数也可以是3个以上。此外，控制器芯片也可以与布线基板30的表面平行地配置多个。
接合线60将半导体芯片10、15、20的焊盘12、16、32连接。
而且，密封树脂70将半导体芯片10、15、20，树脂层50，接合线60等埋入密封。由此，半导体装置1将多个半导体芯片10、15、20构成为一个半导体封装。
图2是表示图1的框B1的内部的更详细的构成的截面图。在本实施方式中，粘接层40设于半导体芯片10的背面10A与半导体芯片20的表面20B之间，并覆盖半导体芯片20的侧面20C的上部。即，粘接层40从半导体芯片20的表面20B起将侧面20C的上部覆盖至中途。
另一方面，树脂层50如上述那样，从半导体芯片20的背面20A顺着侧面20C攀升，并覆盖侧面20C的下部。即，树脂层50从半导体芯片20的背面20A覆盖至侧面20C的下部中途。
粘接层40与树脂层50在侧面20C上相互接触，密封树脂70未进入它们之间。由此，侧面20C被粘接层40以及树脂层50覆盖，不与密封树脂70接触。密封树脂70通过粘接层40以及树脂层50而与半导体芯片20的侧面20C分离。
此外，树脂层50在树脂层50与半导体芯片20的侧面20C的边界部中具有凹陷RC。粘接层40在粘接层40与侧面20C的边界部中具有与凹陷RC对应的突出部PR。像这样形成凹陷RC以及突出部PR是由于在通过粘接层40将半导体芯片10粘接于半导体芯片20之后，树脂层50顺着半导体芯片20的侧面20C攀升。即，通过粘接层40将半导体芯片10粘接于半导体芯片20，将半导体芯片20的凸起25与布线基板30连接，之后，向半导体芯片20与布线基板30之间供给树脂层50。或者通过粘接层40将半导体芯片10粘接于半导体芯片20，向布线基板30上涂覆树脂层50，之后，使半导体芯片20的凸起25进入树脂层50内而连接于布线基板30。通过这样的半导体装置1的制造工序，形成凹陷RC以及突出部PR。由此，凹陷RC与突出部PR可以形成于半导体芯片20的整周上而非外周的一部分。
此外，半导体芯片20在与树脂层50接触之前，与粘接层40粘接。因此，粘接层40覆盖半导体芯片20的表面20B的整体。另一方面，树脂层50不与半导体芯片20的表面20B接触。即，树脂层50不进入半导体芯片20的表面20B与粘接层40之间，未夹设在其间。
图3是表示半导体芯片10、20以及树脂层50的位置关系的概略俯视图。半导体芯片10比半导体芯片20大，在从半导体芯片10的表面10B的上方观察时，半导体芯片10的外缘与半导体芯片20的外缘相比位于外侧。树脂层50设于半导体芯片20的背面20A以及侧面20C，以包围半导体芯片20的周围的方式设置。如图1所示，树脂层50也设于半导体芯片10的背面10A与布线基板30之间。由于树脂层50顺着半导体芯片20的背面20A侧攀升，因此其侧面呈正锥状。在粘接层40附近，树脂层50沿粘接层40的底面具有与正锥状相反方向的斜度。
接下来，对本实施方式的半导体装置1的制造方法进行说明。
图4～图11是表示第一实施方式的半导体装置的制造方法的一例的截面图。
首先，在半导体芯片10的表面10B上粘附研磨树脂带TP1。接下来，如图4所示，通过研磨树脂带TP1保护半导体芯片10的表面10B的半导体元件11，且使用CMP(ChemicalMechanical Polishing：化学机械抛光)法将半导体芯片10的背面10A研磨而薄化。此时，半导体芯片10还未被单片化，处于半导体晶片(半导体基板)10W的状态。通过CMP的研磨机GD，对半导体晶片10W的背面10A进行研磨。此时，半导体晶片10W还可以被其他机械式地磨削、研磨而薄化，也可以通过湿式蚀刻而薄化。
接下来，向半导体晶片10W的背面10A粘接粘接层40。接下来，如图5所示，经由粘接层40在切割树脂带TP2上粘附半导体晶片10W的背面10A。
接下来，如图6所示，在切割树脂带TP2上，将半导体晶片10W切割而将半导体晶片10W单片化成半导体芯片10。此时，由于半导体晶片10W的表面10B朝向上方，因此切割的对准变得容易。切割以激光切割或者刀片切割来执行即可。也可以通过扩大切割树脂带TP2，来将半导体晶片10W单片化成半导体芯片10。
接下来，如图7所示，在切割后的半导体芯片10的表面10B粘附其他树脂带TP3，使半导体芯片10向树脂带TP3移动。由此，从粘接层40去除切割树脂带TP2，使粘接层40露出。
接下来，如图8所示，将半导体芯片20的表面20B粘接于半导体芯片10的背面10A的粘接层40。在半导体芯片20的背面20A设有凸起25。半导体芯片20与各个半导体芯片10对应地粘接。
接下来，如图9所示，在布线基板30的表面的凸起25的连接位置涂覆液状的树脂层50的材料。树脂层50例如使用底部填料材料或者NCP。树脂层50的材料也可以是含有还原剂的NCP。或者也可以在向凸起25供给还原剂(助焊剂)之后，一边使凸起25与树脂层50接触一边与布线基板30进行倒装芯片连接。能够一边利用还原剂去除凸起25的表面的金属氧化膜一边将半导体芯片20与布线基板30进行倒装芯片连接。由此，抑制凸起25与布线基板30的焊盘的接触不良。
接下来，通过安装器具MT拾取图8的半导体芯片10、20。如图10所示，安装器具MT使半导体芯片10的背面10A以及半导体芯片20的背面20A与布线基板30的表面对置，并使半导体芯片20的凸起25与树脂层50接触。而且，安装器具MT使凸起25在树脂层50内与布线基板30连接。通过热处理，将凸起25与布线基板30的焊盘连接。此时，树脂层50顺着半导体芯片20的侧面20C攀升。但是，由于半导体芯片20的表面20B被粘接层40覆盖，因此树脂层50不会附着于表面20B。树脂层50在半导体芯片20与布线基板30之间覆盖凸起25，在半导体芯片20的侧面20C的下部形成。
另外，半导体芯片20的厚度例如优选的是20μm～70μm。在半导体芯片20的厚度小于20μm的情况下，由于形成于半导体芯片20的晶体管的耗尽层的影响，半导体芯片的动作变得困难。另一方面，在半导体芯片20的厚度超过70μm的情况下，存在树脂层50未到达粘接层40的情况。在该情况下，半导体芯片20的侧面20C未被树脂层50覆盖，存在不受保护的隐患。在该情况下，存在密封树脂70与半导体芯片20的侧面20C接触的隐患。
而且，安装器具MT将其他半导体芯片15层叠于半导体芯片10上。半导体芯片15通过粘接层45粘接于半导体芯片10的表面10B上。
接下来，使用接合线60，将半导体芯片10、15、20以及布线基板30的焊盘连接。之后，在模塑成形工序中，通过密封树脂70将布线基板30上的半导体芯片10、20、15树脂密封。由此，图1所示的半导体装置1的封装完成。
如此，根据本实施方式，在半导体芯片20粘接于半导体芯片10上之后，与半导体芯片10一同倒装芯片连接于布线基板30上。
如果在仅将半导体芯片20与布线基板30进行倒装芯片连接的情况下，安装器具MT吸附半导体芯片20，一边与布线基板30上的树脂层50接触一边将凸起25与布线基板30连接。在该情况下，树脂层50顺着半导体芯片20的侧面20C攀升。可以考虑通过膜(未图示)保护安装器具的表面以不使底部填料附着于安装器具MT。但是，在该情况下，如上述那样，需要按每个半导体芯片20在保护膜开设吸附孔，生产率降低。此外，需要在每次安装处理时更换膜，因此耗费膜的成本。而且，树脂层50也绕到半导体芯片20的表面20B上，树脂层50进入半导体芯片20与粘接层40之间。在该情况下，在可靠性试验的吸湿回流中，存在半导体芯片20与粘接层40剥离的隐患。
与此相对，在本实施方式的制造方法中，在半导体芯片20粘接于半导体芯片10上之后，与半导体芯片10一同倒装芯片连接于布线基板30上。这样，半导体芯片10、20的层叠工序、与半导体芯片20的倒装芯片连接工序的顺序颠倒。由此，即使树脂层50顺着半导体芯片20的侧面20C攀升，也被半导体芯片10阻碍而无法到达安装器具MT。因此，本实施方式无需对安装器具MT进行覆盖的膜，能够缩短生产时间，并且降低制造成本。
此外，由于与半导体芯片20的倒装芯片连接工序相比先执行半导体芯片10、20的层叠工序，因此树脂层50不会绕到半导体芯片20的表面20B上。即，即使树脂层50从半导体芯片20的侧面20C攀升，也由于粘接层40已经粘接于半导体芯片20的表面20B，因此树脂层50不与半导体芯片20的表面20B接触。另一方面，如图2所示，粘接层40也与半导体芯片20的背面20A以及其侧面20C的上部接触。由此，半导体芯片20与粘接层40的紧贴性提高，能够抑制在可靠性试验的吸湿回流中，半导体芯片20与粘接层40剥离。
优选的是从半导体芯片10的表面10B的上方观察时，半导体芯片10比半导体芯片20大，半导体芯片10的外缘位于半导体芯片20的外缘的外侧。由此，能够更有效地抑制树脂层50到达安装器具MT。
但是，半导体芯片10并非一定比半导体芯片20大。即使半导体芯片10的大小等于或小于半导体芯片20的大小，半导体芯片10也能够将安装器具MT与半导体芯片20的距离离开半导体芯片10的厚度的量。因此，仅通过将半导体芯片10、20的层叠工序、与半导体芯片20的倒装芯片连接工序的顺序颠倒，便能够获得本实施方式的效果。
树脂层50以在半导体芯片20的背面20A与布线基板30之间填满凸起25的周围的方式设置。而且，如图2所示，树脂层50顺着半导体芯片20的侧面20C而与粘接层40的底面的一部分接触。由此，能够良好地保护半导体芯片20的侧面20C。
半导体芯片20以粘接于半导体芯片10的状态向布线基板30进行倒装芯片连接。因此，即使半导体芯片20的厚度为70μm以下、较薄，半导体芯片20的翘曲也能够被半导体芯片10矫正。其结果，在倒装芯片连接中，凸起25能够可靠地连接于布线基板30。
(第二实施方式)
在第一实施方式中，如图5以及图6所示，为了切割的对准，使半导体晶片10W从树脂带TP1向树脂带TP2移动，将半导体晶片10W的表面10B朝上。
但是，例如在使用红外线等对准的情况下，能够从半导体晶片10W的背面10A进行对准。在该情况下，无需使半导体晶片10W从树脂带TP1向树脂带TP2移动。因此，在第二实施方式中，共用树脂带TP1来进行半导体晶片10W的研磨、切割以及半导体芯片20的粘附。
图12以及图13是表示第二实施方式的半导体装置的制造方法的一例的截面图。如图4所示，在树脂带TP1上粘附半导体晶片10W的表面10B，并直接在树脂带TP1上对半导体晶片10W的背面10A进行研磨，在背面10A形成粘接层40。
如图12以及图13所示，保持将半导体晶片10W粘附于树脂带TP1的状态对半导体晶片10W进行切割并将半导体晶片10W单片化成半导体芯片10。接下来，如图8所示，将半导体芯片20的表面20B粘接于半导体芯片10的背面10A的粘接层40。之后，经过图9～图11所示的工序，图1所示的半导体装置1的封装完成。
根据第二实施方式，无需频繁变更树脂带，因此能够进一步缩短生产时间，并且进一步降低制造成本。
第二实施方式的构成可以与第一实施方式的构成相同。因此，第二实施方式也能够获得第一实施方式的效果。
(第三实施方式)
图14是表示第三实施方式的半导体装置的构成例的截面图。根据第三实施方式，粘接层40以与半导体芯片20的表面20B大致相等的尺寸设置。粘接层40未设置在半导体芯片10的背面10A的整体上，而是设于其一部分的区域。第三实施方式的其他构成可以与第一或者第二实施方式的对应的构成相同。因此，第三实施方式也能够获得与第一或者第二实施方式相同的效果。
图15以及图16是表示第三实施方式的半导体装置的制造方法的一例的截面图。经过图4的工序之后，如图15所示，保持将半导体晶片10W粘附于树脂带TP1的状态对半导体晶片10W进行切割而将半导体晶片10W单片化成半导体芯片10。此时，粘接层40未粘附于半导体晶片10W。
在图15中，虽然未进行图示，但粘接层40粘附于半导体芯片20。即，粘接层40在半导体芯片20被切割之前已粘附于半导体晶片的表面20B。通过切割该半导体晶片而单片化，形成具有粘接层40的半导体芯片20。粘接层40通过切割被切断为与半导体芯片20相同的尺寸。
接下来，如图16所示，将半导体芯片20配置于半导体芯片10的背面10A上。由此，半导体芯片20通过粘接层40粘附于半导体芯片10的背面10A上。
之后，经过图9～图11所示的工序，图14所示的半导体装置1的封装完成。
在第三实施方式中，粘接层40未覆盖半导体芯片10的背面10A整体。但是，粘接层40将半导体芯片10与半导体芯片20之间的整体填埋。因此，在第三实施方式中，树脂层50也不与半导体芯片20的表面20B接触。由此，第三实施方式能够获得第一实施方式的效果。此外，第三实施方式与第二实施方式同样无需频繁地变更树脂带，因此也能够获得与第二实施方式相同的效果。
(第四实施方式)
图17是表示第四实施方式的半导体装置的构成例的截面图。根据第四实施方式，树脂层50在半导体芯片10的背面10A的正下方设于整体。即，树脂层50整体地填充于半导体芯片10的背面10A与布线基板30的表面之间。
关于树脂层50，在图9所示的工序中，使向布线基板30上供给的树脂层50的液体材料的量、和半导体芯片10的背面10A与布线基板30的表面之间的空间的容积大致相等即可。或者也可以在将半导体芯片20与半导体芯片10一同倒装芯片连接于布线基板30上之后，以填埋半导体芯片10的背面10A与布线基板30的表面之间的空间的方式供给树脂层50的液体材料。半导体芯片10的背面10A的外缘部与布线基板30之间通过树脂层50填埋。
若树脂层50固化，则能够支承半导体芯片10。由此，在第四实施方式中，不需要后述的间隔件芯片。第四实施方式的其他构成可以与第一实施方式相同。由此，第四实施方式能够获得与第一实施方式相同的效果。
(第五实施方式)
图18是表示第五实施方式的半导体装置的构成例的截面图。根据第五实施方式，间隔件芯片80配置于半导体芯片20的两侧。间隔件芯片80设于半导体芯片10的背面10A的正下方。即，在半导体芯片20的周围中，间隔件芯片80设于半导体芯片10与布线基板30之间。在从半导体芯片10的表面10B的上方观察时，间隔件芯片80也可以具有四边形的框形状以包围半导体芯片20的周围。或者间隔件芯片80也可以分割地配置于半导体芯片20的四方。
间隔件芯片80的背面通过粘接层47粘接于布线基板30的表面上。此外，间隔件芯片80的表面在半导体芯片10的背面10A粘接于粘接层40。在半导体芯片10与布线基板30之间，在间隔件芯片80的周围埋入有密封树脂70。
间隔件芯片80具有与半导体芯片20大致相等的厚度。此外，间隔件芯片80可以是与半导体芯片20的基板(例如硅基板)相同的材料。由此，间隔件芯片80能够在半导体芯片20的周围支承半导体芯片10，并能够矫正半导体芯片10的翘曲、使半导体芯片10平坦。第五实施方式的其他构成可以与第一实施方式相同。由此，第五实施方式还能够获得与第一实施方式相同的效果。
图19以及图20是表示第五实施方式的半导体装置的制造方法的一例的截面图。经过图4～图8的工序之后，如图19所示，将间隔件芯片80粘接于半导体芯片20的周围的粘接层40上。在间隔件芯片80预先设有粘接层47。接下来，经过图9所示的工序之后，通过安装器具MT拾取半导体芯片10、20。接下来，如图20所示，使半导体芯片10的背面10A以及半导体芯片20的背面20A与布线基板30的表面对置，将半导体芯片20与布线基板30倒装芯片连接。在将半导体芯片20的凸起25与布线基板30连接时，将间隔件芯片80设于半导体芯片10与布线基板30之间。粘接层47在将半导体芯片20与布线基板30倒装芯片连接时，将间隔件芯片80粘接于布线基板30。
之后，经过图11的工序，图18所示的半导体装置1完成。
根据第五实施方式，间隔件芯片80能够在半导体芯片20的周围支承半导体芯片10，并能够矫正半导体芯片10的翘曲、使半导体芯片10平坦。
(变形例)
图21是表示第五实施方式的变形例的半导体装置的制造方法的一例的截面图。在本变形例中，在布线基板30上预先粘接间隔件芯片80。之后，经过图10以及图11所示的工序，将半导体芯片20倒装芯片连接于布线基板30上。由此，可获得具有与第五实施方式相同的构造的半导体装置1。
(第六实施方式)
图22是表示第六实施方式的半导体装置的构成例的截面图。第六实施方式是第四以及第五实施方式的组合。根据第六实施方式，与第五实施方式同样，在半导体芯片20的周围，间隔件芯片80设于半导体芯片10与布线基板30之间。
而且，树脂层50整体地填充于半导体芯片10的背面10A与布线基板30的表面之间。由此，半导体芯片20以及间隔件芯片80的周围(侧面)被树脂层50覆盖而受到保护。
第六实施方式的其他构成可以与第四或者第五实施方式相同。因此，第六实施方式能够获得第四以及第五实施方式的效果。
(第七实施方式)
图23是表示第七实施方式的半导体装置的构成例的截面图。第七实施方式是将第三实施方式与第五实施方式的间隔件芯片80组合的实施方式。因此，粘接层40以半导体芯片20的表面20B的尺寸设置，仅设于半导体芯片20的表面20B与半导体芯片10的背面10A之间。而且，在半导体芯片20的周围，间隔件芯片80设于半导体芯片10与布线基板30之间。因此，在间隔件芯片80与半导体芯片10之间未设置粘接层40，而是填充有密封树脂70。
第七实施方式的其他构成可以与第三或者第五实施方式的对应的构成相同。因此，第七实施方式能够获得第三以及第五实施方式的效果。
另外，在第七实施方式中，间隔件芯片80未通过粘接层40粘接于半导体芯片10。因此，在第七实施方式的制造方法中，第七实施方式的间隔件芯片80如上述第五实施方式的变形例那样，通过粘接层47预先粘接在布线基板30上即可。由此，间隔件芯片80通过粘接层47固定于布线基板30的规定位置。
(第八实施方式)
图24是表示第八实施方式的半导体装置的构成例的截面图。在第八实施方式中，未在第五实施方式的间隔件芯片80之下设置粘接层47。在间隔件芯片80与布线基板30之间填充有密封树脂70。另一方面，间隔件芯片80粘接于粘接层40。
第八实施方式的其他构成可以与第五实施方式的对应的构成相同。因此，第八实施方式能够获得第五实施方式的效果。
另外，在第八实施方式中，由于未设置粘接层47，因此在第八实施方式的制造方法中，间隔件芯片80与第五实施方式同样，经由粘接层40粘接于半导体芯片10。由此，间隔件芯片80在半导体芯片20的倒装芯片连接时，配置于布线基板30的规定位置。
(第九实施方式)
图25是表示第九实施方式的半导体装置的构成例的截面图。在第九实施方式中，第八实施方式的粘接层40不在半导体芯片20以及间隔件芯片80连续而是各自分离。因此，粘接层40分别和半导体芯片20与半导体芯片10之间、以及间隔件芯片80与半导体芯片10之间对应地设置。第九实施方式的其他构成可以与第八实施方式的对应的构成相同。因此，第九实施方式能够获得第八实施方式的效果。
另外，在第九实施方式的制造方法中，预先在间隔件芯片80设置粘接层40，将间隔件芯片80粘接于半导体芯片10。由此，间隔件芯片80在半导体芯片20的倒装芯片连接时，配置于布线基板30的规定位置。
(第十实施方式)
图26是表示第十实施方式的半导体装置的构成例的截面图。第十实施方式是第四以及第九实施方式的组合。根据第十实施方式，在半导体芯片20以及间隔件芯片80的周围，树脂层50整体地填充于半导体芯片10的背面10A与布线基板30的表面之间。由此，半导体芯片20以及间隔件芯片80的周围(侧面)被树脂层50覆盖而受到保护。而且，在间隔件芯片80与布线基板30之间也填充树脂层50。
第十实施方式的其他构成可以与第九实施方式的对应的构成相同。因此，第十实施方式能够获得第四以及第九实施方式的效果。
(第十一实施方式)
图27是表示第十一实施方式的半导体装置的构成例的截面图。第十一实施方式是第四以及第七实施方式的组合。根据第十一实施方式，在半导体芯片20以及间隔件芯片80的周围，树脂层50整体地填充于半导体芯片10的背面10A与布线基板30的表面之间。由此，半导体芯片20以及间隔件芯片80的周围(侧面)被树脂层50覆盖而受到保护。而且，在间隔件芯片80与半导体芯片10之间也填充树脂层50。
第十一实施方式的其他构成可以与第七实施方式的对应的构成相同。因此，第十一实施方式能够获得第四以及第七实施方式的效果。
虽然对本发明的若干实施方式进行了说明，但这些实施方式作为例子而示出，无意限定发明的范围。这些新的实施方式能够以其他各种方式实施，在不脱离发明的主旨的范围内，能够进行各种省略、替换、变更。这些实施方式及其变形包含于发明的范围、主旨内，同样也包含于权利要求书所记载的发明及其等同的范围内。

Claims (11)

1.一种半导体装置，具备：
第一半导体芯片，具有第一面以及位于所述第一面的相反侧的第二面；
第一树脂层，设于所述第一面；
第二半导体芯片，具有设有连接凸起的第三面、以及位于所述第三面的相反侧且与所述第一树脂层接触的第四面；
布线基板，与所述连接凸起连接；以及
第二树脂层，在所述第二半导体芯片与所述布线基板之间覆盖所述连接凸起，设于位于所述第三面与所述第四面之间的所述第二半导体芯片的侧面，
所述第一树脂层覆盖所述侧面的上部，
所述第二树脂层覆盖所述侧面的下部，
所述第一树脂层与所述第二树脂层在所述侧面上相互接触。
2.如权利要求1所述的半导体装置，
所述第二树脂层在所述第二树脂层与所述第二半导体芯片的所述侧面的边界部具有凹陷，
所述第一树脂层在所述第一树脂层与所述第二半导体芯片的所述侧面的边界部具有与所述凹陷对应的突出部。
3.如权利要求1所述的半导体装置，
所述第二树脂层从所述第二半导体芯片的所述第三面起覆盖至所述侧面的中途。
4.如权利要求1所述的半导体装置，
所述第一树脂层从所述第二半导体芯片的所述第四面起覆盖至所述侧面的中途。
5.如权利要求1所述的半导体装置，
在从所述第二面的上方观察时，
所述第一半导体芯片的外缘与所述第二半导体芯片的外缘相比位于外侧，所述第二树脂层也设于所述第一半导体芯片的外缘部与所述布线基板之间。
6.如权利要求1所述的半导体装置，
在从所述第二面的上方观察时，
所述第一半导体芯片的外缘与所述第二半导体芯片的外缘相比位于外侧，在所述第二半导体芯片的周围，还具备设于所述第一半导体芯片与所述布线基板之间的间隔件芯片。
7.如权利要求6所述的半导体装置，
还具备在所述第一半导体芯片与所述布线基板之间将所述间隔件芯片的周围填埋的第三树脂层。
8.如权利要求6所述的半导体装置，
所述间隔件芯片为硅。
9.如权利要求1所述的半导体装置，
在从所述第二面的上方观察时，所述第一树脂层为与所述第二半导体芯片大致相等的尺寸。
10.一种半导体装置的制造方法，具备以下步骤：
在具有第一面以及第二面的第一半导体基板的所述第一面，形成第一树脂层，所述第二面位于所述第一面的相反侧；
将所述第一半导体基板单片化成多个第一半导体芯片；
使具有第三面以及第四面且在所述第三面具有连接凸起的第二半导体芯片的所述第四面与所述第一树脂层接触并固定，所述第四面位于所述第三面的相反侧；
使所述第一面与布线基板对置地将所述连接凸起与布线基板连接，
在所述第二半导体芯片与所述布线基板之间覆盖所述连接凸起地、在所述第二半导体芯片的侧面的下部形成第二树脂层。
11.如权利要求10所述的半导体装置的制造方法，
在第一树脂带上粘附第二面，将所述第一面研磨，在所述第一面形成所述第一树脂层，
经由所述第一树脂层将所述第一面粘附于第二树脂带上，将所述第一半导体基板单片化成所述第一半导体芯片，
在第三树脂带上粘附所述第二面，使所述第四面与所述第一半导体芯片的所述第一面的所述第一树脂层接触并固定，
在所述布线基板上涂覆所述第二树脂层的材料，
使所述第一面与所述布线基板对置地将所述连接凸起在所述第二树脂层内与所述布线基板连接。
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