CN113903731A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN113903731A
CN113903731A CN202110059849.6A CN202110059849A CN113903731A CN 113903731 A CN113903731 A CN 113903731A CN 202110059849 A CN202110059849 A CN 202110059849A CN 113903731 A CN113903731 A CN 113903731A
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semiconductor chip
resin layer
semiconductor
semiconductor device
chip
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CN202110059849.6A
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丹羽惠一
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Kioxia Corp
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Kioxia Corp
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Abstract

本实施方式的半导体装置具备布线基板、第一半导体芯片、树脂层、以及第二半导体芯片。第一半导体芯片具有第一面和作为该第一面的相反侧的第二面，在第一面侧经由连接凸块而与布线基板连接。树脂层被设为在第一半导体芯片与布线基板之间覆盖连接凸块，在第一半导体芯片的周围，上表面与第一半导体芯片的第二面大致平行。第二半导体芯片具有第三面和作为该第三面的相反侧的第四面，在第三面侧经由粘合层而与第一半导体芯片的第二面以及树脂层的上表面粘合。从所述第二半导体芯片的第四面的上方观察时，树脂层的上表面比第二半导体芯片的外缘的至少一部分向外侧突出。

Description

半导体装置及其制造方法
相关申请的引用
本申请以2020年7月6日提出申请的在先的日本专利申请第2020－116296号的优先权利益为基础，并且谋求其利益，此处通过引用而包含其内容整体。
技术领域
本实施方式涉及半导体装置及其制造方法。
背景技术
在半导体装置的封装构造中，已知有在与基板进行倒装芯片连接的控制器芯片的上方层叠有(多个)存储器芯片的构造。例如已知有在控制器芯片的周围设置间隔件芯片并利用控制器芯片以及间隔件芯片支承存储器芯片的间隔件构造。
但是，由于使用间隔件芯片，所以组装成本变高，另外，会导致工序数增加。而且，难以在控制器芯片与间隔件芯片之间使高度一致，若产生台阶，则最下层的存储器芯片的润湿性将会恶化。而且，也有隧道部的模具填充性恶化的情况。
发明内容
提供无需使用间隔件芯片就能够更适当地支承半导体芯片的半导体装置及其制造方法。
本实施方式的半导体装置具备布线基板、第一半导体芯片、树脂层、第二半导体芯片。第一半导体芯片具有第一面和作为该第一面的相反侧的第二面，并在第一面具有连接凸块，所述第一半导体芯片在第一面侧经由连接凸块而与布线基板连接。树脂层在第一半导体芯片与布线基板之间覆盖连接凸块，在第一半导体芯片的周围，被设为上表面与第一半导体芯片的第二面大致平行。第二半导体芯片具有第三面和作为该第三面的相反侧的第四面，在第三面具有粘合层，所述第二半导体芯片在第三面侧经由粘合层而与第一半导体芯片的第二面以及树脂层的上表面粘合。从所述第二半导体芯片的第四面的上方观察时，树脂层的上表面比第二半导体芯片的外缘的至少一部分向外侧突出。
根据上述的构成，能够提供无需使用间隔件芯片就可更适当地支承半导体芯片的半导体装置及其制造方法。
附图说明
图1是表示第一实施方式的半导体装置的构成例的剖面图。
图2是表示图1的布线基板、半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图3是表示第一实施方式的半导体装置的制造方法的一个例子的图。
图4是表示接着图3的半导体装置的制造方法的一个例子的图。
图5是表示接着图4的半导体装置的制造方法的一个例子的图。
图6是表示接着图5的半导体装置的制造方法的一个例子的图。
图7是表示接着图6的半导体装置的制造方法的一个例子的图。
图8是表示接着图7的半导体装置的制造方法的一个例子的图。
图9是表示接着图8的半导体装置的制造方法的一个例子的图。
图10是表示接着图9的半导体装置的制造方法的一个例子的图。
图11是表示接着图10的半导体装置的制造方法的一个例子的图。
图12是表示接着图11的半导体装置的制造方法的一个例子的图。
图13A是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图13B是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图14A是表示涂覆量较少的情况下的树脂层的材料的一个例子的图。
图14B是表示涂覆量较多的情况下的树脂层的材料的一个例子的图。
图15A是表示树脂层的材料的涂覆位置的一个例子的俯视图。
图15B是表示图15A的涂覆位置处的半导体芯片以及树脂层的位置关系的俯视图。
图15C是表示树脂层的材料的涂覆位置的一个例子的俯视图。
图15D是表示图15C的涂覆位置处的半导体芯片以及树脂层的位置关系的俯视图。
图16A是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图16B是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图16C是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
图16D是表示半导体芯片以及树脂层的位置关系的一个例子的俯视图。
具体实施方式
以下，参照附图对本发明的实施方式进行说明。本实施方式并不限定本发明。在以下的实施方式中，布线基板的上下方向表示以搭载半导体芯片的面为上方的情况下的相对方向，有时与遵循重力加速度的上下方向不同。附图为示意性或者概念性的图，各部分的比率等并不一定与现实相同。在说明书与附图中，对于与在已出现的附图中描述过的要素相同的要素，标注相同的附图标记并适当省略详细的说明。另外，在之后的记载中，在称为半导体芯片或树脂层的中心位置的情况下，中心位置可以是，假定为该半导体芯片或树脂层由均匀的原材料制成并且是对从上观察时的轮廓求出的重心位置。
(第一实施方式)
图1是表示第一实施方式的半导体装置1的构成例的剖面图。半导体装置1具备布线基板10、半导体芯片20、30～33、粘合层40～43、金属材料70、树脂层80、接合线90、以及密封树脂91。半导体装置1例如是NAND型闪存的封装。
布线基板10也可以是包含布线层11与绝缘层15的印刷基板、中介层。在布线层11中例如使用铜、镍或者它们的合金等低电阻金属。在绝缘层15中例如使用玻璃环氧树脂等绝缘性材料。在图中，仅在绝缘层15的表面与背面设有布线层11。但是，布线基板10也可以具有将多个布线层11以及多个绝缘层15层叠而构成的多层布线构造。布线基板10例如也可以具有如中介层(Interposer)那样贯通其表面与背面的贯通电极12。
在布线基板10的表面设有设于布线层11上的阻焊(Solder resist)层14。阻焊层14是用于保护布线层11不受金属材料70影响并抑制短路不良的绝缘层。在阻焊层14设有开口部OP，布线层11的一部分以及绝缘层15从开口部OP露出。
在布线基板10的背面也设有设于布线层11上的阻焊层14。在从阻焊层14露出的布线层11设有金属凸块13。金属凸块13是为了将未图示的其他部件与布线基板10电连接而设置的。
半导体芯片20设于布线基板10的表面侧。半导体芯片20例如是控制存储器芯片的控制器芯片。在半导体芯片20的面向布线基板10的面设有未图示的半导体元件。半导体元件例如可以是构成控制器的CMOS(Complementary Metal Oxide Semiconductor，互补金属氧化物半导体)电路。在半导体芯片20的背面设有与半导体元件电连接的电极柱21。在电极柱21中例如使用了铜、镍或者它们的合金等低电阻金属材料。
作为连接凸块的电极柱21插入于布线基板10的开口部OP。在电极柱21的周围设有金属材料70。电极柱21经由金属材料70而与在开口部OP中露出的布线层11电连接。金属材料70中例如使用了焊料、银、铜等低电阻金属材料。金属材料70例如在开口部OP内覆盖布线基板10的布线层11的一部分，并且也覆盖了半导体芯片20的电极柱21的侧面的一部分。由此，金属材料70将半导体芯片20的电极柱21与布线基板10的布线层11电连接。
更详细地说，半导体芯片20具有面20a与作为该面20a的相反侧的面20b，在面20a上具有电极柱21。另外，半导体芯片20在面20a侧经由电极柱21而与布线基板10连接。
在半导体芯片20的周围以及半导体芯片20与布线基板10之间设有树脂层(底部填充)80。树脂层80例如是使NCP(Non Conductive Past)固化而成的，将半导体芯片20的周围覆盖而保护。
更详细地说，树脂层80在半导体芯片20与布线基板10之间覆盖电极柱21。另外，树脂层80在半导体芯片20的周围设为上表面S与半导体芯片20的面20b大致平行。如图1所示，树脂层80具有大致梯形状的剖面形状。即，在树脂层80的外周端部设置有梯度。因而，树脂层80的下部的面积比上表面S的面积大。树脂层80的上方向是图1的纸面上方向。树脂层80的下方向是图1的纸面下方向。
在半导体芯片20之上经由粘合层40粘合有半导体芯片30。半导体芯片30例如是包含NAND型闪存的存储器芯片。半导体芯片30在其表面具有半导体元件(未图示)。半导体元件例如也可以是存储器单元阵列及其周边电路(CMOS电路)。存储器单元阵列也可以是将多个存储器单元三维配置而成的立体型存储器单元阵列。另外，在半导体芯片30上经由粘合层41粘合有半导体芯片31。在半导体芯片31上经由粘合层42粘合有半导体芯片32。在半导体芯片32上经由粘合层43粘合有半导体芯片33。半导体芯片31～33例如与半导体芯片30相同，是包含NAND型闪存的存储器芯片。半导体芯片30～33也可以是相同的存储器芯片。在图中，除了作为控制器芯片的半导体芯片20之外，还层叠有作为四个存储器芯片的半导体芯片30～33。但是，半导体芯片的层叠数可以是3以下，也可以是5以上。
更详细地说，半导体芯片30具有面30a与作为该面30a的相反侧的面30b，在面30a上具有粘合层40。另外，半导体芯片30在面30a侧经由粘合层40而与半导体芯片20的面20b以及树脂层80的上表面S粘合。
另外，树脂层80设为支承半导体芯片30。因而，在半导体芯片30与布线基板10之间未设置间隔件。树脂层80不仅设置在半导体芯片20的周边，而是以较大的面积设置。在图1所示的例子中，树脂层80的外周端部位于半导体芯片30的外侧与布线层11(焊盘10p)之间。由此，在接合线90连接于半导体芯片30的焊盘(参照图2所示的焊盘30p)时，能够适当地支承半导体芯片30。从而，由于树脂层80支承半导体芯片30，因此不再需要用于支承半导体芯片30的间隔件。另外，在图1所示的例子中，半导体芯片30的下方全部被树脂层80填充。但是，并不局限于此，只要在能够支承半导体芯片30的范围内，树脂层80的宽度也可以较窄。在该情况下，在半导体芯片30与布线基板10之间，除树脂层80以外还填充有密封树脂91。
接合线90连接于布线基板10、半导体芯片30～33的任意的焊盘。为了利用接合线90连接，半导体芯片30～33仅错开焊盘大小地层叠。另外，半导体芯片20利用电极柱21进行倒装芯片连接，因此未进行引线接合。但是，半导体芯片20也可以除了基于电极柱21的连接之外还进行引线接合。
而且，密封树脂91将半导体芯片20、30～33、间隔件芯片50、树脂层80、接合线90等密封。由此，半导体装置1是将多个半导体芯片20、30～33在布线基板10上作为一个半导体封装而构成的。
图2是表示图1的布线基板10、半导体芯片20、30以及树脂层80的位置关系的一个例子的俯视图。图2是从半导体芯片30的第二面的上方观察的图。另外，从图2的A－A线观察的剖面图与图1对应。
20o表示半导体芯片20的外缘。30o表示半导体芯片30的外缘。10p表示设于布线基板10的焊盘。30p表示设于半导体芯片30的面30b的焊盘。30s1表示半导体芯片30的边中的设有焊盘30p的边。边30s1在图2所示的例子中是半导体芯片30的长边。30s2表示半导体芯片30的边中的未设置焊盘30p的边。边30s1在图2所示的例子中是半导体芯片30的短边。
L1表示边30s1与焊盘10p之间的距离。L2表示边30s2与上表面S的外缘之间的距离。
树脂层80的上表面S比半导体芯片20的外缘20o宽。由此，树脂层80能够适当地包围并保护半导体芯片20。
从半导体芯片30的面30b的上方观察时，树脂层80的上表面S比半导体芯片30的外缘30o的至少一部分向外侧突出。即，树脂层80不仅设置于半导体芯片20的周边，而是以较大的面积设置。而且，树脂层80一部分超过外缘30o而设置。
另外，从半导体芯片30的面30b的上方观察时，树脂层80的上表面S与在半导体芯片30的面30b设置的焊盘30p侧的外缘30o相比，向外侧突出。在图2所示的例子中，焊盘30p沿半导体芯片30的边30s1配置。即，树脂层80的上表面S比边30s1向外侧突出。
另外，树脂层80的上表面S也可以是与焊盘30p侧的外缘30o以外的外缘30o相比靠内侧。在图2所示的例子中，树脂层80的下部以及上表面S不突出边30s2，而是为边30s2的内侧。即，也可以根据方向而使树脂层80收敛于外缘30o的内侧。这是因为，根据封装尺寸的标准，封装尺寸、树脂层80的宽度根据产品等存在限制。
另外，树脂层80被设于能够将接合线90连接于焊盘30p、并且为到焊盘10p的跟前为止的范围，所述焊盘30p被设于由该树脂层80的上表面S支承的半导体芯片30的面30b，所述焊盘10p被设于布线基板10，并与接合线90连接。在图2所示的例子中，向外缘30o(边30s1)的外侧突出的树脂层80的下部位于不超过L1的位置。因而，树脂层80不与焊盘10p接触。这是因为，如果树脂层80与焊盘10p接触，则难以将接合线90连接于焊盘10p。另外，在图2所示的例子中，即使树脂层80的上表面S为边30s2的内侧，也由于L2较短，因此半导体芯片S1的大部分可由上表面S支承。因而，树脂层80能够在引线接合时支承半导体芯片30。如果L2变长，则在引线接合时有半导体芯片30变形而不能将接合线90连接的可能性。L2例如在焊盘30p为约50μm角的情况下，优选的是约200μm以下。因而，树脂层80通过上述的位置关系，能够在引线接合时支承半导体芯片30，并且配置为不与焊盘10p接触。另外，L2的上限距离例如有也根据焊盘30p的配置等而变化的情况。例如在焊盘30p仅设于边30s1的中央部附近的情况下，L2的上限距离变长。因而，这种情况下的树脂层80即使L2较长也能够支承半导体芯片30。
另外，在图2所示的例子中，在图2的纸面下方中设有用于与半导体芯片32、33连接的焊盘10p。树脂层80的上表面S在图2的纸面下方也比外缘30o向外侧突出。
接下来，对本实施方式的半导体装置1的制造方法进行说明。
图3～图12是表示第一实施方式的半导体装置1的制造方法的一个例子的图。
首先，在半导体晶圆W形成半导体元件。图3是形成有半导体元件的半导体晶圆W的立体图。在半导体晶圆W上形成有半导体元件，聚酰亚胺PI覆盖半导体元件。半导体晶圆W包含在后述的切割工序中被单片化的多个半导体芯片20(或者30～33)。
接下来，如图4所示，在聚酰亚胺PI上粘附保护带TP1。接下来，如图5所示，使保护带TP1为下方，利用研磨机G对半导体晶圆W的背面进行研磨。
在剥离保护带TP1之后，如图6所示，在张设于晶圆环WR内的可挠性的树脂带TP2上粘附半导体晶圆W的背面。接下来，如图7所示，使用激光振荡器LG，沿半导体晶圆W的表面或者背面的切割线照射激光。由此，在切割线形成槽(groove)。
接下来，如图8所示，利用切割刀片DB沿切割线的槽将半导体晶圆W切断。由此，半导体晶圆W被单片化为半导体芯片20(或者30～33)。单片化后的半导体芯片20(或者30～33)为了安装于布线基板10而被从树脂带TP2拾取。
另一方面，布线基板10形成绝缘层15、布线层11、贯通电极12、阻焊层14。接下来，使用形成于阻焊层14上的掩模材料，在阻焊层14形成开口部OP。此时，开口部OP形成为使布线层11及其周边的绝缘层15露出。
接下来，如图9所示，在布线基板10上0a涂覆树脂层80的材料8。如使用图2说明那样，涂覆足够量的材料80a以使树脂层80能够支承半导体芯片20。
接下来，如图10所示，拾取在图8所示的工序中形成的半导体芯片20，利用安装工具MT，使半导体芯片20的面20a与布线基板10对置。安装工具MT具有吸附孔(未图示)，经由同样开设有吸附孔的膜F吸附半导体芯片20。膜F在安装工具MT对材料80a按压时抑制材料80a爬升而与安装工具MT接触。这是因为，如果材料80a侵入安装工具MT的吸附孔，则不能再作为安装工具MT使用。即，膜F保护安装工具MT。另外，安装工具MT中的与面20b对置的对置面的尺寸优选的是充分大于半导体芯片20的尺寸。
接下来，如图11所示，利用安装工具MT按压半导体芯片20以及材料80a。通过按压，材料80a在图11的纸面左右方向上扩展。因而，能够使材料80a填充至安装工具MT的端部。由于安装工具MT中的与面20b对置的对置面大致平坦，因此上表面S也变得大致平坦。另外，例如通过热压接进行倒装芯片连接。由此，半导体芯片20与布线基板10连接。
接下来，虽然未图示，但进行树脂层80的固化处理以及等离子体处理。通过等离子体处理，提高半导体芯片20的面20b与粘合层40的紧贴性。另外，树脂层80通过固化而收缩。因而，上表面S与面20b有时不一定严格平行。但是，上表面S与面20b之差充分小，而且可利用粘合层40抑制对半导体芯片20的影响。
即，使半导体芯片20的面20a与布线基板10对置而将电极柱21在树脂层80内连接于布线基板10，并且以使树脂层80的上表面S与半导体芯片20的面20b大致平行的方式使树脂层80固化。另外，树脂层80的上表面S在半导体芯片20的外周端部与树脂层80的边界部B处与半导体芯片20的面20b大致平行。这是因为，材料80a通过具有大致平坦的下表面的安装工具MT按压而在半导体芯片20的外周端部处与膜F相接地填充。
接下来，如图12所示，拾取在图8所示的工序中形成的半导体芯片30，使半导体芯片30粘合于半导体芯片20以及树脂层80。即，将半导体芯片30的面30a经由粘合层40粘合于半导体芯片20的面20b以及树脂层80的上表面S。
之后，进行半导体芯片31～33的粘合、接合线90的连接以及密封树脂91对半导体芯片20、30～33的密封。
如以上那样，根据第一实施方式，树脂层80被设为在半导体芯片20的周围使上表面S与半导体芯片20的面20b大致平行。另外，从半导体芯片30的面30b的上方观察时，树脂层80的上表面S比半导体芯片30的外缘30o的至少一部分向外侧突出。例如设置具有与半导体芯片20的面积相当的面积的上表面S的树脂层80。由此，树脂层80适当地支承半导体芯片20。因而，能够不使用间隔件芯片而更适当地支承半导体芯片30。由于不使用间隔件芯片，因此例如能够抑制工序数的增加。
另外，已知有不使用间隔件芯片而以用较厚的DAF(Die Attach Film)覆盖控制器芯片的方式配置存储器芯片的构造。但是，在该构造中，在用DAF埋入控制器芯片时有存储器芯片变形为圆顶状的情况。另外，需要使存储器芯片的中心与控制器芯片的中心一致。如果存储器芯片相对于控制器芯片偏离，则有控制器芯片的埋入变难、难以支承存储器芯片的情况。其结果，也有存储器芯片容易倾斜的情况。因而，有可能无法适当地支承存储器芯片。
与此相对，在第一实施方式中，无需埋入半导体芯片20，只需将半导体芯片30粘合于半导体芯片20以及树脂层80即可。因而，半导体芯片30的安装的难易度较低。另外，无需一定将半导体芯片30配置于半导体芯片20的正上方。因而，能够提高半导体芯片30的搭载位置的自由度。另外，由于能够减薄DAF(粘合层40)，因此能够减少材料费。
(第二实施方式)
图13A以及图13B是说明第三实施方式的半导体装置1的图。第二实施方式在半导体芯片30的位置存在偏移(偏离)这一点与第一实施方式不同。图13A以及图13B分别是表示半导体芯片30以及树脂层80的位置关系的一个例子的俯视图。另外，省略了上表面S。另外，图13A以及图13B所示的树脂层80比半导体芯片30的外缘30o整体向外侧突出。
在图13A所示的例子中，半导体芯片30的中心位置与半导体芯片20的中心位置以及树脂层80的中心位置大致一致。另一方面，图13B所示的半导体芯片30比图13A所示的半导体芯片30偏向纸面下方向地配置。因而，半导体芯片30的中心位置从半导体芯片20的中心位置以及树脂层80的中心位置偏离。即，从半导体芯片30的面30b的上方观察时，半导体芯片30相对于半导体芯片20或者树脂层80偏离地配置。更详细地说，半导体芯片30以设于该半导体芯片30的焊盘30p从设于布线基板10并与焊盘30p电连接的焊盘10p远离的方式，相对于半导体芯片20或者树脂层80偏离地配置。由此，例如能够加长焊盘10p与焊盘30p之间的距离。通过加长焊盘10p、30p间的距离，能够提高引线接合性。
如此，可在树脂层80能够支承半导体芯片30的范围内对半导体芯片30的安装位置进行变更。因而，能够提高封装设计的自由度。
另外，在上述说明的用较厚的DAF覆盖控制器芯片来配置存储器芯片的构造中，存储器芯片的安装位置由控制器芯片的位置决定。因而，焊盘10p、30p的位置关系也难以变更。
与此相对，在第二实施方式中，能够将半导体芯片30的配置错开而变更焊盘10p、30p间的距离。另外，在封装设计中，能够提高焊盘10p的位置的设计自由度。
第二实施方式的半导体装置1的其他构成与第一实施方式的半导体装置1的对应构成相同，因此省略其详细的说明。第二实施方式的半导体装置1能够获得与第一实施方式相同的效果。
(第三实施方式)
图14A以及图14B是说明第三实施方式的半导体装置1的图。第三实施方式在调整后的量的树脂层80的材料80a被涂覆于布线基板10上这一点与第一实施方式不同。图14A是表示涂覆量较少的情况下的树脂层80的材料80a的一个例子的图。在图14A中，上层示出剖面图，下层示出俯视图。图14B是表示涂覆量多的情况下的树脂层80的材料80a的一个例子的图。在图14B中，上层示出剖面图，下层示出俯视图。
图14A以及图14B的俯视图示出图9中的材料80a的涂覆工序。在图14A以及图14B所示的例子中，在开口部OP附近以X字状涂覆有材料80a。
在图9所示的工序中，在布线基板10上涂覆被调整后的量的树脂层80的材料，树脂层80的量被调整为，树脂层80的上表面S成为规定的面积。在图14A所示的例子中，由于材料80a的涂覆量较少，因此固化后的树脂层80的面积变小。另一方面，在图14B所示的例子中，由于材料80a的涂覆量较多，因此固化后的树脂层80的面积变大。另外，需要使用与规定的面积相应的大小的安装工具MT按压树脂层80。
如此，通过调整材料80a的涂覆量，能够调整树脂层80的面积(容积)以及树脂层的上表面S的面积。
第三实施方式的半导体装置1的其他构成与第一实施方式的半导体装置1的对应构成相同，因此省略其详细的说明。第三实施方式的半导体装置1能够获得与第一实施方式相同的效果。另外，也可以对第三实施方式的半导体装置1组合第二实施方式。
(第四实施方式)
图15A～图15D是说明第四实施方式的半导体装置1的图。第四实施方式在树脂层80相对于半导体芯片20、30的大小和位置根据树脂层80的材料80a的涂覆位置而变化这一点上与第一实施方式不同。图15A是表示树脂层80的材料80a的涂覆位置的一个例子的俯视图。图15B是表示图15A的涂覆位置处的半导体芯片30以及树脂层80的位置关系的俯视图。
在图9所示的工序中，以将树脂层80形成于布线基板10上的规定的位置的方式、或者以将树脂层80形成为规定的形状的方式，在布线基板10上涂覆树脂层80的材料。在图15A所示的例子中，在开口部OP附近以十字状涂覆有树脂层80的材料80a。另外，材料80a沿纸面左右方向较长地涂覆。由此，如图15B所示，形成沿纸面左右方向较长的树脂层80。
图15C是表示树脂层80的材料80a的涂覆位置的一个例子的俯视图。图15D是表示图15C的涂覆位置处的半导体芯片30以及树脂层80的位置关系的俯视图。
在图15C所示的例子中，在开口部OP附近以X字状涂覆有树脂层80的材料80a。另外，在从开口部OP离开的纸面左方向以及纸面下方向的2点处，以圆形涂覆有树脂层80的材料80a。由此，如图15D所示，形成覆盖半导体芯片20且在纸面左下方向上较长的树脂层80。
如此，通过调整材料80a的涂覆位置以及涂覆形状，能够调整树脂层80的位置以及形状。
第四实施方式的半导体装置1的其他构成与第一实施方式的半导体装置1的对应构成相同，因此省略其详细的说明。第四实施方式的半导体装置1能够获得与第一实施方式相同的效果。另外，也可以对第四实施方式的半导体装置1组合第二实施方式以及第三实施方式。
(第五实施方式)
图16A～图16D是说明第四实施方式的半导体装置1的图。第五实施方式的半导体芯片30与树脂层80的位置关系与第一实施方式不同。图16A～图16D是分别表示半导体芯片30以及树脂层80的位置关系的一个例子的俯视图。另外，树脂层80的大小以及形状的调整方法可以分别与第三实施方式以及第四实施方式相同。
在图16A所示的例子中，树脂层80在半导体芯片30的短边突出，但不在半导体芯片30的长边突出。在图16B所示的例子中，树脂层80在半导体芯片30的短边以及纸面上侧的长边突出，但不在半导体芯片30的纸面下侧的长边突出。在图16C所示的例子中，树脂层80在半导体芯片30的长边突出。从半导体芯片30的上方观察时，树脂层80的外周端部与半导体芯片30的短边大致一致。在图16D所示的例子中，树脂层80在半导体芯片30的纸面下侧的长边以及纸面右侧的短边突出，但不在半导体芯片30的纸面上侧的长边以及纸面左侧的短边突出。
另外，更详细地说，从半导体芯片30的面30b的上方观察时，树脂层80相对于半导体芯片20或者半导体芯片30错开地配置。在图16B以及图16D所示的例子中，例如树脂层80的中心位置从半导体芯片20的中心位置以及半导体芯片30的中心位置偏离。
如此，也可以是树脂层80的仅特定的边比半导体芯片30大或者小。即，在树脂层80能够支承半导体芯片30的范围内，能够变更树脂层80的位置、形状等。因而，能够提高封装设计的自由度。
第五实施方式的半导体装置1的其他构成与第一实施方式的半导体装置1的对应构成相同，因此省略其详细的说明。第五实施方式的半导体装置1能够获得与第一实施方式相同的效果。另外，也可以对第五实施方式的半导体装置1组合第二实施方式～第四实施方式。
虽然说明了本发明的几个实施方式，但这些实施方式是作为例子而提出的，并不意图限定发明的范围。这些实施方式能够以其他各种方式实施，在不脱离发明的主旨的范围内，能够进行各种省略、替换、变更。这些实施方式、其变形包含在发明的范围、主旨中，同样包含在权利要求书所记载的发明与其等效的范围中。

Claims (12)

1.一种半导体装置，具备：
布线基板；
第一半导体芯片，具有第一面和作为该第一面的相反侧的第二面，在所述第一面具有连接凸块，所述第一半导体芯片在所述第一面侧经由所述连接凸块而与所述布线基板连接；
树脂层，被设为在所述第一半导体芯片与所述布线基板之间覆盖所述连接凸块，并且在所述第一半导体芯片的周围，所述树脂层的上表面与所述第一半导体芯片的所述第二面大致平行；以及
第二半导体芯片，具有第三面和作为该第三面的相反侧的第四面，在所述第三面具有粘合层，所述第二半导体芯片在所述第三面侧经由所述粘合层而与所述第一半导体芯片的所述第二面以及所述树脂层的上表面粘合，
从所述第二半导体芯片的所述第四面的上方观察时，所述树脂层的上表面与所述第二半导体芯片的外缘的至少一部分相比向外侧突出。
2.根据权利要求1所述的半导体装置，
在所述第二半导体芯片与所述布线基板之间未设有间隔件。
3.根据权利要求1所述的半导体装置，
从所述第二半导体芯片的所述第四面的上方观察时，所述树脂层的上表面与在所述第二半导体芯片的所述第四面设置的第一焊盘侧的所述外缘相比向外侧突出。
4.根据权利要求1至3中任一项所述的半导体装置，
从所述第二半导体芯片的所述第四面的上方观察时，所述第二半导体芯片的中心位置相对于所述第一半导体芯片的中心位置或者所述树脂层的中心位置偏离而配置。
5.根据权利要求4所述的半导体装置，
所述第二半导体芯片的中心位置，以设于该第二半导体芯片的第一焊盘从设于所述布线基板并与所述第一焊盘电连接的第二焊盘远离的方式，相对于所述第一半导体芯片的中心位置或者所述树脂层的中心位置偏离而配置。
6.根据权利要求1至3中任一项所述的半导体装置，
从所述第二半导体芯片的所述第四面的上方观察时，所述树脂层的中心位置相对于所述第一半导体芯片的中心位置或者所述第二半导体芯片的中心位置偏离而配置。
7.根据权利要求1至3中任一项所述的半导体装置，
所述树脂层的上表面，在所述第二半导体芯片的外周端部与所述树脂层的边界部，与所述第一半导体芯片的所述第二面大致平行。
8.根据权利要求1至3中任一项所述的半导体装置，
所述树脂层被设于能够将引线连接到第一焊盘、并且为到第二焊盘的跟前为止的范围，所述第一焊盘被设于由该树脂层的上表面支承的所述第二半导体芯片的所述第四面，所述第二焊盘被设于所述布线基板且与所述引线连接。
9.一种半导体装置的制造方法，包括如下步骤：
在布线基板上涂覆树脂层的材料；
使在第一面具有连接凸块的第一半导体芯片的所述第一面与所述布线基板对置，将所述连接凸块在所述树脂层内连接于所述布线基板，并且以所述树脂层的上表面与所述第一半导体芯片的第二面大致平行的方式使所述树脂层固化，所述第一半导体芯片具有所述第一面和作为该第一面的相反侧的所述第二面；以及
将在第三面具有粘合层的第二半导体芯片的所述第三面经由所述粘合层粘合于所述第一半导体芯片的所述第二面以及所述树脂层的上表面，所述第二半导体芯片具有所述第三面和作为该第三面的相反侧的第四面，
从所述第二半导体芯片的所述第四面的上方观察时，所述树脂层的上表面与所述第二半导体芯片的外缘的至少一部分相比向外侧突出。
10.根据权利要求9所述的半导体装置的制造方法，还包括如下步骤：
以将所述树脂层形成于所述布线基板上的规定的位置的方式、或者以将所述树脂层形成为规定的形状的方式，在所述布线基板上涂覆所述树脂层的材料。
11.根据权利要求9所述的半导体装置的制造方法，还包括如下步骤：
在所述布线基板上涂覆被调整后的量的所述树脂层的材料，所述树脂层的材料的量被调整成所述树脂层的上表面成为规定的面积。
12.根据权利要求9至11中任一项所述的半导体装置的制造方法，还包括如下步骤：
不在所述第二半导体芯片与所述布线基板之间设置间隔件。
CN202110059849.6A 2020-07-06 2021-01-18 半导体装置及其制造方法 Pending CN113903731A (zh)

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