CN111712906A - 使用于晶粒封装的防翘曲用的ptfe片以及晶粒封装方法 - Google Patents

使用于晶粒封装的防翘曲用的ptfe片以及晶粒封装方法 Download PDF

Info

Publication number
CN111712906A
CN111712906A CN201880076827.7A CN201880076827A CN111712906A CN 111712906 A CN111712906 A CN 111712906A CN 201880076827 A CN201880076827 A CN 201880076827A CN 111712906 A CN111712906 A CN 111712906A
Authority
CN
China
Prior art keywords
die
sheet
tool
bump
polytetrafluoroethylene sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201880076827.7A
Other languages
English (en)
Other versions
CN111712906B (zh
Inventor
渡辺治
中村智宣
萩原美仁
金井裕司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Walka Corp
Shinkawa Ltd
Original Assignee
Walka Corp
Shinkawa Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Walka Corp, Shinkawa Ltd filed Critical Walka Corp
Publication of CN111712906A publication Critical patent/CN111712906A/zh
Application granted granted Critical
Publication of CN111712906B publication Critical patent/CN111712906B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • DTEXTILES; PAPER
    • D01NATURAL OR MAN-MADE THREADS OR FIBRES; SPINNING
    • D01FCHEMICAL FEATURES IN THE MANUFACTURE OF ARTIFICIAL FILAMENTS, THREADS, FIBRES, BRISTLES OR RIBBONS; APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OF CARBON FILAMENTS
    • D01F6/00Monocomponent artificial filaments or the like of synthetic polymers; Manufacture thereof
    • D01F6/02Monocomponent artificial filaments or the like of synthetic polymers; Manufacture thereof from homopolymers obtained by reactions only involving carbon-to-carbon unsaturated bonds
    • D01F6/08Monocomponent artificial filaments or the like of synthetic polymers; Manufacture thereof from homopolymers obtained by reactions only involving carbon-to-carbon unsaturated bonds from polymers of halogenated hydrocarbons
    • D01F6/12Monocomponent artificial filaments or the like of synthetic polymers; Manufacture thereof from homopolymers obtained by reactions only involving carbon-to-carbon unsaturated bonds from polymers of halogenated hydrocarbons from polymers of fluorinated hydrocarbons
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13022Disposition the bump connector being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/75252Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75314Auxiliary members on the pressing surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75314Auxiliary members on the pressing surface
    • H01L2224/7532Material of the auxiliary member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75743Suction holding means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Textile Engineering (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

本发明是一种对直径为1μm以下的PTFE纤维进行纺织而成的PTFE片(44),PTFE片中,哥雷值为1~3的范围,加热至300℃时的与片缠绕方向正交的方向上的收缩率为10%以下,当将晶粒(100)封装至被封装体(110)时夹于对晶粒(100)进行加热的工具(22)与所述晶粒(100)之间而可利用工具(22)来吸附晶粒(100),并且抑制将晶粒(100)固定于被封装体(110)的粘接构件(114)附着在工具(22)的吸附面(24)或晶粒(100)。由此,提供一种可实现真空吸附的稳定化及维护性的改善的PTFE片及晶粒封装方法。

Description

使用于晶粒封装的防翘曲用的PTFE片以及晶粒封装方法
技术领域
本发明涉及一种使用于晶粒封装的防翘曲用的聚四氟乙烯片及晶粒封装方法。
背景技术
已知有通过真空吸附来拾取通过切割而单片化的多个晶粒(die)的技术(参照专利文献1~专利文献3)。例如,在专利文献2中,已公开对在端子上设置有凸块的裸芯片(bare chip),在与包含所述端子及凸块的裸芯片的电路功能面为相反的面侧进行真空吸附。真空吸附于工具的裸芯片是在使电路功能面与基板相向的方向上,搭载在涂布有粘接剂的基板上。在专利文献2的发明中,为了防止通过真空吸附或工具的加压等而使基板上的粘接剂自裸芯片的侧面向上方翘曲,采用使片介于工具的吸附面与裸芯片之间的结构,由此,抑制粘接剂的翘曲,防止粘接剂附着在工具。此外,在专利文献3中,记载有一种经由具有透气性的多孔胶带(tape)而吸附半导体芯片的技术。
现有技术文献
专利文献
专利文献1:日本专利特开2006-66625号公报
专利文献2:日本专利第5669137号公报
专利文献3:日本专利特开平3-201458号公报
发明内容
发明所要解决的问题
此处,专利文献2的发明是以在电路功能面上真空吸附裸芯片为前提,对于在形成有凸块电极的凸块形成面侧进行真空吸附则未作任何考虑。关于这一点,在凸块形成面上,通过凸块电极而设置有凹凸,因此当使工具真空吸附晶粒时,可能因凸块电极的突起高度而在工具吸附面与晶粒之间产生空隙。因此,当真空吸附有晶粒时,通过产生空气的泄漏,真空度下降,而存在工具的吸附性变差的情况。
另外,当将晶粒经由粘接材料而封装至基板时,有时会自粘接材料产生烟气(fumegas),所述烟气自因凸块电极的突起高度而产生的空隙流入,使工具等受到污染。因此,必须频繁地清洗工具等,存在维护性变差的情况。
此外,在专利文献3中,记载有一种使用海绵、纸、合成橡胶等作为多孔胶带的材料,但是这些材料由于不耐热而会产生收缩、熔融、变形,因此不适合于利用工具来将晶粒加热至250℃以上而封装至基板的工艺(process)。
本发明是鉴于如上所述的情况而完成的,目的在于提供一种能够实现真空吸附的稳定化及维护性的改善的防翘曲用的片。
解决问题的技术手段
[1]一种PTFE片,对直径为1μm以下的PTFE纤维进行纺织而成,PTFE片中,哥雷(Gurley)值为1~3的范围,加热至300℃时的与片缠绕方向正交的方向上的收缩率为10%以下,当将晶粒封装至被封装体时夹于进行晶粒加热的工具与所述晶粒之间而可利用工具来吸附晶粒,并且抑制将晶粒固定于被封装体的粘接构件附着在所述工具的吸附面或所述晶粒。
[2]根据[1]所述的PTFE片,其中PTFE片具有晶粒的凸块形成面上的凸块电极的突起高度以上的厚度,可吸附晶粒的凸块形成面。
[3]根据[1]所述的PTFE片,其中PTFE片包含比凸块电极或吸附面更柔软的材质。
[4]根据[1]至[4]中任一项所述的PTFE片,其中工具是通过利用真空吸附工具对晶粒及粘接材料进行加热,而将晶粒封装至基板的接合区域,PTFE片成为过滤器,所述过滤器抑制对晶粒或粘接材料进行加热时所产生的烟气渗入至真空吸附工具的抽吸孔。
[5]一种晶粒封装方法,包括如下的步骤:准备具有形成有多个凸块电极的凸块形成面的晶粒;对直径为1μm以下的PTFE纤维进行纺织,准备哥雷值为1~3的范围,且加热至300℃时的与片缠绕方向正交的方向上的收缩率为10%以下的PTFE片;将具有吸附面的真空吸附工具,在吸附面与凸块形成面相向的方向上,配置于晶粒的上方;将PTFE片夹于吸附面与凸块形成面之间,利用真空吸附工具而吸附晶粒;以及将利用真空吸附工具而吸附的晶粒,经由粘接材料而封装至基板的接合区域;且PTFE片具有凸块形成面上的凸块电极的突起高度以上的厚度。
发明的效果
根据本发明,可实现真空吸附的稳定化及维护性的改善。
附图说明
[图1]图1是表示本发明的实施方式的晶粒封装方法中所使用的接合装置的图。
[图2]图2是表示本发明的实施方式的晶粒封装方法的流程图的图。
[图3]图3是用以说明本发明的实施方式的晶粒封装方法的图,具体而言,是表示将工具配置在晶粒的上方的步骤的图。
[图4]图4是用以说明本发明的实施方式的晶粒封装方法的图,具体而言,是表示将吸附于工具的晶粒经由粘接材料而封装于基板的步骤的图。
[图5]图5是用以说明本发明的实施方式的晶粒封装方法的图,具体而言,是表示工具的吸附面与晶粒的凸块形成面的大小的关系的平面图。
[图6]图6是表示加热前的片的外观的照片,(a)表示实施例,(b)表示比较例的各个片。
[图7]图7是表示加热至250℃之后的试样的外观的照片,(a)表示实施例,(b)表示比较例的各个片。
具体实施方式
以下,对本发明的实施方式进行说明。在以下的附图的记载中,对相同或相似的构成组件用相同或相似的符号表示。附图为例示,各部的尺寸或形状为示意性者,不应将本申请发明的技术范围限定于所述实施方式来解释。再者,在本说明书中,关于数值范围,记载为“A~B”的情况,是表示“A以上、B以下”。
[实施方式]
图1是表示本发明的实施方式的晶粒封装方法中所使用的接合装置10的概略的图。接合装置10是用以将晶粒100封装至基板110的接合区域的晶粒接合装置。
晶粒100包含半导体材料。晶粒100形成为包含作为主面的表面及背面的长方体状。具体而言,晶粒100包括形成有规定的电路图案的表面即第一面102a、以及与第一面102a相反的背面即第二面102b。在本实施方式中,是在晶粒100的第二面102b与基板110相向的方向上,将晶粒100封装至基板110。如上所述的方向上的封装形态通常被称为晶粒接合。再者,晶粒100的第一面102a的详细情况将在后文描述。
接合装置10包括晶片台(wafer stage)12、中间台14、接合台(bonding stage)16、接合头(bonding head)18、经由Z轴驱动机构20而安装至接合头18的真空吸附工具22、获取晶粒100的图像信息的拍摄部26、拍摄部27、使接合头18沿XY轴方向移动的XY平台28、以及对这些各种构成的运行进行控制的控制部30。
在以下的说明中,将XY轴方向设为与晶粒100的主面(或任一个台的主面)平行的方向,将Z轴方向设为与XY轴方向上的面垂直的方向来进行说明。再者,X轴方向及Y轴方向彼此正交。
在晶片台12,载置包含经单片化的多个晶粒100的晶片120。晶片120包含形成有规定的电路图案的表面即第一面122a(相当于晶粒100的第一面102a)、以及与第一面122a相反的背面即第二面122b(相当于晶粒100的第二面102b)。晶片120也可通过将第二面122b粘附在晶片台12上的薄膜,而固定于晶片台12上。晶片台12上的晶粒100通过与真空吸附工具22及拾取单元(未图示)的合作运行而拾取晶粒100之后,利用移送头(未图示),而移送至中间台14。
中间台14是用以暂时载置晶粒100的台。中间台配置在晶片台12与接合台16之间。晶粒100是在第二面102b与中间台14相向的方向上配置于中间台14上。中间台14是由线性马达(未图示)等驱动机构,以可沿XY轴方向移动的方式构成。晶粒100也可通过将第二面102b粘附于中间台14上的薄膜,而固定于中间台14上。中间台14上的晶粒100通过与真空吸附工具22及拾取单元(未图示)的合作运行而拾取晶粒100之后,利用移送头(未图示),而移送至接合台16。
在接合台16,配置有基板110。基板110也可通过例如粘附于接合台16上的薄膜,而固定于接合台16上。基板110具有至少一个接合区域,在接合区域上封装任一个晶粒100。例如当基板110具有多个接合区域时,将晶粒100封装至各接合区域之后,在每个接合区域内将基板110设为单片,可获得多个完成品(半导体装置)。
另外,也可在基板110上的各接合区域内,通过层叠而封装多个晶粒100。在如上所述的堆叠型半导体装置中,层叠于相同接合区域内的两个以上的晶粒100均也可以第一面102a朝向与基板110相反的方向的方式而封装。或者,也可对层叠于相同接合区域内的一部分晶粒,在与其他晶粒不同的方向上进行封装。
基板110的材质例如也可包含有机材料(例如环氧基板或聚酰亚胺基板)、无机材料(例如玻璃基板)或这些的复合材料(例如玻璃环氧基板)。基板110也可为所谓的内插器。另外,基板110也可包含金属材料(例如引线框架材料)。
再者,接合台16是利用导轨(未图示)等驱动机构,以可使基板110沿X轴方向移动的方式构成。另外,接合台16包括用以对基板110进行加热的加热部件。
在接合头18,经由Z轴驱动机构20而安装有真空吸附工具22,且在与真空吸附工具22相距规定距离的位置上安装有拍摄部26。换言之,在图1所示的例中,真空吸附工具22及拍摄部26固定于接合头18,接合头18利用XY平台28而移动,由此真空吸附工具22及拍摄部26一并沿XY轴方向移动。另外,也可在与拍摄部26相反之侧,设置有拍摄部27。也可为拍摄部26能够拍摄晶粒100的第一面102a,拍摄部27能够拍摄晶粒100的第二面102b。再者,拍摄部26也可不固定于接合头18,且也可与真空吸附工具22分开而移动。
真空吸附工具22具有真空吸附晶粒100的吸附面24。真空吸附工具22是用以为了将晶粒100移送至规定位置而吸附保持,并且是为了将晶粒100封装至基板110而进行加压的工具。再者,真空吸附工具22的详细情况将在后文描述。
控制部30是对为了接合装置10的接合所必需的处理进行控制的构件。控制部30进行包含真空吸附工具22的XYZ轴驱动、θ轴驱动(围绕着Z轴的旋转)及倾斜驱动(倾斜方向)的真空吸附工具22的位置控制、抽真空的导通或断开控制、将晶粒100封装至基板110时的载荷控制、基板110的加热控制等。控制部30是以在接合头18、真空吸附工具22及拍摄部26等各构成之间可进行信号的收发的方式而连接,由此对这些构件的运行进行控制。
在控制部30,连接着用以输入控制信息的操作部32、以及用以输出控制信息的显示部34。由此,操作者可一面利用显示部34而识别画面,一面利用操作部32而输入必需的控制信息。
控制部30是包含中央处理器(central processing unit,CPU)及存储器等的计算机装置,在存储器中预先存储着用以进行接合所需的处理的接合程序等。控制部30是以可执行后述本实施方式的晶粒封装方法的相关各步骤的方式构成(例如包括用以使计算机执行各运行的程序)。
其次,一面参照图2~图5,一面对本实施方式的晶粒封装方法进行说明。本实施方式的晶粒封装方法可利用图1所示的接合装置10来进行。
此处,图2是用以说明本实施方式的晶粒封装方法的流程图。图3是表示将工具配置于晶粒的上方的步骤的图,图4是表示将吸附于工具的晶粒经由粘接材料而封装至基板的步骤的图。另外,图5是表示工具的吸附面与晶粒的凸块形成面的大小的关系的平面图。
首先,在晶片台12上,准备经单片化的多个晶粒100(S10)。具体而言,如图1所示,在晶片台12上,准备包含粘附于薄膜的多个晶粒100的晶片120。晶片120是在多个晶粒100各自的第一面102a朝向上方并且第二面102b与晶片台12相向的方向上,配置在晶片台12上。
其次,将晶粒100移送至中间台14(S11)。具体而言,将晶片台12上的多个晶粒100一个一个地移送至中间台14。如以上说明,晶粒100的移送也可利用真空吸附工具22而进行。
其次,在中间台14的晶粒100的上方,配置真空吸附工具22(S12)。此处,对真空吸附工具22及晶粒100的详细情况进行进一步说明。
真空吸附工具22具有与晶粒100的第一面102a相向的吸附面24。另外,在吸附面24,设置有用以抽真空的至少一个抽吸孔25。抽吸孔25也可设置于吸附面24上的XY俯视观察时的中央。
如图3所示,晶粒100通过将第二面102b粘附于中间台14上的薄膜(图略),而固定于中间台14上。在晶粒100的第一面102a,设置有多个电极垫(pad)104、设置于多个电极垫104上的多个凸块电极106、及设置于多个凸块电极106的周围的保护膜108。电极垫104是与形成于第一面102a的电路图案电连接的端子。另外,在电极垫104的外周端部,被保护膜108覆盖着,由此露出的电极垫104的中央部成为与凸块电极106的连接部。
如图4所示,凸块电极106具有比第一面102a上的保护膜108的上表面更突起的高度H。凸块电极106的高度H是凸块电极106的顶点与保护膜108的上表面之间的距离。
电极垫104及凸块电极106的材质并无限定,但例如电极垫104也可为铝或铜等,且凸块电极106也可为金等。
在图3所示的例中,在如上所述的晶粒100的第一面102a与真空吸附工具22的吸附面24之间配置多孔片44。例如,通过在中间台14的上方配置安装有多孔片44的一对轨道40、42,而可在晶粒100与真空吸附工具22之间配置多孔片44。一对轨道40、42包含供给轨道40及缠绕轨道42。通过将自供给轨道40供给的多孔片44的一部分搬运至缠绕轨道42,可将多孔片44的一部分区域依次运送至晶粒100的第一面102a与真空吸附工具22的吸附面24之间。
在图3所示的例中,多孔片44在轨道40、轨道42排列的X轴方向上具有缠绕方向,在Y轴方向上具有宽度方向,以及在Z轴方向上具有厚度方向。多孔片44包括与真空吸附工具22的吸附面24相向的第一面44a、以及与晶粒100的第一面102a相向的第二面44b,第一面44a与第二面44b之间的距离是多孔片44的厚度。如图3所示,多孔片44具有厚度T1。厚度T1与凸块电极106的高度H具有T1≥H的关系。此时,多孔片44的厚度T1优选为凸块电极106的高度H的1倍~5倍,但可使用不阻碍来自加热器的热传导的范围的厚度的多孔片44。
多孔片44的宽度方向上的长度大于晶粒100的第一面102a的Y轴方向上的宽度,且大于真空吸附工具22的Y轴方向上的宽度。由此,可使多孔片44确实地介于晶粒100的第一面102a与真空吸附工具22的吸附面24之间。
多孔片44具有用以使第一面44a与第二面44b之间通气的多个孔。关于多孔片44的哥雷值,为了吸附芯片,值越小越好,优选为例如具有1~3(s/100cc/in2)的范围。
多孔片44为了在将晶粒100封装至基板110时至少部分地吸收第一面102a的凸块电极106的突起高度,包含比凸块电极106及吸附面24中的任一者更柔软的材质。例如,多孔片44的压缩应力为0.12MPa,小于用于凸块电极的铜的压缩应力110GPa、金的压缩应力80GPa。因此,多孔片44比铜或金等作为凸块电极而使用的金属更易于变形。再者,多孔片44的压缩应力是通过规定的载荷而按压多孔片44,根据载荷与应变量的梯度而算出。
多孔片44是对PTFE纳米纤维进行纺织而成的纺织片。所述多孔片44也可使用具有约1μm~2μm的孔径,具有约50μm的厚度,且具有哥雷值为1~2(s/1 00cc/in2)的片。PTFE纳米纤维尽管厚,却可减小哥雷值(提高通气性)。另外,利用PTFE纳米纤维的多孔片44即使加热至260℃~300℃,也可减小热收缩,且可抑制片卷曲等片的变形。
多孔片44在与缠绕方向(X方向)正交的宽度方向(Y方向)上在250℃时具有0%的收缩率,在300℃时具有0%~0.5%的收缩率,在350℃时具有5%~9%的收缩率,在缠绕方向上在250℃时具有4.2%~5.7%的收缩率,在300℃时具有4.7%~0.5%的收缩率,在350℃时具有12.4%~14.0%的收缩率。与此相对,将PTFE在低温下加以延伸之后,施加熔点以下的热而使形状固定化的延伸片在宽度方向上在250℃时具有29.9%~31.9%的收缩率,在300℃时具有35.0%~38.0%的收缩率,在350℃时具有48.7%~53.3%的收缩率,在片缠绕方向上在250℃时具有30%~42%的收缩率,在300℃时具有36%~47%的收缩率,在350℃时具有50%~55%的收缩率。即,多孔片44与延伸片相比,在宽度方向上具有大约1/5的收缩率,在片缠绕方向上具有大约1/4的收缩率。
再者,如本实施方式那样缠绕于辊的多孔片44在缠绕方向上为长条,因此即使在所述方向上产生有收缩,也不会对后述抑制粘接材料的翘曲的效果造成影响。
在本实施方式中所说明的半导体装置的制造工艺中,利用内置于真空吸附工具22的加热器而将晶粒100及粘接材料114加热至250℃~300℃为止。此时,加热器及真空吸附工具22是加热至高于对晶粒100进行加热的目标温度的300℃~350℃左右为止,多孔片44也是曝露于300℃~350℃的热中。
如图4所示,多孔片44是用以抑制在基板110封装晶粒100时,液体的粘接材料114或通过热而熔融的薄膜状的粘接材料114翘曲而附着在真空吸附工具22的吸附面24或晶粒100的上表面。当粘接材料114附着于晶粒100时,会引起电极的接合不良等。此外,当粘接材料11附着于吸附面24时,会将附着于此的粘接材料114转印至晶粒100而同样地引起不良。
晶粒100并不限于层叠在基板110上,也有时层叠在已封装于基板110上的其他晶粒100上。此时,多孔片44抑制将基板110上的粘接材料114或晶粒100彼此加以粘接的粘接材料114附着在吸附面45或晶粒100。
为了利用多孔片44来抑制粘接材料114附着于吸附面24及晶粒100,必须覆盖整个吸附面24及晶粒100。但是,当在多孔片44中为了施加300℃左右的热而使用收缩率大的材料时,吸附面24或晶粒100的一部分露出而可预测粘接材料114附着于这些表面。
另外,当在多孔片44中使用产生卷曲等变形的材料时,在多孔片44与吸附面24接触时、封装晶粒100时等,多孔片44会卷缩而使吸附面24或晶粒100的一部分露出,从而可预测粘接材料114附着于这些表面。此外,也考虑到通过粘接材料114所附着的多孔片44产生变形,而使粘接材料114附着于出乎意料的部位而引起晶粒100的不良。
返回至图2的流程图,其次,将多孔片44夹于真空吸附工具22的吸附面24与晶粒100的第一面102a(凸块形成面)之间,利用真空吸附工具22而吸附晶粒100(S13)。具体而言,在图3中,使真空吸附工具22下降,在将多孔片44夹于所述吸附面24与晶粒100的第一面102a之间的状态下,自真空吸附工具22的抽吸孔25进行抽真空。如此一来,可越过多孔片44而将晶粒100吸附于真空吸附工具22的吸附面24。其后,使真空吸附工具22与多孔片44一并移送至接合台16。如此一来,使晶粒100移送至基板110的接合区域上。
其次,将晶粒100经由粘接材料114而封装至基板110的接合区域(S14)。具体而言,通过预先在基板110的接合区域上设置粘接材料114,使真空吸附工具22下降,而如图4所示,利用真空吸附工具22越过多孔片44对晶粒100的第一面102a进行加压。此时对晶粒100及粘接材料114进行加热。由此,使粘接材料114加热熔融,然后使其硬化。如此一来,如图4所示,在吸附面24与第一面102a之间夹有多孔片44的状态下,将晶粒100经由粘接材料114而封装至基板110的接合区域。
粘接材料114也可使用在常温下构成为片状的材料,或者,也可使用在常温下构成为浆糊状的材料。粘接材料114也可为例如热硬化性树脂。此时,通过对粘接材料114进行加热,可使其熔融及硬化。
加压时的多孔片44的厚度T2(T2≥T1)优选为相对于凸块电极106的突起高度H,具有T2≥H的关系。
由此,当将晶粒100封装至基板110的接合区域时,可在真空吸附工具22的吸附面24与晶粒100的第一面102a之间的空隙设置多孔片44。由此,可防止空气自空隙泄漏,因此可维持来自抽吸孔25的抽吸所形成的晶粒100的吸附力。此外,由于可遮挡通过空隙的空气,因此可均匀地进行加热。
另外,通过在所述空隙内设置多孔片44,可抑制对晶粒100或粘接材料114进行加热时所产生的烟气附着于真空吸附工具22的吸附面24,或渗入至抽吸孔25。因此,可抑制真空吸附工具22的吸附面24或抽吸孔25等受到污染,可使维护性提高。
此处,如图5所示,真空吸附工具22的吸附面24也可具有大于晶粒100的第一面102a的尺寸。具体而言,真空吸附工具22的X轴方向上的宽度WX及Y轴方向上的宽度WY、以及晶粒100的X轴方向上的宽度DX及Y轴方向上的宽度DY也可为WX≥DX且WY≥DY。
由此,可利用吸附面24而确实地对晶粒100进行加压,并且可使对晶粒100的第一面102a的加压力均匀化。此外,在本实施方式中,由于多孔片44介于吸附面24与第一面102a之间,因此当将晶粒100经由粘接材料114封装至基板110时,可在晶粒100的侧面利用多孔片44遮挡翘曲的粘接材料114。因此,可防止粘接材料114附着于真空吸附工具22的吸附面24。
另外,如图4所示,当真空吸附工具22的X轴方向上的宽度WX之中,设为真空吸附工具22的抽吸孔25的宽度W1及其两端的宽度W2时,也可为W1<W2。另外,所谓真空吸附工具22的宽度W2及加压时的多孔片44的厚度T2也可为T2>W2(或T1>W2)。
由此,自真空吸附工具22的端部至抽吸孔25为止的距离小于多孔片44的厚度,因此即使将多孔片44设为凸块电极106的突起高度H以上,也可防止真空吸附工具22的抽吸力受损。
本发明并不限定于所述实施方式,可进行各种变形而应用。例如,也可在所述构成中省略中间台14,将自晶片台12利用真空吸附工具22而在夹着多孔片44的状态下拾取的晶粒100搬运至接合台16。
另外,在所述实施方式中,是使用安装于一对轨道40、42的多孔片44,但也可预先准备多块单片状的片作为多孔片44,且使所述单片状的片介于真空吸附工具22的吸附面24与晶粒100的第一面102a之间。
[实施例]
其次,对本发明的实施例进行说明。图6是表示加热前的片的外观的照片,(a)表示实施例,(b)表示比较例的各个片。图7是表示加热至250℃之后的试样的外观的照片,(a)表示实施例,(b)表示比较例的各个片。表1表示对本发明的实施例的PTFE纳米纤维片、比较例的PTFE延伸片各自的收缩率进行测定的结果。
本实施例中所使用的PTFE纳米纤维片是利用静电纺丝(electrospinning)法而将经纤维化的PTFE材料成形为片状之后,对其进行加热而获得PTFE纳米纤维片。
(测定方法)
对实施例的PTFE纳米纤维片、比较例的PTFE延伸片,在250℃、300℃、350℃的各温度下分别测定两个片的收缩率。各片的收缩率如图6所示,在铺满高岭土(干燥陶土)的金属垫配置各片,利用电炉在250℃、300℃、350℃,10分钟的条件下对各片进行加热。
加热后,通过测量经冷却的各片的尺寸变化而算出各个片的收缩率。实施例的片的尺寸变化是将片切出120mm见方,在100mm的宽幅上赋予四个测定点,在加热前及加热冷却后测定片的测定点的间隔,根据其差值而算出。再者,在表1中,距离A、距离C是沿片的宽度方向测量,距离B、距离D是沿片的缠绕方向测量。另外,比较例的延伸片由于无法进行测定点间的距离测定,因此基于加热前后的外形尺寸的差值算出收缩率。
(测定结果)
测定各温度下的实施例、比较例的收缩率的结果为,获得表1所示的结果。即,可知实施例的纳米纤维片中,宽度方向上的收缩率相较于比较例的延伸片的宽度方向上的收缩率,在250℃、300℃、350℃的各温度下,大幅小至大约1/5~1/10。另外,在实施例中,关于缠绕方向上的收缩率,也相较于比较例的收缩率,在250℃、300℃、350℃的各温度下,大幅小至大约1/3~1/4。此外,如图6、图7所示,关于片的外观,也可知比较例的延伸片比实施例的纳米纤维片大幅收缩。
比较例的延伸片中,由于在制造时在低温下使PTFE材料延伸之后进行加热而制成,因此会产生由延伸引起的压缩方向上的残留应力。因此,延伸片若在对晶粒进行封装时进行再加热,则压缩方向上的残留应力会释放,因此大幅收缩。
与此相对,实施例的纳米纤维片是对纤维直径低于1μm的PTFE纤维进行纺织而制成,因此可不使片延伸而特别减小宽度方向上的残留应力。再者,纳米纤维片虽呈10%左右的收缩率,但其是在制造时将纳米纤维片加热至PTFE的熔点以上时产生,可认为是来源于PTFE的树脂特性。
此外,将实施例、比较例的片分别夹于晶粒与吸附工具之间,测定在吸附工具吸附晶粒之前及之后发生变化的真空压力的差压。真空压力是通过配置于吸附工具的吸附孔的下游侧的未图示的压力计来测量。测量的结果为,差压在使用实施例的纳米纤维片的情况下为7.0kPa,在使用比较例的延伸片的情况下为4.2kPa。
再者,关于测量真空压力的差压时所使用的各片的厚度,实施例为56μm,比较例为25μm。即,实施例的纳米纤维片中,尽管与比较例的延伸片相比厚约2倍,但差压大。即,实施例的纳米纤维片由于压力损耗小于比较例的延伸片,因此可有效且确实地吸附晶粒100的凸块形成面。另外,实施例的纳米纤维片由于压力损耗小,因此即使应用更厚的纳米纤维片,也可吸附晶粒100的凸块形成面。
由于以上所述,因此实施例的纳米纤维片与广泛使用的延伸PTFE片相比收缩率大幅降低。如实施方式所记载,当为了抑制粘接材料的因翘曲而引起的附着而使用这些片时,必须考虑收缩率而配置充分大小的片及搬运所述片的设备,从而浪费装置的空间。此外,若要抑制片的收缩,则需要对片进行压制的夹持器(clamper)等机构,另外,会产生使加热器的温度降低等工艺的变更等麻烦。通过使用实施例的纳米纤维片,可不变更装置的布局、晶粒封装工艺,而有效抑制粘接材料的附着。
[表1]
Figure BDA0002511982960000131
通过所述发明的实施方式而说明的实施方式可根据用途而适当组合,或者加以变更或改良而使用,本发明并不限定于所述实施方式的记载。自权利要求的记载可知,此种组合或者加以变更或改良的形态也可包含于本发明的技术范围内。
符号的说明
22:真空吸附工具
24:吸附面
44:多孔片
100:晶粒
102a:第一面
102b:第二面
106:凸块电极
110:基板
114:粘接材料

Claims (5)

1.一种聚四氟乙烯片,对直径为1μm以下的聚四氟乙烯纤维进行纺织而成,
所述聚四氟乙烯片中,哥雷值为1s/100cc/in2~3s/100cc/in2的范围,加热至300℃时的与片缠绕方向正交的方向上的收缩率为10%以下,
当将晶粒封装至被封装体时夹于对所述晶粒进行加热的工具与所述晶粒之间而能够利用所述工具来吸附所述晶粒,并且抑制将所述晶粒固定于所述被封装体的粘接构件附着在所述工具的吸附面或所述晶粒。
2.根据权利要求1所述的聚四氟乙烯片,其中
所述聚四氟乙烯片具有所述晶粒的凸块形成面上的凸块电极的突起高度以上的厚度,能够吸附所述晶粒的凸块形成面。
3.根据权利要求2所述的聚四氟乙烯片,其中所述聚四氟乙烯片包含比所述凸块电极或所述吸附面更柔软的材质。
4.根据权利要求1至3中任一项所述的聚四氟乙烯片,其中
所述工具通过对所述晶粒及所述粘接构件进行加热,而将所述晶粒封装至所述被封装体的接合区域,
所述聚四氟乙烯片成为过滤器,所述过滤器抑制对所述晶粒或粘接材料进行加热时所产生的烟气渗入至所述工具的抽吸孔。
5.一种晶粒封装方法,包括如下的步骤:
准备具有形成有多个凸块电极的凸块形成面的晶粒;
对直径为1μm以下的聚四氟乙烯纤维进行纺织,准备哥雷值为1s/100cc/in2~3s/100cc/in2的范围,且加热至300℃时的与片缠绕方向正交的方向上的收缩率为10%以下的聚四氟乙烯片;
将具有吸附面的真空吸附工具,沿所述吸附面与所述凸块形成面相向的方向,配置于所述晶粒的上方;
在所述吸附面与所述凸块形成面之间夹着聚四氟乙烯片,利用所述真空吸附工具而吸附所述晶粒;以及
将利用所述真空吸附工具而吸附的所述晶粒,经由粘接材料而封装至基板的接合区域;且
所述聚四氟乙烯片具有所述凸块形成面上的所述凸块电极的突起高度以上的厚度。
CN201880076827.7A 2017-11-30 2018-11-28 聚四氟乙烯片以及晶粒封装方法 Active CN111712906B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2017-230376 2017-11-30
JP2017230376 2017-11-30
PCT/JP2018/043802 WO2019107419A1 (ja) 2017-11-30 2018-11-28 ダイの実装に用いられる這い上がり防止用のptfeシート及びダイの実装方法

Publications (2)

Publication Number Publication Date
CN111712906A true CN111712906A (zh) 2020-09-25
CN111712906B CN111712906B (zh) 2023-11-03

Family

ID=66664496

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880076827.7A Active CN111712906B (zh) 2017-11-30 2018-11-28 聚四氟乙烯片以及晶粒封装方法

Country Status (7)

Country Link
US (1) US11512411B2 (zh)
JP (1) JP6842567B2 (zh)
KR (1) KR102363090B1 (zh)
CN (1) CN111712906B (zh)
SG (1) SG11202004744TA (zh)
TW (1) TWI687463B (zh)
WO (1) WO2019107419A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI743726B (zh) * 2019-04-15 2021-10-21 日商新川股份有限公司 封裝裝置
JP7346190B2 (ja) * 2019-09-17 2023-09-19 キオクシア株式会社 半導体製造装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218590A (ja) * 2002-01-18 2003-07-31 Nec Corp 部品吸着具、部品把持機構及び部品把持方法
US20120043005A1 (en) * 2010-08-20 2012-02-23 Shinko Electric Industries Co., Ltd. Electronic packaging apparatus and electronic packaging method
CN107075153A (zh) * 2014-09-12 2017-08-18 W.L.戈尔及同仁股份有限公司 具有改进的机械和热学性质的多孔空气可渗透聚四氟乙烯复合体

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03201458A (ja) 1989-12-28 1991-09-03 Nippon Mining Co Ltd 吸着保持装置
JPH08181158A (ja) * 1994-12-22 1996-07-12 Nitto Denko Corp 真空吸引装置
KR100399332B1 (ko) * 1994-12-26 2003-09-26 히다치 가세고교 가부시끼가이샤 필름 형상의 유기 다이본딩재의 라미네이트 방법,다이본딩 방법, 라미네이트 장치, 다이본딩 장치, 반도체장치 및 반도체장치의 제조방법
JP4338834B2 (ja) 1999-08-06 2009-10-07 日本テキサス・インスツルメンツ株式会社 超音波振動を用いた半導体チップの実装方法
KR20010038101A (ko) * 1999-10-22 2001-05-15 윤종용 다공질의 흡착부를 갖는 칩 흡착 수단을 구비하는 칩 접착 장치
JP2006066625A (ja) 2004-08-26 2006-03-09 Nec Corp ベアチップ実装装置、ベアチップ実装方法及びシート
JP4229888B2 (ja) 2004-08-30 2009-02-25 富士通マイクロエレクトロニクス株式会社 電子部品実装装置
KR20060066767A (ko) * 2004-12-14 2006-06-19 삼성전자주식회사 이동통신 단말기에서 디지털 수평계 기능을 수행하기 위한장치 및 방법
JP5669137B2 (ja) 2011-03-01 2015-02-12 富士機械製造株式会社 ダイピックアップ装置
KR101341196B1 (ko) 2012-12-10 2013-12-12 삼성토탈 주식회사 수계 코팅액을 이용한 유/무기 복합 코팅 다공성 분리막과 그의 제조방법 및 상기 분리막을 이용한 전기화학소자
JP2015170690A (ja) 2014-03-06 2015-09-28 信越化学工業株式会社 Ledチップ圧着用熱伝導性複合シート及びその製造方法
JP6680699B2 (ja) * 2015-02-03 2020-04-15 東レエンジニアリング株式会社 実装装置および実装方法
JP6316873B2 (ja) * 2016-05-31 2018-04-25 株式会社新川 ダイの実装方法
TWI685905B (zh) * 2017-07-12 2020-02-21 日商新川股份有限公司 接合裝置和接合方法
US11106827B2 (en) * 2019-03-26 2021-08-31 Rovi Guides, Inc. System and method for identifying altered content

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218590A (ja) * 2002-01-18 2003-07-31 Nec Corp 部品吸着具、部品把持機構及び部品把持方法
US20120043005A1 (en) * 2010-08-20 2012-02-23 Shinko Electric Industries Co., Ltd. Electronic packaging apparatus and electronic packaging method
CN107075153A (zh) * 2014-09-12 2017-08-18 W.L.戈尔及同仁股份有限公司 具有改进的机械和热学性质的多孔空气可渗透聚四氟乙烯复合体

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
北岛贤宏: "氟树脂薄膜及其高功能化", 《巴尔克科技杂志》 *

Also Published As

Publication number Publication date
TWI687463B (zh) 2020-03-11
WO2019107419A1 (ja) 2019-06-06
JPWO2019107419A1 (ja) 2020-11-19
JP6842567B2 (ja) 2021-03-17
KR102363090B1 (ko) 2022-02-15
KR20200066359A (ko) 2020-06-09
CN111712906B (zh) 2023-11-03
US20200291548A1 (en) 2020-09-17
US11512411B2 (en) 2022-11-29
SG11202004744TA (en) 2020-06-29
TW201925289A (zh) 2019-07-01

Similar Documents

Publication Publication Date Title
US11024596B2 (en) Bonding apparatus and bonding method
KR102037948B1 (ko) 다이 본딩 방법 및 장치
TWI685905B (zh) 接合裝置和接合方法
CN112530820B (zh) 半导体制造装置及半导体装置的制造方法
US11189594B2 (en) Bonding apparatus and bonding method
CN111712906B (zh) 聚四氟乙烯片以及晶粒封装方法
TW201923963A (zh) 半導體製造裝置、半導體裝置之製造方法及夾頭
TWI664682B (zh) 晶片之安裝方法
JP3896017B2 (ja) 半導体実装体の製造方法、および半導体実装体の製造装置
JP4755222B2 (ja) 半導体装置の製造方法
CN110709971B (zh) 电子零件封装装置
JP2006202783A (ja) 半導体装置の製造方法
JP5494546B2 (ja) 半導体装置の製造方法
KR102372519B1 (ko) 실장 장치
KR20150143539A (ko) 밀봉 시트 부착 방법 및 밀봉 시트 부착 장치
KR102284943B1 (ko) 본딩 장치 및 본딩 방법
TW201730997A (zh) 電子零件構裝裝置
JP2019176087A (ja) 実装装置ならびに実装方法および画像表示装置の製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant