CN111446217A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN111446217A
CN111446217A CN202010330026.8A CN202010330026A CN111446217A CN 111446217 A CN111446217 A CN 111446217A CN 202010330026 A CN202010330026 A CN 202010330026A CN 111446217 A CN111446217 A CN 111446217A
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Prior art keywords
substrate
semiconductor device
semiconductor chip
top side
heat sink
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CN202010330026.8A
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CN111446217B (zh
Inventor
广部正雄
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Amkor Technology Japan Inc
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J Devices Corp
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    • H01L2924/161—Cap
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    • H01L2924/161—Cap
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    • H01L2924/3511—Warping

Abstract

本发明的一个目的在于，解决配置于半导体芯片及基板的散热板因伴随热膨胀或热收缩的应力而发生的散热板与基板的粘结部剥落的问题。本发明的半导体装置具有：表面为绝缘材料的基板；倒装芯片连接在上述基板上的半导体芯片；以及散热板，经由热界面材料而粘结于上述半导体芯片，在上述半导体芯片的外侧固定于上述基板，其中，上述散热板在粘结于上述半导体芯片的部分与固定于上述基板的部分之间具有向上述基板突出并由导电性树脂粘结于上述基板的突起部，上述散热板具有应力吸收部。根据本发明，可防止配置于半导体芯片及基板的散热板因伴随热膨胀或热收缩的应力而发生的散热板与基板的粘结部的剥落。

Description

半导体装置
技术领域
本发明涉及半导体装置，尤其涉及具有低应力散热板的倒装芯片键合(FCB)封装件的技术。
背景技术
随着半导体器件的高速化或输入/输出(I/O)数的增大，来自半导体器件的发热量也在增大。由此，已知有在半导体芯片上粘结散热板的半导体封装件。另外，已知的是，以高速器件的低噪声化为目的，将散热板与封装基板的地线相连接，使地线稳定。
例如，公开有为了提高散热性，在掩埋半导体芯片的密封部件的内部埋入散热部件的半导体装置(例如，参照专利文献1)。根据在专利文献1中公开的半导体装置，若将散热部件的表面积进行适当的设定，可提高半导体装置的散热性，并实现热阻值的降低。
(现有技术文献)
(专利文献)
专利文献1：日本特开平2012－33559号公报
然而，有可能发生为了提高散热性而设置的散热板因热膨胀或热收缩所伴随的应力而剥离的问题。
发明内容
本发明的目的之一在于，解决散热板因热膨胀或热收缩所伴随的应力而剥离的问题。
根据本发明一个实施方式的半导体装置具有：表面为绝缘材料的基板；倒装芯片连接在上述基板上的半导体芯片；以及散热板，经由热界面材料而粘结于上述半导体芯片，并在上述半导体芯片的外侧固定于上述基板，其中，上述散热板在粘结于上述半导体芯片的部分与固定于上述基板的部分之间具有向上述基板突出并由导电性树脂粘结于上述基板的突起部，上述散热板具有应力吸收部。
上述应力吸收部的刚性可低于上述散热板的除上述应力吸收部之外的部分的刚性。
上述应力吸收部可利用设置于上述散热板的上述基板一侧的面上的槽而薄壁化。
另外，上述槽可设置有两个以上。
另外，上述散热板可设置为上述突起部向上述半导体芯片的周围突出，上述应力吸收部可配置于上述突起部的内侧或外侧。
上述应力吸收部可与上述突起物相邻地配置。
另外，上述应力吸收部可包括设置于上述散热板的上述基板一侧的面上的有底孔或贯通孔。
另外，上述散热板可由Cu、Al或铝硅铜(AlSiCu)陶瓷形成。
附图说明
图1为本发明的第一实施方式的半导体装置的简图。
图2为本发明的第一实施方式的半导体装置的剖视图。
图3A为本发明的第一实施方式的半导体装置的散热板的俯视图。
图3B为本发明的第一实施方式的半导体装置的散热板的剖视图。
图4A为本发明的第二实施方式的半导体装置的散热板的俯视图。
图4B为本发明的第二实施方式的半导体装置的散热板的剖视图。
图5A为本发明的第三实施方式的半导体装置的散热板的俯视图。
图5B为本发明的第三实施方式的半导体装置的散热板的剖视图。
图6A为本发明的第四实施方式的半导体装置的散热板的俯视图。
图6B为本发明的第四实施方式的半导体装置的散热板的剖视图。
图7A为本发明的第五实施方式的半导体装置的散热板的俯视图。
图7B为本发明的第五实施方式的半导体装置的散热板的剖视图。
图8为比较例的半导体装置的剖视图。
图9为比较例的半导体装置的剖视图。
图10为本发明的第一实施方式的半导体装置的剖视图。
具体实施方式
本发明提供可防止散热板因热膨胀或热收缩所伴随的应力而剥离的可靠性高的半导体装置。
以下，参照附图说明本发明的半导体装置。然而，本发明的半导体装置能够以多种不同的实施方式来实施，而不局限于以下示出的实施方式的记载内容来解释。此外，本实施方式中参照的附图中，相同部分或具有相同功能的部分标注相同的符号，并省略其重复说明。
<实施方式1>
利用图1至图3来说明有关实施方式1的半导体装置的结构。
[半导体装置的整体结构]
图1为示出本发明的第一实施方式的半导体装置100的整体结构的简图。半导体装置100在基板10上配置半导体芯片30，并且在基板10及半导体芯片30上配置散热板20。基板10与散热板20相对置地配置，二者的面积大体相同，半导体装置100具有大致为立方体的形状。
[半导体装置的剖视图]
图2为示出本发明的第一实施方式的半导体装置100的沿图1的I－I’线的剖视图。
基板10为封装基板(支承基板)，为利用了聚酰亚胺或环氧树脂等的有机材料的有机基板。基板10可以为多层结构的层积基板。基板10的与散热板20相对置的面上设置用于与半导体芯片30或突起部22电连接的电极。基板10的另一个表面上也可适当配置半导体芯片30以外的元件、或用于与外部的器件或基板等电连接的电极。在基板10的表面，除了上述电极之外的所有部分可利用构成基板10的有机材料和涂敷于基板10的环氧类树脂涂层剂、热固性环氧类绝缘膜等而由绝缘材料构成。
在基板10上，配置为经由导电性的凸块49将半导体芯片30倒装芯片连接。作为凸块49，可使用铜(Cu)、银(Ag)、金(Au)及焊料(solder)等。半导体芯片30为集成电路(IC)芯片或大规模集成电路(LSI)芯片等半导体元件。作为半导体芯片30，使用以硅(Si)为主要材料的半导体元件，但也可为以碳化硅(SiC)或氮化镓(GaN)等为主要材料的半导体元件。此外，在第一实施方式中，示出在基板上配置了一个半导体元件的例子，然而也可在基板上并排地配置多个半导体，还可层积多个半导体。
在基板10与半导体芯片30之间，配置用于固定半导体芯片30的底部填充(underfill)45。作为底部填充45，可使用环氧树脂、氰酸酯树脂、丙烯酸树脂、聚酰亚胺树脂、硅树脂等。
在半导体芯片30上经由热界面材料47配置散热板20。热界面材料47可使用散热片、石墨、导热膏等众所周知的导热材料(TIM)。作为热界面材料47，为了有效地向散热板20传递半导体芯片30的发热，可使用导热性高、粘结性良好的材料。另外，作为散热板20，也可使用铜(Cu)、铝(Al)、铝硅铜(AlSiCu)陶瓷等。
在散热板20的外周附近具有向基板10突出的固定部28。散热板20的固定部28与基板10经由粘结剂41固定。此外，粘结剂41的绝缘性及导电性都良好。若抽象性地舍去在后文中说明的突起部22和应力吸收部26，则散热板20具有在散热板的外周附近具有向基板10突出的固定部28的盖状的形状。基板10的侧面和散热板20的侧面形成为配置于大致相同平面上，与基板10的侧面相比，散热板20的侧面可位于更接近半导体装置100的中心的位置，也可以相反地，与基板10的侧面相比，散热板20的侧面位于更远离半导体装置100的中心的位置。
散热板20具有与如上所述的固定部28不同而向对置的基板10的方向突出的突起部22。突起部22配置于与半导体芯片30相粘结的部分与固定部28之间。突起部22借助于导电性粘结剂43而粘结于基板10。基板10的粘结于突起部22的部分配置有与基板10的地线电连接的电极。即，突起部22与基板10的地线电连接，是为了使基板10的地线稳定化而配置的构件。此外，若从地线稳定化的观点来看，优选地，突起部22配置于更接近于半导体芯片30的位置。
在本发明的第一实施方式的半导体装置100的散热板20中，在粘结于半导体芯片30的部分与突起部22之间，配置应力吸收部26。更具体地，在散热板20的与基板10对置的面上，在粘结于半导体芯片30的部分与突起部22之间形成凹状的槽24。在散热板20上，当抽象性地舍去固定部28与突起部22时，散热板20具有规定的厚度，而配置有槽24的部分形成厚度比其周围的厚度薄的应力吸收部26。此外，散热板20的固定部28、突起部22、槽24等可通过刻蚀来形成。
[散热板20的平面结构]
图3A为本发明的第一实施方式的半导体装置的散热板20的俯视图，图3B为沿着图3A中的I－I’线的剖视图。利用虚线围起来的矩形的区域30’为表示散热板20与半导体芯片30(未图示)相粘结的位置。在矩形形状中可配置突起部22，以便包围粘结半导体芯片30区域。进而，在散热板20的外周部，配置与基板10(未图示)粘结并固定的固定部28。在第一实施方式中，在粘结半导体芯片30的区域与形成突起部22的部分之间，配置槽24(应力吸收部26)。优选地，槽24配置于靠近配置突起部22的位置。更优选地，槽24与配置突起部22位置相邻地配置。槽24(应力吸收部26)也与突起部22同样地，形成为包围半导体芯片30的粘结区域的矩形形状。
构成半导体装置100的基板10和半导体芯片30分别以有机基板和硅来作为主要材料。基板10的热膨胀系数为约15ppm，半导体芯片30的热膨胀系数为约3.4ppm。这样，基板10的热膨胀系数的值大于半导体芯片30的热膨胀系数的值。因此，在温度循环试验中，低温时(例如，－55℃)基板10的收缩量大，因此半导体装置100整体上向上面(图2的上侧，配置有散热板20的面)突出弯曲。在这里，基板10与散热板20在外周附近借助于粘结剂41而牢固地粘结并固定。另外，散热板20与半导体芯片30利用热界面材料47而牢固地粘结并固定着。这样，散热板20与基板10及半导体芯片30被牢固地粘结并固定着，因此在温度循环试验的低温时，对于散热板20在弯曲方向上施加应力。
关于本发明的第一实施方式的半导体装置100的散热板20，在粘结半导体芯片30的部分与固定基板10的固定部28之间，具有槽24。借助于该槽24，在散热板20中形成应力吸收部26。即，通过在散热板20中设置槽24，在散热板20的形成了槽24的部分，形成具有比未形成槽24的部分的散热板20的厚度薄的应力吸收部26。利用应力吸收部26，可缓和因热引起的散热板20的应变。换言之，散热板20的应力吸收部26与其周围相比刚性低。像这样，通过在散热板20中形成刚性低的部分，可使散热板20的热应力得到缓和。例如，通过使散热板20中包括应力吸收部26，在温度循环试验中，可降低在低温时的半导体装置100的弯曲。由此，可降低因半导体装置100的弯曲行为而产生的、在散热板20的突起部22与基板10之间的粘结部中的应力，可防止该粘结部处的剥离。
<第二实施方式>
对于本发明的第二实施方式的半导体装置的概要，参照图4A及图4B来进行说明。
图4A为第二实施方式的半导体装置的散热板20的俯视图，图4B为沿着图4A中的I－I’线的剖视图。第二实施方式的特征在，散热板20中配置两个槽，即，槽24a和槽24b，且形成应力吸收部26。槽24a及槽24b形成于粘结半导体芯片30的区域30’与突起部22之间。与第一实施方式的槽24同样地，优选地，槽24a配置靠近配置突起部22的位置。更优选地，槽24a配置为与配置突起部22的位置相邻。另外，与第一实施方式的槽24同样地，槽24a的在平面上的形状也形成为矩形形状。槽24b配置于槽24a与粘结半导体芯片30的区域30’之间。关于平面上的形状，与槽24a同样地形成为矩形形状。
在第二实施方式中，在和半导体芯片30相粘结的区域30’与突起部22之间，配置有两个槽，即，槽24a和槽24b，因此与第一实施方式相比，应力吸收部26的刚性进一步降低，从而可进一步缓和散热板20的突起部22与基板10的粘结部处的应力。
<第三实施方式>
对于本发明的第三实施方式的半导体装置的概要，参照图5A及图5B来进行说明。
图5A为第三实施方式的半导体装置的散热板20的俯视图，图5B为沿着图5A中的I－I’线的剖视图。第三实施方式的特征在于，在散热板20中配置有底孔24c，形成应力吸收部26。有底孔24c形成于粘结半导体芯片30的区域30’与突起部22之间。优选地，有底孔24c配置在靠近配置突起部22的位置。更优选地，有底孔24c配置为与配置突起部22的位置相邻。参照图5A可知，多个有底孔24c沿着突起部22保持规定的间隔，并配置为矩形形状。进而，也可以沿着配置这些有底孔24c的区域的内侧，将多个有底孔24c保持规定的间隔而配置为矩形形状。
像这样，在第三实施方式中，不是像第一实施方式那样在散热板20中形成槽24，然而由于在散热板20中配置有多个凹状的有底孔24c而形成应力吸收部26，因此与第一实施方式同样地，可降低因半导体装置100的弯曲行为而产生的、在突起部22与基板10之间的粘结部中的应力。
<第四实施方式>
对于本发明的第四实施方式的半导体装置的概要，参照图6A及图6B来进行说明。
图6A为第四实施方式的半导体装置的散热板20的俯视图，图6B为沿着图6A中的I－I’线的剖视图。第四实施方式的特征在于，在散热板20上，配置从与基板10相对的面到作为半导体装置的外侧的面而贯通的贯通孔24d，作为应力吸收部26。贯通孔24d可配置于与在第三实施方式中示出的配置有底孔24c的位置相同的位置。优选地，贯通孔24d配置在靠近配置突起部22的位置。更优选地，贯通孔24d配置为与配置突起部22的位置相邻。
在第四实施方式中，在配置了散热板20的多个贯通孔24d(应力吸收部26)的部分的周围，刚性降低。因此，与第一实施方式同样地，可降低因半导体装置100的弯曲行为而产生的、在突起部22与基板10之间的粘结部中的应力。
<第五实施方式>
对于本发明的第五实施方式的半导体装置的概要，参照图7A及图7B来进行说明。
图7A为第五实施方式的半导体装置的散热板20的俯视图，图7B为沿着图7A中的I－I’线的剖视图。第五实施方式的特征在于，与第一实施方式不同，槽24e配置于突起部22的外侧，即，配置于突起部22与固定部28之间，形成应力吸收部26。优选地，槽24e配置在靠近配置突起部22的位置。更优选地，槽24e配置为与配置突起部22的位置相邻。即使槽24e配置于突起部22的外侧，也与槽24配置于突起部22的内侧的第一实施方式同样地，可降低在突起部22与基板10之间的粘结部中的应力。
<其他实施方式>
以上，参照图1至图7B，说明了本发明的第一实施方式至第五实施方式，然而，本发明不局限于上述的实施方式。本发明可将如上所述的各实施方式，在不脱离要旨的范围内，适当地变更或组合各实施方式来实施。
例如，在第一实施方式中，示出了槽24以矩形形状连续地配置的例，然而槽24也可断续地形成。另外，也可以与形成为矩形形状的突起部22的各边平行地形成槽，而在相当于角的部分形成有底孔或贯通孔。另外，也可以将第一实施方式与第五实施方式进行组合，在配置了突起部22的位置的内侧和外侧形成槽24及槽24e。另外，虽然示出了槽24等形成为凹状的例子，然而也可以为半圆形、三角形等其他形状。另外，由槽24等形成的应力吸收部26也可形成于散热板20和半导体芯片30粘结的部分、与基板10粘结并固定于散热板20的固定部28之间。然而，从使突起部22与基板10之间的粘结部中的应力降低的观点来看，优选将应力吸收部26形成于靠近突起部22的位置。
进而，在第一实施方式至第三实施方式及第五实施方式中，说明了槽24等配置于散热板20的与基板10相对置的面上的实施方式，然而本发明的实施方式不局限于此。也可以在与散热板20的与基板10相对置的面相反的面、即在向半导体装置100的外部暴露的面中形成槽或有底孔。
<模拟>
以下，对于本发明的实施例的半导体装置和比较例的半导体装置，示出应力模拟的结果。
[比较例的结构]
图8为示出了比较例的半导体装置700的剖视图。半导体装置700具有玻璃陶瓷基板710。玻璃陶瓷基板的信号的传输损失小，因此常常被用于高速器件的半导体封装件。半导体芯片730在玻璃陶瓷基板710上倒装芯片连接，在半导体芯片730的上表面，经由热界面材料747而粘结盖状的散热板720。在玻璃陶瓷基板710的外周部，粘结并固定散热板720。
在粘结于半导体芯片730的区域的外侧，散热板720具有向玻璃陶瓷基板710侧突出的突起部722。突起部722经由导电性粘结剂743而粘结于玻璃陶瓷基板710，并与玻璃陶瓷基板710的地线电连接。
作为半导体装置700的主要结构要素的材料，盖状的散热板720使用铜，半导体芯片730使用硅，玻璃陶瓷基板710使用玻璃陶瓷。在这里，关于这些结构要素的材料的热膨胀系数，铜为约15ppm、硅为约3.4ppm，玻璃陶瓷为约9.5ppm。由此，在半导体装置700的制造工序中，温度循环试验为低温时(例如，－55℃)，因各结构要素的热膨胀系数的不匹配，半导体装置700向图8的上方凸突出弯曲。然而，在玻璃陶瓷基板710的情况下，弯曲的行为被抑制为较小，因此几乎不产生各结构要素之间的粘结部的剥离等问题。
近年，对于层积基板等有机基板，也正开发着可对应于高速器件的基板。有机基板比玻璃陶瓷基板价格低廉，因此可用于高速器件的封装基板的机会增多。图9中示出比较例的半导体装置800的剖视图。图9的半导体装置800与图8中示出的半导体装置700相同的结构，然而在作为封装基板使用有机基板810这一点上不同。
作为半导体装置800的主要结构要素的材料，盖状的散热板820为铜，半导体芯片830为硅，有机基板810为包含有机材料的基板。关于这些结构要素的材料的热膨胀系数，铜为约15ppm，硅为约3.4ppm，有机基板为约15ppm。由此，图8的玻璃陶瓷基板710与图9的有机基板810的热膨胀系数相比，有机基板810的热膨胀系数大。作为封装基板，在使用了有机基板810的半导体装置中，在温度循环试验中，在低温时(例如，－55℃)，半导体装置800向图9的上方突出弯曲。此时，有机基板810弯曲行为大于图8中示出了的玻璃陶瓷基板710的弯曲行为，因而会产生各结构要素的粘结部的剥离。尤其是，存在在散热板820的突起部822与有机基板810之间的粘结部施加应力而产生剥离的情况，且存在难以保持地线电位的稳定性的问题。
[实施例]
图10为示出本发明一个实施例的半导体装置的剖视图。图10中示出的半导体装置具有与在第一实施方式中说明了的半导体装置相同的结构。在半导体装置100中，使用有机基板作为基板10，并且使用包含铜(Cu)的散热板20。另外，使用环氧树脂作为粘结剂41，使用环氧树脂作为底部填充45，且使用银(Ag)膏作为导电性粘结剂43，使用金属作为热界面材料47。在此，散热板20为正方形，一边的长度a为26.5mm、厚度b为0.5mm、槽24的宽度c为4mm、槽24的深度d为0.3mm、突起部22的长度e为0.3mm、突起部22的平面方向的厚度f为0.5mm、固定部28的长度g为0.7mm、固定部28的平面方向的厚度h为2mm、夹着半导体芯片30的两个突起部22的间隔i为16mm。另外，半导体芯片30为正方形，一边的长度j为11mm，并配置于正方形的基板10及散热板20的中央。另外，基板10的一边的长度k为27mm、厚度m为0.99mm。此外，应力吸收部26的宽度为4mm、厚度为0.3mm。
另一方面，比较例的半导体装置不具有图10中的槽24(应力吸收部26)，其他为相同结构。在表1中示出，温度循环试验时(－55℃～125℃)，突起部22与基板10之间的连接部分(设定为地线连接部)中的最大应力时的温度和应力。
表1
结构 地线连接部最大应力(温度：－55℃)
无槽(比较例) 3.75Mpa
有槽(实施例) 3.52Mpa
对于不具有槽24的比较例的半导体装置，地线连接部的最大应力为3.75Mpa。另一方面，具有槽24(即，具有应力吸收部26)的实施例的地线连接部的最大应力为3.52Mpa。由此，基于模拟可知，实施例与比较例相比，可降低－55℃时的施加于地线连接部的应力。
<实验结果>
其次，在表2中示出，对于具有与上述模拟中设定的尺寸相同的结构的实施例的半导体装置与比较例的半导体装置进行了温度循环试验(－55℃～125℃)的实验结果。表2的数值中，以投入至温度循环试验的半导体装置的数量作为分母，以半导体装置的导通确认结果为“不良(NG)”的作为分子。此外，半导体装置的导通确认结果为“不良”的原因认为是，散热板20的突起部22与基板10之间的粘结部分的一部分或全部剥离。
表2
Figure BDA0002464610020000091
参照表2，不具有槽24的比较例的半导体装置的情况下，800循环的导通确认全部无问题，然而在1000循环中，30个之中的6个为“不良”，且在1200循环中，22个之中的13个为“不良”，在1500循环中，7个中的4个为“不良”。另一方面，具有槽24的(具有应力吸收部26)实施例的半导体装置的情况下，800循环、1000循环、1200循环的各试验中，分别将30个、30个、28个半导体装置投入了试验，然而未出现“不良”。在1500循环时，26个中的3个为“不良”。
如上所述，具有槽24(具有应力吸收部26)的实施例的半导体装置与不具有槽24的比较例的半导体装置相比，在温度循环试验的导通确认中，可确认“不良”的比例大幅度地减少了。由此，可确认在实施例中具有可防止突起部22与基板10之间的粘结部的剥离的效果。
根据本发明，通过在散热板中设置刚性低的应力吸收部，可使由半导体装置的弯曲行为产生的、散热板的突起部与基板之间的粘结部中的应力降低，并且可防止突起部与基板之间的粘结部的剥离。由此，可保持散热板与地线之间的稳定的电连接。因此，可提供可靠性高的半导体装置。

Claims (22)

1.一种半导体装置，具有：
基板；
半导体芯片，位在所述基板的顶侧上方；以及
盖子，位在所述基板的所述顶侧上方，其中所述盖子具有：
中央部分，位在所述半导体芯片的顶侧上方；
固定部，耦接到所述基板的所述顶侧；以及
突起部，耦接到在所述固定部和所述半导体芯片之间的所述基板的所述顶侧；
热界面材料，接触所述盖子的中央部分以及所述半导体芯片的所述顶侧。
2.根据权利要求1所述的半导体装置，其还具有在所述突起部和所述基板的所述顶侧之间的突起粘结剂。
3.根据权利要求2所述的半导体装置，其中所述突起粘结剂与所述基板的电极耦接。
4.根据权利要求1所述的半导体装置，其还具有在所述固定部和所述基板的所述顶侧之间的固定粘结剂。
5.根据权利要求1所述的半导体装置，其还具有在所述半导体芯片的底侧和所述基板的所述顶侧之间的底部填充。
6.根据权利要求5所述的半导体装置，其中所述底部填充延伸在所述半导体芯片的侧边和所述突起部之间。
7.根据权利要求5所述的半导体装置，其中所述底部填充接触所述热界面材料。
8.根据权利要求1所述的半导体装置，其中所述基板包含层积基板。
9.根据权利要求1所述的半导体装置，其中所述盖子包含金属。
10.根据权利要求1所述的半导体装置，其中所述热界面材料延伸超过所述半导体芯片的侧边。
11.根据权利要求1所述的半导体装置，其中面向所述半导体芯片的所述盖子的侧面包括蚀刻表面，所述蚀刻表面界定所述中央部分、所述固定部以及所述突起部。
12.根据权利要求1所述的半导体装置，其中所述固定部的末端和所述突起部的末端共平面。
13.根据权利要求1所述的半导体装置，其中所述突起部具有宽度，所述宽度小于所述固定部的宽度。
14.根据权利要求1所述的半导体装置，其还包括在所述突起部和所述基板的所述顶侧之间的突起粘结剂以及在所述固定部和所述基板的所述顶侧的固定粘结剂，其中所述突起粘结剂包含与所述固定粘结剂不同的材料。
15.根据权利要求1所述的半导体装置，其还包括在所述突起部和所述基板的所述顶侧之间的突起粘结剂以及在所述固定部和所述基板的所述顶侧的固定粘结剂，其中所述突起粘结剂是导电性的，而所述固定粘结剂是非导电性的。
16.一种制造半导体装置的方法，其包含:
提供基板；
提供半导体芯片于所述基板的顶侧；以及
提供盖子于所述基板的所述顶侧，其中所述盖子包括:
中央部分，位在所述半导体芯片的顶侧；
固定部，耦接到所述基板的所述顶侧；以及
突起部，耦接到在所述固定部和所述半导体芯片之间的所述基板的所述顶侧；并且提供热界面材料，所述热界面材料接触所述盖子的所述中央部分以及所述半导体芯片的所述顶侧。
17.根据权利要求16所述的方法，其还包括提供突起粘结剂于所述基板的所述顶侧以及所述突起部之间。
18.根据权利要求16所述的方法，其还包括提供固定粘结剂于所述固定部以及所述基板的所述顶侧之间。
19.根据权利要求16所述的方法，其还包括提供底部填充于所述半导体芯片的底侧和所述基板的所述顶侧之间。
20.根据权利要求19所述的方法，其中所述底部填充延伸在所述半导体芯片的侧边和所述突起部之间。
21.根据权利要求16所述的方法，其中所述基板包含层积基板。
22.根据权利要求16所述的方法，其还包括提供突起粘结剂于所述突起部和所述基板的所述顶侧之间以及提供固定粘结剂于所述固定部和所述基板的所述顶侧之间，其中所述突起粘结剂是导电性，而所述固定粘结剂是非导电性。
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