JP5928222B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- JP5928222B2 JP5928222B2 JP2012168384A JP2012168384A JP5928222B2 JP 5928222 B2 JP5928222 B2 JP 5928222B2 JP 2012168384 A JP2012168384 A JP 2012168384A JP 2012168384 A JP2012168384 A JP 2012168384A JP 5928222 B2 JP5928222 B2 JP 5928222B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- electrode
- underfill resin
- semiconductor
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 275
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000011347 resin Substances 0.000 claims description 90
- 229920005989 resin Polymers 0.000 claims description 90
- 239000000463 material Substances 0.000 claims description 62
- 239000007788 liquid Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 27
- 238000010438 heat treatment Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 6
- 239000002245 particle Substances 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 239000002041 carbon nanotube Substances 0.000 claims description 3
- 229910021393 carbon nanotube Inorganic materials 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 6
- 239000000945 filler Substances 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 229920001187 thermosetting polymer Polymers 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 239000004850 liquid epoxy resins (LERs) Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 101710149792 Triosephosphate isomerase, chloroplastic Proteins 0.000 description 1
- 101710195516 Triosephosphate isomerase, glycosomal Proteins 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- YNBADRVTZLEFNH-UHFFFAOYSA-N methyl nicotinate Chemical group COC(=O)C1=CC=CN=C1 YNBADRVTZLEFNH-UHFFFAOYSA-N 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10145—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1141—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form
- H01L2224/11422—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form by dipping, e.g. in a solder bath
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/1319—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16147—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26122—Auxiliary members for layer connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/26145—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
- H01L2224/81355—Bonding interfaces of the bump connector having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/81855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/81862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81905—Combinations of bonding methods provided for in at least two different groups from H01L2224/818 - H01L2224/81904
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06568—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
(1)構 造
図1は、実施の形態1の半導体装置2の断面図である。
図6乃至8および図11乃至13は、半導体装置2の製造方法の工程断面図である。図9及び10は、第2の電極18の先端近傍を拡大した工程断面図である。
まず図6(a)に示すように、第2の半導体チップ6に対応する集積回路等(集積回路40、第2の電極18、第4の電極42)を有する半導体ウエハ(半導体基板)50の表面を、接着剤51で支持基板54に固定する。その後、半導体ウエハ50の裏面に、突出部20に対応するレジストパターン52を形成する。
まず、液状のアンダーフィル樹脂を用意する。アンダーフィル樹脂10bは、例えば図11(a)に示すように、蓋のない容器64に入れられる。
図12に示すように、複数の第2の電極18それぞれの上方に、液状のアンダーフィル樹脂10bが付着した接合材料8を配置する。その後、接合材料8と各第2の電極18を接触させる。すなわち第2の電極18それぞれの上に、液状のアンダーフィル樹脂10bが付着した個々の接合材料8を配置する。
接合材料8を第2の電極18それぞれの上に配置した後、接合材料8と液状のアンダーフィル樹脂10bを加熱して、第1の電極14と第2の電極18とを接合する。第1の電極14と第2の電極18は、例えばリフローにより接合される。加熱温度は、接合材料8の融点より高い温度(例えば、約250℃)である。
図16は、実施の形態2の半導体装置2bの平面図である。図17は、図16のXVII-XVII線に沿った断面図である。実施の形態1と共通する部分については、説明を省略または簡単にする。
図22は、実施の形態3の半導体装置2cの断面図である。実施の形態1又は2と共通する部分については、説明を省略または簡単にする。
図23は、実施の形態4の半導体装置2dの断面図である。実施の形態1乃至3と共通する部分については、説明を省略または簡単にする。図24は、ヒートスプレッダー86の配置(layout)を説明する平面図である。
図25は、実施の形態5の半導体装置2eの断面図である。実施の形態1乃至4と共通する部分については、説明を省略または簡単にする。
第1の面と、前記第1の面に配置された複数の第1の電極とを有する第1の半導体チップと、
前記第1の面に対向する第2の面と、前記第2の面に少なくとも一端が配置された複数の第2の電極と、各前記第2の電極の前記一端を電極ごとに囲む複数の第1の突出部とを有する第2の半導体チップと、
前記複数の第1の電極に含まれる第3の電極をそれぞれ、前記複数の第2の電極のうち前記第3の電極に対向する電極の前記一端に接合する複数の導電性の接合材料と、
それぞれが各前記第1の突出部の内側に配置され、前記接合材料を材料ごとに覆う複数の第1のアンダーフィル樹脂とを
有する半導体装置。
付記1の半導体装置において、
前記第2の半導体チップはさらに、平面視において前記第1の半導体チップを囲む第2の突出部を有することを
特徴とする半導体装置。
付記1又は2に記載の半導体装置において、さらに、
前記第2の面のうち平面視において前記第1の半導体チップの外側の部分に配置されたヒートスプレッダーを有することを
特徴とする半導体装置。
付記2又は3のいずれか1項に記載の半導体装置において、さらに、
前記第1の半導体チップと前記第2の半導体チップの間に配置され、前記第1のアンダーフィル樹脂より熱伝導率の高い第2のアンダーフィル樹脂と、
前記第1の半導体チップを挟んで前記第2の半導体チップの反対側に配置されたヒートスプレッダーとを有することを
特徴とする半導体装置。
付記4に記載の半導体装置において、
前記第2のアンダーフィル樹脂は、カーボンナノチューブおよび導電性粒子のいずれか一方または双方を含むことを
特徴とする半導体装置。
付記1乃至5のいずれか1項に記載の半導体装置において、さらに、
前記第2の半導体チップを挟んで前記第1の半導体チップの反対側に配置された基板を有することを
特徴とする半導体装置。
付記1乃至6のいずれか1項に記載の半導体装置において、
前記第1の電極は、前記第1の半導体チップに含まれる集積回路に接続され、
前記第2の電極は、前記第2の半導体チップに含まれる半導体基板を貫通する電極であることを
特徴とする半導体装置。
第1の半導体チップの一面に配置された複数の第1の電極それぞれに導電性の接合材料を配置し、配置された前記接合材料に液状のアンダーフィル樹脂を付着させる第1の工程と、
第2の半導体チップの一面に露出した一端がそれぞれ異なる突出部に囲われた複数の第2の電極それぞれの上に、前記液状のアンダーフィル樹脂が付着した前記接合材料を配置する第2の工程と、
第2の工程の後、前記接合材料を加熱して、前記第1の電極と前記第2の電極とを接合する第3の工程と、
第2の工程の後、前記液状のアンダーフィル樹脂を加熱して、前記突出部それぞれの内側で前記液状のアンダーフィル樹脂を硬化させる第4の工程とを有する
半導体装置の製造方法。
付記8に記載の半導体装置の製造方法において、さらに、
表面から裏面に向かって伸びる前記第2の電極を有する半導体基板の前記裏面をエッチングして、前記突出部を形成するとともに前記第2の電極の一端を露出させ、その後前記半導体基板を前記第2の半導体チップに分割する第4の工程を有することを
特徴とする半導体装置の製造方法。
付記8又は9に記載の半導体装置において、
前記接合材料は、半田バンプであり、
前記液状のアンダーフィル樹脂は、前記半田バンプの酸化物を除去するフラックスを含むことを
特徴とする半導体装置の製造方法。
6・・・第2の半導体チップ
8・・・導電性の接合材料
10・・・アンダーフィル樹脂
12・・・第1の面
14・・・第1の電極
16・・・第2の面
18・・・第2の電極
20・・・突出部
86・・・ヒートスプレッダー
Claims (8)
- 第1の面と、前記第1の面に配置された複数の第1の電極とを有する第1の半導体チップと、
前記第1の面に対向する第2の面と、前記第2の面に少なくとも一端が配置された複数の第2の電極と、各前記第2の電極の前記一端を電極ごとに囲む複数の第1の突出部とを有する第2の半導体チップと、
前記複数の第1の電極に含まれる第3の電極をそれぞれ、前記複数の第2の電極のうち前記第3の電極に対向する電極の前記一端に接合する複数の導電性の接合材料と、
それぞれが各前記第1の突出部の内側に配置され、前記接合材料を材料ごとに覆う複数の絶縁性の第1のアンダーフィル樹脂とを
有する半導体装置。 - 請求項1の半導体装置において、
前記第2の半導体チップはさらに、平面視において前記第1の半導体チップを囲む第2の突出部を有することを
特徴とする半導体装置。 - 請求項1又は2に記載の半導体装置において、さらに、
前記第2の面のうち平面視において前記第1の半導体チップの外側の部分に配置されたヒートスプレッダーを有することを
特徴とする半導体装置。 - 請求項2又は3のいずれか1項に記載の半導体装置において、さらに、
前記第1の半導体チップと前記第2の半導体チップの間に配置され、前記第1のアンダーフィル樹脂より熱伝導率の高い第2のアンダーフィル樹脂と、
前記第1の半導体チップを挟んで前記第2の半導体チップの反対側に配置されたヒートスプレッダーとを有することを
特徴とする半導体装置。 - 請求項4に記載の半導体装置において、
前記第2のアンダーフィル樹脂は、カーボンナノチューブおよび導電性粒子のいずれか一方または双方を含むことを
特徴とする半導体装置。 - 請求項1乃至5のいずれか1項に記載の半導体装置において、さらに、
前記第2の半導体チップを挟んで前記第1の半導体チップの反対側に配置された基板を有することを
特徴とする半導体装置。 - 第1の半導体チップの一面に配置された複数の第1の電極それぞれに導電性の接合材料を配置し、配置された前記接合材料に液状のアンダーフィル樹脂を付着させる第1の工程と、
第2の半導体チップの一面に露出した一端がそれぞれ異なる突出部に囲われた複数の第2の電極それぞれの上に、前記液状のアンダーフィル樹脂が付着した前記接合材料を配置する第2の工程と、
第2の工程の後、前記接合材料を加熱して、前記第1の電極と前記第2の電極とを接合する第3の工程と、
第2の工程の後、前記液状のアンダーフィル樹脂を加熱して、前記突出部それぞれの内側で絶縁性の硬化されたアンダーフィル樹脂を形成する第4の工程とを有する
半導体装置の製造方法。 - 第1の半導体チップの一面に配置された複数の第1の電極それぞれに導電性の接合材料を配置し、配置された前記接合材料に液状のアンダーフィル樹脂を付着させる第1の工程と、
第2の半導体チップの一面に露出した一端がそれぞれ異なる突出部に囲われた複数の第2の電極それぞれの上に、前記液状のアンダーフィル樹脂が付着した前記接合材料を配置する第2の工程と、
第2の工程の後、前記接合材料を加熱して、前記第1の電極と前記第2の電極とを接合する第3の工程と、
第2の工程の後、前記液状のアンダーフィル樹脂を加熱して、前記突出部それぞれの内側で前記液状のアンダーフィル樹脂を硬化させる第4の工程と、
表面から裏面に向かって伸びる前記第2の電極を有する半導体基板の前記裏面をエッチングして、前記突出部を形成するとともに前記第2の電極の一端を露出させ、その後前記半導体基板を前記第2の半導体チップに分割する第5の工程を有することを
特徴とする半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012168384A JP5928222B2 (ja) | 2012-07-30 | 2012-07-30 | 半導体装置および半導体装置の製造方法 |
US13/949,503 US9691676B2 (en) | 2012-07-30 | 2013-07-24 | Semiconductor device and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012168384A JP5928222B2 (ja) | 2012-07-30 | 2012-07-30 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014027210A JP2014027210A (ja) | 2014-02-06 |
JP5928222B2 true JP5928222B2 (ja) | 2016-06-01 |
Family
ID=49994097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012168384A Expired - Fee Related JP5928222B2 (ja) | 2012-07-30 | 2012-07-30 | 半導体装置および半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9691676B2 (ja) |
JP (1) | JP5928222B2 (ja) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2520952A (en) * | 2013-12-04 | 2015-06-10 | Ibm | Flip-chip electronic device with carrier having heat dissipation elements free of solder mask |
US9768147B2 (en) | 2014-02-03 | 2017-09-19 | Micron Technology, Inc. | Thermal pads between stacked semiconductor dies and associated systems and methods |
US10020236B2 (en) * | 2014-03-14 | 2018-07-10 | Taiwan Semiconductar Manufacturing Campany | Dam for three-dimensional integrated circuit |
KR102320821B1 (ko) | 2014-09-11 | 2021-11-02 | 삼성전자주식회사 | 반도체 패키지 |
US10044171B2 (en) * | 2015-01-27 | 2018-08-07 | TeraDiode, Inc. | Solder-creep management in high-power laser devices |
JP6421050B2 (ja) * | 2015-02-09 | 2018-11-07 | 株式会社ジェイデバイス | 半導体装置 |
US9786519B2 (en) * | 2015-04-13 | 2017-10-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaged semiconductor devices and methods of packaging semiconductor devices |
US20180376041A1 (en) * | 2015-12-24 | 2018-12-27 | Kyocera Corporation | Image sensor mounting board and imaging device |
JP2017123446A (ja) * | 2016-01-08 | 2017-07-13 | 株式会社日立製作所 | 半導体装置および半導体パッケージ装置 |
US9941210B1 (en) * | 2016-12-27 | 2018-04-10 | Nxp Usa, Inc. | Semiconductor devices with protruding conductive vias and methods of making such devices |
US10689248B2 (en) | 2017-03-16 | 2020-06-23 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
US10586716B2 (en) * | 2017-06-09 | 2020-03-10 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package |
US10170341B1 (en) | 2017-06-30 | 2019-01-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Release film as isolation film in package |
DE102017126028B4 (de) | 2017-06-30 | 2020-12-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Gehäuse und Herstellungsverfahren mit einem Trennfilm als Isolierfilm |
US20190157222A1 (en) * | 2017-11-20 | 2019-05-23 | Nxp Usa, Inc. | Package with isolation structure |
US11282717B2 (en) * | 2018-03-30 | 2022-03-22 | Intel Corporation | Micro-electronic package with substrate protrusion to facilitate dispense of underfill between a narrow die-to-die gap |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002299380A (ja) * | 2001-03-30 | 2002-10-11 | Matsushita Electric Works Ltd | 半導体チップ実装構造及び半導体チップ実装方法 |
JP4727850B2 (ja) | 2001-06-21 | 2011-07-20 | ローム株式会社 | 半導体電子部品 |
JP2004103928A (ja) * | 2002-09-11 | 2004-04-02 | Fujitsu Ltd | 基板及びハンダボールの形成方法及びその実装構造 |
JP2004172412A (ja) | 2002-11-20 | 2004-06-17 | Kyocera Corp | コンデンサ素子およびコンデンサ素子内蔵多層配線基板 |
WO2005076352A1 (ja) | 2004-02-05 | 2005-08-18 | Renesas Technology Corp. | 半導体装置および半導体装置の製造方法 |
US7800238B2 (en) * | 2008-06-27 | 2010-09-21 | Micron Technology, Inc. | Surface depressions for die-to-die interconnects and associated systems and methods |
JP2011071381A (ja) * | 2009-09-28 | 2011-04-07 | Toshiba Corp | 積層型半導体装置およびその製造方法 |
KR20120053332A (ko) * | 2010-11-17 | 2012-05-25 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
-
2012
- 2012-07-30 JP JP2012168384A patent/JP5928222B2/ja not_active Expired - Fee Related
-
2013
- 2013-07-24 US US13/949,503 patent/US9691676B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US9691676B2 (en) | 2017-06-27 |
JP2014027210A (ja) | 2014-02-06 |
US20140027920A1 (en) | 2014-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5928222B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP5325736B2 (ja) | 半導体装置及びその製造方法 | |
TWI415235B (zh) | Semiconductor device and manufacturing method thereof | |
TWI628750B (zh) | 功率覆蓋結構及其製造方法 | |
JP4592751B2 (ja) | プリント配線基板の製造方法 | |
US5909057A (en) | Integrated heat spreader/stiffener with apertures for semiconductor package | |
JP4883203B2 (ja) | 半導体装置の製造方法 | |
TWI446465B (zh) | Manufacturing method of semiconductor device | |
US9698072B2 (en) | Low-stress dual underfill packaging | |
TW201448137A (zh) | 功率覆蓋結構及其製造方法 | |
JP6242231B2 (ja) | 半導体装置及びその製造方法 | |
JP5389770B2 (ja) | 電子素子内蔵印刷回路基板及びその製造方法 | |
US11521918B2 (en) | Semiconductor device having component mounted on connection bar and lead on top side of lead frame and method of manufacturing semiconductor device thereof | |
JP2008135521A (ja) | 半導体装置およびその製造方法 | |
JP5543754B2 (ja) | 半導体パッケージ及びその製造方法 | |
JP2018026484A (ja) | パッケージ方法及びパッケージ構造 | |
JP2007243106A (ja) | 半導体パッケージ構造 | |
JP5974991B2 (ja) | 半導体装置 | |
JP5484532B2 (ja) | 微細配線パッケージ | |
JP5958136B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2012134318A (ja) | 配線基板及び半導体装置と半導体装置の製造方法 | |
JP5577734B2 (ja) | 電子装置および電子装置の製造方法 | |
JP2018067627A (ja) | 電子部品内蔵基板の製造方法 | |
JP6520101B2 (ja) | 電子装置及び電子装置の製造方法 | |
JP2011151289A (ja) | 半導体装置並びにその実装構造及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150327 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20150610 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20151215 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20151217 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160201 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160329 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160411 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5928222 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |