CN109644561B - 布线基板和其制造方法 - Google Patents

布线基板和其制造方法 Download PDF

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Publication number
CN109644561B
CN109644561B CN201780053451.3A CN201780053451A CN109644561B CN 109644561 B CN109644561 B CN 109644561B CN 201780053451 A CN201780053451 A CN 201780053451A CN 109644561 B CN109644561 B CN 109644561B
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layer
plating layer
plating
conductor
conductive
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CN109644561A (zh
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铃木敏夫
金山雅巳
服部晃佳
鬼头正典
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B32B15/00—Layered products comprising a layer of metal
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    • B32B15/015—Layered products comprising a layer of metal all layers being exclusively metallic one layer being formed of an iron alloy or steel, another layer being formed of a metal other than iron or aluminium the said other metal being copper or nickel or an alloy thereof
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    • C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T428/12—All metal or with adjacent metals
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    • Y10T428/12—All metal or with adjacent metals
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T428/12861—Group VIII or IB metal-base component
    • Y10T428/12875—Platinum group metal-base component
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    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
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    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12771—Transition metal-base component
    • Y10T428/12861—Group VIII or IB metal-base component
    • Y10T428/12903—Cu-base component
    • Y10T428/1291—Next to Co-, Cu-, or Ni-base component

Abstract

提供能适合安装于导体部的布线基板和其制造方法。以覆盖金属化层7的表面的方式，通过镀覆，形成初始镀Cu层19后，将该初始镀Cu层19加热并使其软化或熔融，因此，该软化或熔融了的初始镀Cu层19的铜掺入至金属化层7的开气孔部9。另外，该加热时，金属化层7的成分与初始镀Cu层19的成分相互热扩散。因此，之后固化的情况下(即，初始镀Cu层19成为下部镀Cu层13的情况下)，通过锚固效果、相互热扩散的效果等，金属化层7与下部镀Cu层13的密合性提高，安装性提高。

Description

布线基板和其制造方法
技术领域
本发明涉及例如能降低磁性所产生的对信号的影响等的布线基板和其制造方法。
背景技术
以往，作为布线基板，例如已知有：在陶瓷基板上形成有布线层(导体部)的陶瓷布线基板。另外，作为该布线层，例如已知有：在陶瓷基板上形成金属化层，通过镀Ni在金属化层上形成镀Ni层，在其上通过镀Cu乃至镀Au形成镀Cu层乃至镀Au层等(参照专利文献1～5)。
此处，镍(Ni)为强磁性体，根据使用环境、所搭载的磁部件而瞬间暴露于磁场的情况下，存在如下问题：镍发生永久磁化，电特性(例如高频特性)降低。
作为其对策，已知有如下技术：作为镀Au层的基底镀层，使用非磁性体的铜(Cu)代替镍。
现有技术文献
专利文献
专利文献1：日本特开平11-251699号公报
专利文献2：日本特开平11-111891号公报
专利文献3：日本特开平11-102814号公报
专利文献4：日本特开平6-6000号公报
专利文献5：日本特开2011-49471号公报
发明内容
发明要解决的问题
然而，如上述，使用非磁性体的镀Cu层代替镀Ni层的情况下，金属化层与镀Cu层之间的密合性不充分，因此，有时产生不良情况。
具体而言，对于布线层，通过软钎料(Solder)安装各种部件时，产生软钎料腐蚀(即，铜被软钎料吸收的现象)、或者Au线等的引线接合时，存在产生镀层剥离等问题，安装性有时变得不充分。
即，对于布线层，通过软钎料安装各种部件、或者通过引线接合将Au线接合(从而进行安装)时，有时无法适合地进行安装。
本发明是鉴于前述课题而作出的，其目的在于，提供：能适合地安装于导体部的布线基板和其制造方法。
用于解决问题的方案
(1)本发明的第1方案涉及一种布线基板的制造方法，其为形成有具有导电性、且为非磁性体的导体部的布线基板的制造方法。
该布线基板的制造方法中，作为导体部的形成工序，具备如下工序：第1工序，在导体基部的表面形成由导电材料形成、且非磁性体的导电层，所述导体基部的一部分或整体由导电材料形成、且为具有导电性的非磁性体；第2工序，将导电层加热并使其软化或熔融，之后冷却并固化；和，第3工序，通过镀覆，在经固化的导电层的表面形成由导电材料形成、且为非磁性体的表面层。
本第1方案中，在导体基部的表面(即，露出的表面)(例如通过镀覆)形成导电层后，将该导电层加热并使其软化或熔融(以下，有时将该处理记作加热处理)，因此，该软化或熔融了的导电层的导电材料掺入至作为导体基部的凹部的开气孔部。另外，该加热处理时，导体基部的成分与导电层的成分相互热扩散。因此，之后经固化的情况下，通过锚固效果、相互热扩散的效果等，发挥导体基部与导电层的密合性提高，牢固地接合之类的明显的效果。
另外，热处理后的导电层的表面通过软化或熔融而有时形成沿着导体基部的表面的孔隙(空隙)，但本第1方案中，通过镀覆在导电层的表面形成表面层，因此，可以由导电层和表面层而充分地覆盖开气孔部(即，覆盖性提高)。
因此，在如此形成的导体部的表面(或进而在导体部的表面镀覆有Au等的表面)例如通过软钎料安装各种部件的情况下，或通过引线接合将Au线等接合(从而进行安装)的情况下，其安装性提高。
进而，为了形成为非磁性体的导体部，例如使用非磁性体的铜(Cu)代替强磁性体的镍(Ni)的情况下，例如存在由金属化等形成的导体基部与由铜形成的导电层的密合性低之类的问题，但本第1方案的制造方法中，导体基部与导电层的密合性提高，因此，存在安装性提高之类的优点。
即，本第1方案中，形成为非磁性体的导体部的情况下，导体基部与导电层的密合性提高，因此，发挥安装性也提高之类的明显的效果。
需要说明的是，进行导电层的加热处理的情况下，能在形成导电层的导电材料的熔点的80％以上的温度下进行加热。
(2)本发明的第2方案中，使用铜或银形成导电层，使用铜或银形成表面层。
本第2方案中，示例了作为导电层和表面层的材料(即，非磁性体的材料)的适合的材料。
(3)本发明的第3方案中，具备如下第4工序：通过镀覆，在表面层的表面形成由金、银、锡中的至少一种形成的表面镀层。
本第3方案中，在表面层的表面(即，露出的表面)，通过镀覆，使用金、银、锡形成表面镀层，因此，可以抑制表面层的氧化。因此，对于表面镀层，可以适合地进行各种部件的安装、引线接合。
需要说明的是，作为表面镀层的材料，耐氧化性高、安装性优异的金(Au)是适合的。
(4)本发明的第4方案中，具备如下第5工序：其为第4工序之前的工序，该工序通过镀覆，在表面层的表面形成由钯形成的钯镀层。
本第4方案中，在表面层的表面(即，露出的表面)，换言之，在表面层与表面镀层之间形成钯镀层，因此，可以相应地减薄表面镀层。例如使用金作为表面镀层的材料的情况下，存在能节约昂贵的金之类的优点。
(5)本发明的第5方案中，由包含颗粒的材料形成导体基部的情况下，在导体基部的表面形成作为凹部的开气孔部。
本第5方案中，例如通过调节导体基部的材料的状态(例如粉末材料的情况下，为粒径)、制造条件(例如金属化的情况下，为加热条件)等，从而可以在导体基部的表面(即，露出的表面)形成微小的凹凸(因此作为该凹部的开气孔部)。例如通过增大粉末的粒径，从而可以形成大的开气孔部。
由此，在导体基部上形成导电层的情况下，可以提高锚固效果所产生的密合性。
(6)本发明的第6方案中，导体基部包含多种材料的情况下，作为第1工序之前的工序，具备如下第6工序：进行从导体基部去除特定种类的材料的处理。
本第6方案中，在形成导电层前，例如进行通过蚀刻从导体基部去除特定种类(例如二氧化硅)的颗粒等材料的处理，因此，可以在导体基部的表面形成开气孔部，或者进而进一步增大开气孔部。
由此，在导体基部上形成导电层的情况下，锚固效果所产生的密合性进一步提高。
(7)本发明的第7方案中，通过金属化形成导体基部。
本第7方案示例了导体基部的适合的形成方法。例如如熟知那样，在生片上涂布金属化糊剂，同时进行焙烧，从而进行金属化，可以形成金属化层。
(8)本发明的第8方案涉及一种布线基板，其具备导体部，所述导体部具有导电性、且为非磁性体。
该布线基板中，导体部具备：导体基部，其一部分或整体由导电材料形成、且为具有导电性的非磁性体；非磁性体的中间层，其配置于导体基部的表面；非磁性体的导电层，其由导电材料形成，且配置于中间层的表面；和，非磁性体的表面层，其由导电材料形成，且配置于导电层的表面。而且，中间层包含导体基部的材料和导电层的材料。
本第8方案中，导体部具有层叠有导体基部与中间层与导电层与表面层的结构(即，层叠有非磁性体的各部的结构)，中间层例如通过相互热扩散而包含导体基部的材料和导电层的材料。因此，存在在其之间配置有这样的中间层的导体基部与导电层的密合性高之类的效果。
因此，在这样的构成的导体部的表面(或进而在导体部的表面镀覆有金等的表面)例如通过软钎料安装各种部件的情况下，或进行引线接合的情况下，存在其安装性提高之类的优点。
进而，为了形成为非磁性体的导体部，例如使用非磁性体的铜代替强磁性体的镍的情况下，例如存在通过金属化等形成的导体基部与由铜形成的导电层的密合性低之类的问题，但本第8方案中，可以提高导体基部与导电层的密合性，因此，可以提高安装性。
即，本第8方案中，对于为非磁性体的导体部，导体基部与导电层的密合性提高，因此，发挥安装性也提高之类的明显的效果。
(9)本发明的第9方案中，导电层由铜或银形成，表面层由铜或银形成。
本第9方案中，示例了作为导电层和表面层的材料(非磁性体的材料)的适合的材料。
(10)本发明的第10方案中，在表面层的表面具备由金、银、锡中的至少一种形成的表面镀层。
本第10方案中，在表面层的表面具备由金、银、锡中的至少一种形成的表面镀层，因此，可以抑制表面层的氧化。因此，可以对于表面镀层，适合地进行各种部件的安装、引线接合。
(11)本发明的第11方案中，在表面层与表面镀层之间具备钯镀层。
本第11方案中，在表面层与表面镀层之间具备钯镀层，因此，可以相应地减薄表面镀层。
(12)本发明的第12方案中，在导体基部的表面具有作为凹部的开气孔部。
根据本第12方案的构成，在导体基部上形成导电层的情况下，锚固效果所产生的密合性提高。
(13)本发明的第13方案中，在导体基部的表面的开气孔部存在有导电层的导电材料。
本第13方案中，在导体基部的表面的开气孔部存在有导电层的导电材料，因此，在导体基部上形成导电层的情况下，锚固效果所产生的密合性提高。
(14)本发明的第14方案中，导体基部为金属化层。
本第14方案示例了导体基部的适合的构成。
＜以下，对本发明的各构成进行说明＞
·非磁性体是指，磁化率小于0的抗磁性体、和磁化率小于10×10-5的顺磁性体。
·作为导体部，例如可以举出金属化层的表面形成有多个具有导电性的层的非磁性体的布线层等。即，例如为形成于陶瓷基板的表面的布线层等，可以举出用于传导电信号(特别是高速信号)的电布线。另外，例如可以举出：在用作散热片的金属板的表面形成有多个具有导电性的层的非磁性体的层叠体。
·作为导体基部，可以举出：为非磁性体的金属化层、金属板等。
·作为导体基部中使用的导电材料，可以举出为非磁性体的例如W、Mo、CuW、CuMo等。
·作为镀覆，可以举出电镀、化学镀。
·金属化是指，例如通过焙烧，使陶瓷、非金属材料的表面烧结等从而金属化，由此形成的金属化的层为金属化层。
附图说明
图1为将第1实施方式的陶瓷布线基板沿厚度方向剖切并示意性示出的剖视图。
图2为将第1实施方式的金属化层与中间层与下部镀Cu层沿厚度方向剖切并示意性示出的剖视图。
图3为示出第1实施方式的陶瓷布线基板的制造工序的说明图。
图4的(a)为将金属化层沿厚度方向剖切并示意性示出开气孔部等的剖视图，图4的(b)为将蚀刻处理后的金属化层沿厚度方向剖切并示出开气孔部等的剖视图，图4的(c)为示出在金属化层的表面层叠有下部镀Cu层的状态的剖视图。
图5为示出金属化层的表面的开气孔部的SEM照片。
图6为将比较例的陶瓷布线基板沿厚度方向剖切并示意性示出的剖视图。
图7为将第2实施方式的陶瓷布线基板沿厚度方向剖切并示意性示出的剖视图。
图8为将第3实施方式的布线基板等沿厚度方向剖切并示意性示出的剖视图。
图9为将另一实施方式的布线基板等沿厚度方向剖切并示意性示出的剖视图。
具体实施方式
接着，对本发明的布线基板和其制造方法的实施方式进行说明。
[1.第1实施方式]
本第1实施方式中，例如列举在陶瓷基板上形成有作为布线层的导体部的陶瓷布线基板和其制造方法为例进行说明。
[1-1.陶瓷布线基板的构成]
首先，对本第1实施方式的陶瓷布线基板的构成进行说明。
如图1示意性所示那样，本第1实施方式的陶瓷布线基板1为用于搭载各种半导体元件、水晶等的非磁性体的布线基板，例如作为陶瓷封装体(未作图示)的布线基板使用。
前述陶瓷布线基板1具备：陶瓷基板3；和，导体部5，其为设置于陶瓷基板3的表面的布线层。
其中，陶瓷基板3是作为非磁性体的例如由氧化铝形成的烧结体(氧化铝烧结体)，导体部5由后述的具有导电性的非磁性体的多层构成。
具体而言，导体部5在陶瓷基板3的表面具备非磁性体的金属化层(即，导体基部)7。该金属化层7例如为以钨(W)和/或钼(Mo)为主成分、且由氧化铝(Al2O3)、二氧化硅(SiO2)等陶瓷材料等形成的烧结体，为熟知的具有导电性的层。
作为该金属化层7，例如可以举出：包含钨(W)92重量％、氧化铝(Al2O3)3重量％和微量的二氧化硅(SiO2)、厚度例如为约15μm者。二氧化硅的含量为5重量％以下的范围，例如在低于5重量％时，包含除二氧化硅以外的其他成分、或者适宜调整钨或氧化铝的成分。需要说明的是，该二氧化硅成分的量不限定于上述的重量比率，只要在金属化层7中存在有二氧化硅成分即可。
在前述金属化层7的表面(即，与陶瓷基板3侧为相反侧的后述的其他层层叠的一侧(图1的上方)的表面)上，如图2放大并示意性示出那样，构成金属化层7的钨、氧化铝等的颗粒(例如晶体颗粒)等在表面露出，从而形成多个开气孔部9。需要说明的是，开气孔部9是指，钨、氧化铝等的颗粒等烧结而形成的存在于金属化层7内的微少的空洞中、在表面中向外侧开放的部分。即，是指沿着构成金属化层的颗粒等的露出的表面形成的微少的凹凸部的凹部。
需要说明的是，通过该开气孔部9，从而金属化层7的表面粗糙度(此处为算术平均粗糙度Ra)例如成为1.5～2.5μm的范围。
另外，沿着前述金属化层7的表面(即，沿着形成有开气孔部9的表面)，形成中间层11。该中间层11为包含其厚度方向的两侧(图2的上下)的层、即图2的下侧的金属化层7和后述的图2的上侧的下部镀Cu层(即，导电层)13的成分的层。即，中间层11例如由钨、陶瓷材料、铜(Cu)等形成的层。
回到图1，在前述中间层11的表面(即，前述层叠侧的表面)，以覆盖中间层11的表面整体的方式，形成由铜形成、且厚度为例如0.5～5μm的范围(例如厚度为约1.5μm)的前述下部镀Cu层13。
该下部镀Cu层13是指，由铜镀覆的层，但通过后述的加热处理而软化或熔融后固化、熔接在金属化层7上的层(即，Cu熔接层)。
另外，在前述下部镀Cu层13的表面(即，前述层叠侧的表面)，以覆盖下部镀Cu层13的表面整体的方式，形成由铜形成、且厚度例如为2.5～10μm的范围(例如厚度为5μm)的上部镀Cu层(即，表面层)15。
进而，在前述上部镀Cu层15的表面(即，前述层叠侧的表面)，以覆盖上部镀Cu层15的表面整体的方式，形成由金(Au)形成、且厚度例如为0.5～3μm的范围(例如厚度为1μm)的镀Au层(即，表面镀层)17。
需要说明的是，陶瓷基板3为非磁性体，构成上述导体部5的各层7、11、13、15、17为非磁性体，因此，导体部5也为非磁性体，由此，陶瓷布线基板1也为非磁性体。
[1-2.陶瓷布线基板的制造方法]
接着，对本第1实施方式的陶瓷布线基板1的制造方法进行说明。
(1)本第1实施方式中，首先，如图3的(a)所示那样，准备由熟知的氧化铝烧结体形成的陶瓷基板3，如图3的(b)所示那样，在陶瓷基板3的表面形成金属化层7。
作为该金属化层7的形成方法，首先，在包含由钨和钼中的至少1种形成的导电材料(例如钨)、以及例如由氧化铝和二氧化硅形成的陶瓷材料的固体成分中，加入规定的赋形剂等，制成熟知的金属化糊剂。
需要说明的是，作为固体成分的比率，可以采用与以往同样的比率使其成为上述金属化层7的组成。
接着，在陶瓷基板3的表面涂布前述金属化糊剂。之后，例如以1500℃进行焙烧，从而形成金属化层7。
该金属化层7如图4的(a)示意性示出那样，由构成金属化层7的各种颗粒(例如晶体颗粒)等构成。具体而言，金属化层7主要由钨颗粒(TR)、氧化铝颗粒(AR)、二氧化硅颗粒(SR)构成。另外，各颗粒以单独的状态存在，或聚集而以集合体的状态存在，在该状态下，在金属化层7的表面露出。
由此，在金属化层7的表面，形成沿着颗粒单独或颗粒的集合体的形状的开气孔部9。需要说明的是，在该阶段，开气孔部9其内径为1μm以上。
接着，对于金属化层7的表面，进行作为镀覆前处理的清洗。在该金属化层7的表面，在一部分中，作为玻璃成分的二氧化硅颗粒(SR)露出，通过清洗而去除。作为镀覆前处理，例如通过利用氢氟酸的蚀刻，从而可以将二氧化硅颗粒(SR)去除。
由此，如图4的(b)所示那样，金属化层7的表面的开气孔部9成为二氧化硅颗粒(SR)被去除的部位大幅凹陷的开气孔部9。
即，通过去除二氧化硅颗粒(SR)，可以形成内径最大为3μm左右的大的开气孔部9。通过该镀覆前处理，从金属化层7的表面去除二氧化硅颗粒(SR)，也有时形成新的开气孔部9。
需要说明的是，图4的(b)中，开气孔部9中，将二氧化硅颗粒(SR)被去除、且内径变大者用9a表示。
需要说明的是，用扫描型电子显微镜(SEM)，以倍率3000倍拍摄金属化层7的蚀刻前的表面。如图5中示出其SEM照片那样，可知，在金属化层7的表面存在有大量孔隙(空隙)，即，形成有大量的开气孔部9。
(2)接着，如图3的(c)所示那样，在金属化层7的表面，在之后的加热处理后，形成成为下部镀Cu层(即，Cu熔接层)13的初始镀Cu层19。
具体而言，例如通过熟知的电镀、化学镀(即，镀Cu)，在金属化层7的表面形成例如厚度1.5μm的初始镀Cu层19。
(3)接着，如图3的(d)所示那样，将初始镀Cu层19加热并使其软化或熔融后(即，进行了加热处理后)，冷却使其固化，形成下部镀Cu层13。
具体而言，将初始镀Cu层19加热至铜发生软化或熔融的温度(软化点或熔点)以上的高温(例如900℃)，使初始镀Cu层19软化或熔融(即，实施加热处理)。由此，如图4的(c)所示那样，软化或熔融了的铜掺入至金属化层7的表面的开气孔部9等。
之后，冷却至常温，使初始镀Cu层19固化，从而形成下部镀Cu层13。
需要说明的是，软化或熔融了的初始镀Cu层19掺入至开气孔部9，但直径大于初始镀Cu层19的厚度(例如1.5μm)的开气孔部9中，未充分填充铜，源自开气孔部9的凹部有时残留于下部镀Cu层13的表面。
另外，通过上述加热处理，在金属化层7与下部镀Cu层13的界面，金属化层7与下部镀Cu层13的各成分彼此扩散，形成前述中间层11(参照图2、图3的(d))。
(4)接着，如图3的(e)所示那样，在下部镀Cu层13的表面形成上部镀Cu层15。
具体而言，例如通过熟知的电镀、化学镀(即，镀Cu)，在下部镀Cu层13的表面，形成例如厚度5μm的上部镀Cu层15。
需要说明的是，使初始镀Cu层19软化或熔融后固化而形成下部镀Cu层13时，在下部镀Cu层13的表面，有时形成沿着金属化层7的表面的孔隙(空隙)等凹部(未作图示)，但该凹部在形成上部镀Cu层15时，由铜填充，因此，上部镀Cu层15的表面变平滑。
(5)接着，如图3的(f)所示那样，在上部镀Cu层15的表面形成镀Au层17。
具体而言，例如通过熟知的电镀、化学镀(即，镀Au)，在上部镀Cu层15的表面形成例如厚度1μm的镀Au层17。
如此，制造陶瓷布线基板1。
[1-3.评价]
此处，作为评价，对软钎料性评价和引线接合性评价进行说明。
＜软钎料性评价＞
作为本发明的保护范围的实施例1、2，与前述实施方式同样地，制作陶瓷基板3上形成有导体部5的试样(样品)。需要说明的是，该试样如下：在金属化层7上形成厚度5μm的初始镀Cu层19，在实施本发明的加热处理而形成的下部镀Cu层13上形成厚度5μm的上部镀Cu层15，在该上部镀Cu层15上形成厚度1μm的镀Au层17。
另外，另行作为本发明的保护范围外的比较例1、2，如图6所示那样，制作如下试样：其在金属化层7上，(未实施本发明的加热处理)形成厚度5μm的上部镀Cu层15，在上部镀Cu层15上形成厚度1μm的镀Au层17。
然后，在各试样的导体部5涂布助焊剂，以235℃，使各试样浸渍于无Pb软钎料(SAC305)槽中5秒后，观察软钎料的湿润性等软钎料的状态(即，软钎料性)。
此处，评价软钎料性的情况下，对常温(25℃)下的软钎料性(表1的常温)、和以350℃加热了2分钟后的软钎料性(表1的中温)这两者进行观察。需要说明的是，此处，在350℃的温度下进行加热是由于，考虑了实际使用的温度条件。
将其结果示于下述表1。需要说明的是，表1的“OK”是指，软钎料在导体部5的表面整体浸润铺开、不产生不湿润、软钎料腐蚀之类的不良情况的优选的状态。另一方面，表1的“NG”是指，发生软钎料腐蚀等，不优选的状态。
[表1]
软钎料性
实施例1(常温) OK
实施例2(中温) OK
比较例1(常温) NG
比较例2(中温) NG
由该表1表明，本发明的保护范围的实施例1、2由于软钎料性优异，因此，是适合的。与此相对，本发明的比较例1、2的软钎料性差，不优选。
<引线接合性评价>
作为本发明的保护范围的实施例3、4，与前述实施例1、2同样地，制作在陶瓷基板3上形成有导体部5的试样(样品)。
另外，与前述比较例1、2同样地，制作本发明的保护范围外的比较例3、4的试样。
然后，对于各试样的导体部5，接合φ30μm的Au线。之后，将陶瓷基板3固定，对Au线施加载荷，并进行拉伸，进行拉伸试验(MIL-STD-883)，考察了破坏的状态(即，考察了引线接合性)。
需要说明的是，评价引线接合性的情况下，与前述软钎料性的评价同样地，对常温(25℃)下的引线接合性(表2的常温)、和以350℃加热了2分钟后的引线接合性(表2的中温)这两者进行了观察。
将其结果示于下述表2。需要说明的是，表2的“OK”是指，拉伸Au线时未产生镀层剥离那样的不良情况，Au线的切断为金属网切断，示出优选的状态。另一方面，表2的“NG”是指，发生了镀层剥离等，示出不优选的状态。
[表2]
引线接合性
实施例3(常温) OK
实施例4(中温) OK
比较例3(常温) NG
比较例4(中温) NG
由该表2表明，本发明的保护范围的实施例3、4的引线接合性优异，因此，是适合的。与此相对，本发明的比较例3、4的引线接合性差，不优选。
[1-4.效果]
接着，对本第1实施方式的效果进行说明。
本第1实施方式中，以覆盖金属化层7的表面的方式，通过镀覆形成初始镀Cu层19后，将该初始镀Cu层19加热并使其软化或熔融，因此，该软化或熔融了的初始镀Cu层19的铜掺入至金属化层7的开气孔部9。另外，该加热时，金属化层7的成分与初始镀Cu层19的成分相互热扩散。
因此，之后固化的情况下(即，初始镀Cu层19成为下部镀Cu层13的情况下)，通过锚固效果、相互热扩散的效果等，金属化层7与下部镀Cu层13的密合性提高，发挥牢固地接合之类的明显的效果。
另外，在加热处理后的下部镀Cu层13的表面，软化或熔融时，有时形成沿着金属化层7的表面的孔隙(空隙)，但本第1实施方式中，以覆盖下部镀Cu层13的表面的方式，通过镀覆，形成上部镀Cu层15，因此，覆盖性提高。进而，以覆盖上部镀Cu层15的表面的方式，形成镀Au层17。
因此，在如此形成的导体部5的表面例如通过软钎料安装各种部件的情况下，或通过引线接合将Au线接合(从而进行安装)的情况下，存在其安装性提高之类的优点。
进而，为了形成作为非磁性体的导体部5，例如使用非磁性体的铜代替强磁性体的镍的情况下，例如存在金属化层7与初始镀Cu层19的密合性低之类的问题，但本第1实施方式中，金属化层7与(初始镀Cu层19的加热处理后的)下部镀Cu层13的密合性提高，因此，安装性也提高。
即，本第1实施方式中，形成作为非磁性体的导体部5的情况下，金属化层7与下部镀Cu层13的密合性高，因此，发挥安装性也高的明显的效果。
另外，本第1实施方式中，在形成初始镀Cu层19前，例如进行通过蚀刻，在金属化层7的表面的开气孔部9，例如去除二氧化硅等的颗粒的处理，因此，可以增大开气孔部9(详细地参照图4的(b)的内径变大的开气孔部9a)。另外，通过去除二氧化硅等的颗粒，从而也可以重新形成开气孔部9。
由此，在金属化层7上形成下部镀Cu层13的情况下，通过锚固效果可以提高密合性。
[1-5.与权利要求书的对应关系]
此处，对第1实施方式与权利要求书的文字的对应关系进行说明。
本第1实施方式的、导体部5、陶瓷布线基板1、金属化层7、下部镀Cu层13、上部镀Cu层15、镀Au层17、开气孔部9、中间层11分别相当于本发明的、导体部、布线基板、导体基部、导电层、表面层、表面镀层、开气孔部、中间层的一例。
[2.第2实施方式]
接着，对第2实施方式进行说明，但省略与第1实施方式同样的内容的说明。
需要说明的是，对于与第1实施方式同样的构成，以相同的编号说明。
如图7所示那样，本第2实施方式的陶瓷布线基板21与第1实施方式同样地，如下形成：在陶瓷基板3的表面形成有作为布线层的导体部23。
该布线基板与第1实施方式同样地如下：在金属化层7的表面借助中间层11形成有下部镀Cu层13，在下部镀Cu层13的表面形成有上部镀Cu层15。
特别是本第2实施方式中，在上部镀Cu层15的表面形成有由钯(Pd)形成的镀Pd层25，在镀Pd层25的表面形成有镀Au层17。
该镀Pd层25通过电镀或化学镀而形成，其厚度例如为0.01～0.5μm。需要说明的是，镀Pd层25的厚度高于0.5μm时，有软钎料连接性降低的担心，因此，优选0.5μm以下。
本第2实施方式中，发挥与第1实施方式同样的效果，且形成镀Pd层25作为镀Au层17的基底，因此，存在能降低昂贵的金的用量的优点。
[3.第3实施方式]
接着，对第3实施方式进行说明，但省略与第1实施方式同样的内容的说明。
需要说明的是，对于与第1实施方式同样的构成，以相同的编号说明。
如图8所示那样，本第3实施方式的非磁性体的布线基板31如下得到：例如在由铜与钨的合金(CuW)或铜与钼的合金(CuMo)形成的散热片即非磁性体的金属板33上，接合有框架状的例如由氧化铝等形成的非磁性体的陶瓷构件35等。
在前述金属板33的表面形成有非磁性体的被覆层37，该被覆层37从金属板33侧起，与第1实施方式同样地具备：(将初始镀Cu层19进行加热处理而形成的)下部镀Cu层13、上部镀Cu层15和镀Au层17。
需要说明的是，通过金属板(即，导体基部)33和被覆层37，构成导体部53。
另外，在被覆层37的表面，通过利用粘合剂层41的管芯焊接接合有例如IC等电子部件39。
需要说明的是，在陶瓷构件35上设有电极43，通过Au线45与电子部件进行电连接。
本第3实施方式中，发挥与第1实施方式同样的效果。
[4.其他实施方式]
本发明不受前述实施方式的任何限定，在不脱离本发明的范围内，当然可以以各种方式来实施。
(1)例如如图9的(a)所示那样，可以在陶瓷基板3上的金属化层7的表面借助中间层11形成下部镀Cu层13，在该下部镀Cu层13的表面形成镀Au层17。
(2)另外，如图9的(b)所示那样，可以在陶瓷基板3上的金属化层7的表面借助中间层11形成下部镀Cu层13，在该下部镀Cu层13的表面形成镀Pd层25，在镀Pd层25的表面形成镀Au层17。
(3)进而，可以采用使用银(Ag)的下部镀Ag层代替(作为导电层的)下部镀Cu层。另外，可以采用使用银(Ag)的上部镀Ag层代替(作为表面层的)上部镀Cu层。进而，可以采用使用银的镀Ag层、使用锡(Sn)的镀Sn层代替(作为表面镀层的)镀Au层。
(4)另外，上述实施方式中，列举了以电镀、化学镀形成各层的例子，但例如也可以以溅射、蒸镀等其他方法(形成薄膜的方法)形成各层。
(5)可以将前述各实施方式的构成适宜组合。
附图标记说明
1…陶瓷布线基板
3…陶瓷基板
5、53…导体部
7…金属化层
9…开气孔部
11…中间层
13…下部镀Cu层
15…上部镀Cu层
17…镀Au层
25…镀Pd层
33…金属板
37…被覆层。

Claims (7)

1.一种布线基板，其具备导体部，所述导体部具有导电性、且为非磁性体，其特征在于，
所述导体部具备：
导体基部，其一部分或整体由导电材料形成、且为具有导电性的非磁性体；
非磁性体的中间层，其配置于所述导体基部的表面；
非磁性体的导电层，其由导电材料形成，且配置于所述中间层的表面；和，
非磁性体的表面层，其由导电材料形成，且配置于所述导电层的表面，
所述中间层包含所述导体基部的材料和所述导电层的材料，
所述导电层由铜或银形成。
2.根据权利要求1所述的布线基板，其特征在于，所述表面层由铜或银形成。
3.根据权利要求1或2所述的布线基板，其特征在于，在所述表面层的表面具备由金、银、锡中的至少一种形成的表面镀层。
4.根据权利要求3所述的布线基板，其特征在于，在所述表面层与所述表面镀层之间具备钯镀层。
5.根据权利要求1、2或4中任一项所述的布线基板，其特征在于，在所述导体基部的表面具有作为凹部的开气孔部。
6.根据权利要求5所述的布线基板，其特征在于，在所述导体基部的表面的所述开气孔部存在有所述导电层的导电材料。
7.根据权利要求1、2、4或6中任一项所述的布线基板，其特征在于，所述导体基部为金属化层。
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