CN109643660A - p-型氧化物半导体及其制造方法 - Google Patents
p-型氧化物半导体及其制造方法 Download PDFInfo
- Publication number
- CN109643660A CN109643660A CN201780053309.9A CN201780053309A CN109643660A CN 109643660 A CN109643660 A CN 109643660A CN 201780053309 A CN201780053309 A CN 201780053309A CN 109643660 A CN109643660 A CN 109643660A
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- oxide semiconductor
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- metal
- semiconductor
- iridium
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 96
- 239000002184 metal Substances 0.000 claims abstract description 94
- 239000000758 substrate Substances 0.000 claims abstract description 84
- 229910052741 iridium Inorganic materials 0.000 claims abstract description 78
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 claims abstract description 68
- 239000000463 material Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 62
- 239000013078 crystal Substances 0.000 claims abstract description 49
- 239000012159 carrier gas Substances 0.000 claims abstract description 43
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 30
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 26
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- 238000000889 atomisation Methods 0.000 claims abstract description 5
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- 239000010431 corundum Substances 0.000 claims description 22
- 229910052733 gallium Inorganic materials 0.000 claims description 16
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 11
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- 239000010931 gold Substances 0.000 claims description 9
- 239000002994 raw material Substances 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
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- 229910001195 gallium oxide Inorganic materials 0.000 description 16
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- 238000005229 chemical vapour deposition Methods 0.000 description 10
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- 229910019603 Rh2O3 Inorganic materials 0.000 description 8
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- 102100027715 4-hydroxy-2-oxoglutarate aldolase, mitochondrial Human genes 0.000 description 2
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- AKTIAGQCYPCKFX-FDGPNNRMSA-L magnesium;(z)-4-oxopent-2-en-2-olate Chemical compound [Mg+2].C\C([O-])=C\C(C)=O.C\C([O-])=C\C(C)=O AKTIAGQCYPCKFX-FDGPNNRMSA-L 0.000 description 2
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- DANYXEHCMQHDNX-UHFFFAOYSA-K trichloroiridium Chemical compound Cl[Ir](Cl)Cl DANYXEHCMQHDNX-UHFFFAOYSA-K 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910052720 vanadium Inorganic materials 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
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- 241001330002 Bambuseae Species 0.000 description 1
- OYPRJOBELJOOCE-UHFFFAOYSA-N Calcium Chemical compound [Ca] OYPRJOBELJOOCE-UHFFFAOYSA-N 0.000 description 1
- KRKNYBCHXYNGOX-UHFFFAOYSA-K Citrate Chemical compound [O-]C(=O)CC(O)(CC([O-])=O)C([O-])=O KRKNYBCHXYNGOX-UHFFFAOYSA-K 0.000 description 1
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003708 ampul Substances 0.000 description 1
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- 239000007787 solid Substances 0.000 description 1
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- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
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- UNXRWKVEANCORM-UHFFFAOYSA-I triphosphate(5-) Chemical class [O-]P([O-])(=O)OP([O-])(=O)OP([O-])([O-])=O UNXRWKVEANCORM-UHFFFAOYSA-I 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/448—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
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- C—CHEMISTRY; METALLURGY
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Abstract
本申请提供了一种具有宽带隙和增强的电导率的新型且有用的p‑型氧化物半导体,以及制造该p‑型氧化物半导体的方法。将根据需要的包含铱和其他金属的原料溶液雾化以产生喷雾,并且在使用载气将喷雾传送到基材的表面附近之后,通过使基材表面附近的喷雾发生热反应,在基材上形成包含铱的金属氧化物的晶体或混合晶体,从而制造p‑型氧化物半导体。
Description
技术领域
本发明涉及p-型氧化物半导体。而且,本发明涉及用于制造p-型氧化物半导体的方法。本发明还涉及包括p-型氧化物半导体的半导体装置。此外,本发明涉及包括p-型氧化物半导体的半导体系统。
背景技术
由于下一代开关装置实现了高耐受电压、低损失和耐高温,利用氧化镓(Ga2O3)的具有大带隙的半导体装置引起了人们的关注并且有望被应用于包括逆变器的电源半导体装置。而且,由于氧化镓具有宽带隙,因此氧化镓有望被应用于发光元件和光接收元件,比如发光二极管(LED)和传感器。根据NPL 1,这种氧化镓具有的带隙可通过与铟或铝单独或组合形成混合晶体来控制,并且这种混合晶体作为基于InAlGaO的半导体,是非常具有吸引力的材料。这里,基于InAlGaO的半导体指InXAlYGaZO3(0≤X≤2,0≤Y≤2,0≤Z≤2,X+Y+Z=1.5~2.5)并且可视为包含氧化镓的相同材料系统。
近年来,已经对基于氧化镓的p-型半导体进行了研究。例如,PTL 1描述了使用MgO(p-型掺杂剂源)通过浮区法形成基于β-Ga2O3的晶体而获得的显示p-型传导性的基材。而且,PTL 2公开了通过使用将p-型掺杂剂离子注入到通过分子束外延(MBE)法获得的α-(AlXGa1-X)2O3单晶膜中而形成p-型半导体。然而,NPL2公开了不能通过PTL 1和2中公开的方法获得p-型半导体(NPL2)。事实上,还没有任何使用PTL 1和2中公开的方法形成p-型半导体获得成功的报道。因此,期望实现p-型氧化物半导体和制造p-型氧化物半导体的方法。
而且,NPL 3和4公开了,例如,已经考虑使用Rh2O3或ZnRh2O4作为p-型半导体。然而,Rh2O3具有一个问题:原料浓度尤其在成膜工艺中变低,并且低浓度的原料影响成膜。另外,即使使用有机溶剂,也难以产生Rh2O3的单晶。而且,即使进行了霍尔效应测量,Rh2O3和ZnRh2O4也并未被确定为p-型或测量本身可能不会很好地完成。此外,例如,这些半导体的霍尔系数为测量限(0.2cm3/C)或更低,使其根本没有用。而且,因为ZnRh2O4具有低迁移率和窄带隙,所以ZnRh2O4不能用作LED或电源装置。因此,Rh2O3和ZnRh2O4未必令人满意。
作为宽带隙半导体,除了Rh2O3和ZnRh2O4之外,还研究了各种p-型氧化物半导体。PTL3公开了铜铁矿或氧硫族元素化物用作p-型半导体。然而,使用铜铁矿或氧硫族元素化物的半导体具有低至1cm2/Vs或更小的迁移率以及不足的电子特性,因此,使用铜铁矿或氧硫族元素化物的半导体可能无法与下一代n-型氧化物半导体(比如α-Ga2O3)适当地形成p-n结(junction)。
而且,常规上已知Ir2O3例如用作PTL 4中所公开的铱催化剂,并且PTL 5公开了Ir2O3用作电介质,以及PTL 6公开了Ir2O3用作电极。但是,从不知道Ir2O3用作p-型半导体。
引用文献列表
专利文献
PTL 1:JP2005-340308A
PTL 2:JP2013-58637A
PTL 3:JP2016-25256A
PTL 4:JPH09-25255A
PTL 5:JPH08-227793A
PTL 6:JPH11-21687A
非专利文献
NPL 1:金子健太郎,"基于氧化镓的刚玉结构合金的制造及物理性能",Dissertation,Kyoto Univ.,2013年3月
NPL 2:竹本达哉,EE Times,Japan“电源装置氧化镓”热导率,p-型……克服问题并投入实际使用。[online],2016年6月21日收入,来自http://eetimes.jp/ee/articles/ 1402/27/news028_2.html
NPL 3:F.P.KOFFYBERG等人,"optical bandgaps and electron affinities ofsemiconducting Rh2O3(I)and Rh2O3(III)",J.Phys.Chem.Solids Vol.53,No.10,pp.1285-1288,1992
NPL 4::细野秀雄,“氧化物半导体的功能发展”,物理学研究,电子版,Vol.3,No.1,031211(2013年11月和2014年2月合刊)
发明内容
技术问题
本发明主题的目的是提供具有宽带隙和提高的电导率的新型且有用的p-型氧化物半导体。本发明主题的目的还提供制造该p-型氧化物半导体的方法。
技术方案
为了实现该目的而进行积极检查,结果本发明的发明人发现了可通过包括下述的方法获得在在空穴迁移率方面具有2.4eV或更大的宽带隙以及2cm2/Vs或更大的提高的电导率的p-型氧化物半导体:通过将包含铱的原料溶液雾化,产生雾化液滴;通过使用载气,将雾化液滴运载到基材的表面上;和使邻近基材表面的雾化液滴发生热反应,以在基材上形成包含铱的金属氧化物的晶体的膜。此外,本发明的发明人发现,所获得的p-型氧化物半导体用于使用包括氧化镓(Ga2O3)的宽带隙半导体的半导体装置。本发明的发明人进一步发现本发明的发明人获得的p-型氧化物半导体,和制造p-型氧化物半导体的方法能够解决上面提到的常规问题。
在研究了上述发现之后,本发明的发明人进行了进一步研究,以完成本发明。即,本发明涉及以下内容。
[1]一种制造p-型氧化物半导体的方法,包括:通过将包括铱且任选地包括不同于铱的金属的原料溶液雾化,产生雾化液滴;通过使用载气,将雾化液滴运载到基材的表面上;和使邻近基材表面的雾化液滴发生热反应,以在基材上形成包括铱的金属氧化物的晶体或包括铱的金属氧化物的混合晶体。
[2]根据以上[1]所述的方法,其中所述原料溶液包括铱和不同于铱的金属,并且其中所述金属包括选自下述的金属:周期表第2族的金属、周期表第9族除铱之外的金属和周期表第13族的金属。
[3]如[1]或[2]所述的方法,其中所述热反应在大气压下进行。
[4]如[1]至[3]所述的方法,其中所述基材为包括刚玉结构的基板。
[5]一种p-型氧化物半导体,包括:作为主要组分的结晶氧化物半导体,所述结晶氧化物半导体包括包含铱的金属氧化物的晶体,或所述结晶氧化物半导体包括包含铱的金属氧化物的混合晶体。
[6]如[5]所述的p-型氧化物半导体,其中所述金属氧化物包括Ir2O3。
[7]如[5]或[6]所述的p-型氧化物半导体,其中所述结晶氧化物半导体包括包含铱和选自下列中的金属的混合晶体:周期表第2族的金属、周期表第9族除铱之外的金属和周期表第13族的金属。
[8]如[5]至[7]所述的p-型氧化物半导体,其中所述结晶氧化物半导体包括刚玉结构或β-氧化镓结构。
[9]p-型氧化物半导体,其包括:作为主要组分的结晶氧化物半导体,其带隙为2.4eV或更大。
[10]一种半导体装置,其包括:包括如[5]至[9]所述的p-型氧化物半导体的半导体层;和电极。
[11]如[10]所述的半导体装置,进一步包括:包括作为主要组分的氧化物半导体的n-型半导体层。
[12]如[11]所述的半导体装置,其中所述n-型半导体层包括所述氧化物半导体作为主要组分,所述氧化物半导体包括周期表第2族的金属、周期表第9族的金属,或周期表第13族的金属。
[13]如[11]或[12]所述的半导体装置,
其中所述n-型半导体层和所述p-型氧化物半导体中包括的作为主要组分的所述氧化物半导体之间晶格常数的差为1.0%或更小。
[14]如[11]至[13]所述的半导体装置,其中所述n-型半导体层包括包含镓(Ga)的结晶氧化物半导体作为主要组分。
[15]如[10]至[14]所述的半导体装置,其中所述半导体装置为异质结双极性晶体管(HBT)。
[16]一种制造如[11]至[19]所述的半导体装置的方法,包括:在所述n-型半导体层上设置所述p-型半导体层,其中所述p-型半导体层包括如[5]至[9]所述的p-型氧化物半导体作为主要组分。
[17]如[16]所述的方法,其中所述n-型半导体层包括氧化物半导体作为主要组分,并且其中所述n-型半导体层和所述p-型氧化物半导体中包括的所述氧化物半导体之间的晶格常数的差为1.0%或更小。
[18]如[16]或[17]所述的方法,其中所述n-型半导体层包括包含镓(Ga)的结晶氧化物半导体作为主要组分。
[19]一种半导体系统,包括:如[10]至[15]所述的半导体装置。
[20]一种制造氧化物半导体的方法,包括:使用包括铱且任选地包括不同于铱的金属的原料,通过晶体或混合晶体的生长,直接在包括刚玉结构的基材上或在穿过至少一层的所述基材上,形成包括铱的金属氧化物的晶体或包括铱的金属氧化物的混合晶体。
[21]如[20]所述的方法,其中所述原料包括卤化铱。
技术效果
获得根据本发明主题的p-型氧化物半导体,其具有宽带隙和增强的电导率,作为p-型半导体显示出增强的半导体特性。而且,根据本发明主题的方法能够在工业上有利地产生所述类型的氧化物半导体。
附图说明
图1显示了可根据本发明主题的实施方式使用的喷雾化学气相沉积(CVD)装置的示意图。
图2显示了通过X-射线衍射(XRD)测量的实施方式的测量结果。水平轴指示衍射的角度(度)并且垂直轴指示衍射的强度(cps)。
图3显示了根据本发明主题的肖特基势垒二极管(SBD)的实施方式的示意图。
图4显示了根据本发明主题的高电子迁移率晶体管(HEMT)的实施方式的示意图。
图5显示了根据本发明主题的金属氧化物半导体场效应晶体管(MOSFET)的实施方式的示意图。
图6显示了根据本发明主题的结型场效应晶体管(JFET)的实施方式的示意图。
图7显示了根据本发明主题的绝缘栅双极型晶体管(IGBT)的实施方式的示意图。
图8显示了根据本发明主题的发光二极管(LED)的实施方式的示意图。
图9显示了根据本发明主题的发光二极管(LED)的实施方式的示意图。
图10显示了根据本发明主题的实施方式的电源系统的示意图。
图11显示了根据本发明主题的实施方式的系统装置的示意图。
图12显示了根据本发明主题的实施方式的电源装置的电源电路的电路图的示意图。
图13显示了根据本发明主题的异质结双极性晶体管(HBT)的实施方式的示意图。
图14显示了通过透射电子显微镜(TEM)测量的实施方式的测量结果(电子束衍射图像)。
图15显示了通过XRD测量的实施方式的测量结果。垂直轴指示衍射角度(度)并且水平轴指示衍射的强度(任意单位)。
具体实施方式
下文,将详细地描述本发明主题的实施方式。
本发明主题的p-型半导体包括包含结晶氧化物半导体作为主要组分的p-型氧化物半导体,并且结晶氧化物半导体包括包含铱(Ir)的金属氧化物的晶体或包含铱(Ir)的金属氧化物的混合晶体。术语“主要组分”在本文中意指p-型氧化物半导体包含作为主要组分包含的结晶氧化物半导体在p-型氧化物半导体中包含的所有组分中以原子比计,优选地为50%或更多。根据本发明主题的实施方式,p-型氧化物半导体包含的结晶氧化物半导体在p-型氧化物半导体的所有组分中按原子比计,可优选地为70%或更多。对于本发明主题,p-型氧化物半导体包含的结晶氧化物半导体在p-型氧化物半导体的所有组分中按原子比计,可进一步优选地为90%或更多。p-型氧化物半导体可包含的结晶氧化物半导体在p-型氧化物半导体的所有组分中按原子比计,为100%。结晶氧化物半导体没有特别限制,只要结晶氧化物半导体包括包含铱的金属氧化物的晶体或混合晶体。术语“包含铱的金属氧化物”在本文中意指包含铱和氧的材料。根据本发明主题的实施方式,包含铱的金属氧化物可优选地为Ir2O3并且可进一步优选地为α-Ir2O3。而且,如果结晶氧化物半导体包含混合晶体,则结晶氧化物半导体中包含的混合晶体可优选地包含铱和选自下述中的金属:周期表第2族的金属、周期表第9族除铱之外的金属和周期表第13族的金属。获得上面提到的本发明主题的p-型氧化物半导体,其迁移率为2cm2/Vs或更大,并且带隙为2.4eV或更大,并且因此,作为p-型氧化物半导体,宽带隙和增强的电特性是有用的。
术语“周期表”在本文中意指由国际纯粹与应用化学联合会(IUPAC)定义的周期表。术语“第2族的金属”意指周期表第2族的金属。周期表第2族的金属的例子包括铍(Be)、镁(Mg)、钙(Ca)、锶(Sr)、钡(Ba)和两种或更多种第2族的金属的组合。术语“第9族除铱之外的金属”意指选自周期表的第9族的除铱之外的金属中的金属。第9族的金属的例子包括钴(Co)、铑(Rh)和其两种或更多种金属的组合。术语“第13族的金属”没有特别限制,只要金属属于周期表的第13族即可。周期表第13族的金属的例子包括铝(Al)、镓(Ga)、铟(In)、铊(Ta)和其两种或更多种金属的组合。根据本发明主题的实施方式,金属优选地包括选自铝(Al)、镓(Ga)和铟(In)中的至少一种金属。
结晶氧化物半导体的例子包括包含铱的金属氧化物的晶体和包含铱的金属氧化物的混合晶体,并且结晶氧化物半导体中包含的金属氧化物的含量比没有特别限制,只要不干扰本发明主题的目的即可,但是,根据本发明主题的实施方式,结晶氧化物半导体中金属氧化物的含量比,在结晶氧化物半导体中所有组分中按原子比计,优选地为50%或更多,并且在结晶氧化物半导体中所有组分中按原子比计,可进一步优选地为70%或更多。对于本发明主题,结晶氧化物半导体中金属氧化物的含量比,在结晶氧化物半导体中所有组分中按原子比计,可最优选地为90%或更多。包含铱的金属氧化物中的铱的含量比没有特别限制,只要不干扰本发明主题的目的即可。金属氧化物中包含的铱的含量比,按原子比计为0.1%或更多,并且,可优选地按原子比计为1%或更多。根据本发明主题的实施方式,金属氧化物中铱的含量比可进一步优选地,按原子比计为10%或更多。
结晶氧化物半导体的晶体结构没有特别限制,只要不干扰本发明主题的目的即可,但是,结晶氧化物半导体优选地包括刚玉结构或β-氧化镓结构,并且进一步优选地包括刚玉结构,以实现更增强的半导体性能。包含结晶氧化物半导体作为主要组分的p-型氧化物半导体可为单晶或可为多晶。而且,p-型氧化物半导体通常为膜的形式,但是可为板的形式或为薄片的形式,只要不干扰本发明主题的目的即可。
根据本发明主题的p-型氧化物半导体可优选地通过下面描述的方法获得,并且制造p-型氧化物半导体的方法也是新型且有用的,并且因此作为本发明的主题包括在本文中。
根据本发明主题的实施方式的p-型氧化物半导体的方法包括:通过将包含铱且任选地包含不同于铱的金属的原料溶液雾化,产生雾化液滴(形成雾化液滴),通过使用载气,将雾化液滴运载到基材的表面上(运载雾化液滴),和使邻近基材表面的雾化液滴发生热反应,以形成包含铱的金属氧化物的晶体或包含铱的金属氧化物的混合晶体(成膜)。
(形成雾化液滴)
在形成雾化液滴时,将包括铱和不同于铱并且任选地包含的金属的原料溶液雾化,以产生雾化液滴。可通过已知的方法来雾化原料溶液,并且对该方法没有特别限制,但是,根据本发明主题的实施方式,优选地通过使用超声振动来雾化原料溶液。通过使用超声振动获得的雾化液滴具有的初始速度为零并且漂浮在空间中。因为漂浮在空间中的雾化液滴可作为气体运载,所以漂浮在空间中的雾化液滴优选地避免了碰撞能造成的损伤,而不像喷雾那样被吹出。液滴的尺寸不限于特定的尺寸,并且可为数mm,但是,雾化液滴的尺寸优选地为50μm或更小。雾化液滴的尺寸优选地在0.1μm至10μm的范围内。
(原料溶液)
如果原料溶液包含铱和不同于铱并且任选地包含的金属,则原料溶液没有特别限制,并且因此可包含无机材料和/或有机材料。根据本发明主题的实施方式,当原料溶液包含铱和不同于铱的金属时,金属可为周期表第2族的金属、选自第9族除铱之外的金属中的金属或周期表第13族的金属。而且,当原料溶液包含包括铱和该金属的两种或更多种的金属时,可使用包括铱的第一原料溶液和包括该金属的第二原料溶液并且分别进行形成雾化液滴的工艺。从第一原料溶液和第二原料溶液获得的各自雾化液滴可在运载雾化液滴的工艺或成膜工艺中合并。根据本发明主题的实施方式,可使用的原料溶液包含铱和呈络合物或盐形式的金属,并且溶解或分散在有机溶剂或水中。络合物形式的例子包括乙酰丙酮络合物、羰基络合物、氨合物络合物、氢化物络合物。而且,盐形式的例子包括有机金属盐(例如,金属乙酸盐、金属草酸盐、金属柠檬酸盐等)、金属硫化物盐、金属硝酸盐盐、金属磷酸盐、金属卤化物盐(例如,金属氯化物盐、金属溴化物盐、金属碘化物盐等)。根据本发明主题的喷雾CVD方法,即使在原料浓度低时,也可优选地进行成膜。
对原料溶液的溶剂没有特别限制,并且因此,溶剂可为包括水的无机溶剂。溶剂可为包括醇的有机溶剂。溶剂可为无机溶剂和有机溶剂的混合溶剂。根据本发明主题的实施方式,不同于传统的成膜方法,溶剂可优选地包含水。而且,根据本发明主题的实施方式,溶剂可为水和酸的混合溶剂。水的例子包括纯水、超纯水、自来水、井水、矿物质水、温泉水、泉水、淡水和海水。酸的例子包括无机酸,比如盐酸、硝酸、硫酸;或有机酸,比如乙酸、丙酸和丁酸。
(基材)
只要基材能够支持p-型氧化物半导体,则对基材没有特别限制。只要不干扰本发明主题的目的,则用于基材的材料没有特别限制,并且基材可为已知材料的基材。而且,基材可包含有机化合物和/或无机化合物。而且,基材可为任何形状并且可适用于所有形状。基材形状的例子包括板状、扁平状、盘状、纤维状、棒状、圆柱状、棱柱状、管状、螺旋状、球状和环状。根据本发明主题的实施方式,基材可优选地为基板。而且,根据本发明主题的实施方式,对基板的厚度没有特别限制。
根据本发明主题的实施方式,对基板没有特别限制,只要基板能够支持p-型氧化物半导体并且只要基板为板状即可。基板可为电绝缘基板、半导体基板或导电基板,并且还可为在其表面上包括金属膜的基板。基板的例子包括包含刚玉结构作为主要组分的基板材料的基材基板。更具体而言,包含具有刚玉结构作为主要组分的基板材料的基板的例子可包括蓝宝石基板(优选地c-平面蓝宝石基板)和α-Ga2O3基板。术语“主要组分”在本文中意指,例如,基板材料的所有元素中,具有特定晶体结构的基板材料的原子比可为50%或更多。根据本发明主题的实施方式,基板材料中的所有金属元素中具有特定晶体结构的基板材料的原子比可优选地为70%或更多。对于本发明主题,基板材料中的所有金属元素中具有特定晶体结构的基板材料的原子比可进一步优选地为90%或更多,并且可为100%。
(运载雾化液滴)
在运载雾化液滴时,通过载气将雾化液滴递送至基材中。对载气没有特别限制,只要不干扰本发明主题的目的即可,并且因此,载气可为氧气、臭氧、惰性气体,比如氮气和氩气。而且,载气可为还原气体,比如氢气和/或合成气体。载气可包含一种或两种或更多种气体。而且,可进一步以降低流速使用稀释载气(例如,10倍稀释载气)等作为第二载气。可从一个或多个位置提供载气。根据本发明主题的实施方式,如果使用喷雾发生器、供应管和成膜室,则载气供应装置可优选地设置在喷雾发生器和供应管处。在该情况下,载气供应装置可设置在喷雾发生器处,并且稀释载气供应装置可设置在供应管处。根据本发明主题的实施方式,载气的流速可优选地在1L/min至10L/min的范围内。当使用稀释载气时,稀释载气的流速可在0.001L/min至2L/min的范围内。此外,根据本发明主题的实施方式,当使用稀释载气时,稀释载气的流速可优选地在0.1L/min至1L/min的范围内。
(成膜)
在成膜时,通过与邻近基材表面的雾化液滴的热反应,在至少一部分基材上形成p-型氧化物半导体。对热反应没有特别限制,只要雾化液滴在加热时反应即可,并且对反应条件没有特别限制,只要不损害本发明主题的目的即可。在成膜时,热反应在原料溶液的溶剂的蒸发温度或比蒸发温度更高的温度下进行。在热反应期间,温度不应太高。例如,热反应期间的温度可为1200℃或更低。热反应期间的温度可优选地为300℃至700℃或750℃至1200℃。根据本发明主题的实施方式,热反应期间的温度可进一步优选地为350℃至600℃或750℃至1100℃。热反应可在真空、非氧气氛、还原气体气氛和氧化气氛的任何气氛中进行。而且,热反应可在大气压下、增压下和减压下的任何条件下进行。根据本发明主题的实施方式,热反应优选地在氧化气氛下进行。而且,根据本发明主题的实施方式,热反应优选地在大气压下进行。热反应进一步优选地在氧化气氛和大气压下进行。“氧化气氛”没有特别限制,只要是其中可通过热反应而形成包括铱的金属氧化物的晶体或混合晶体的气氛即可。例如可通过使用包括氧气的载气,或通过使用包括氧化剂的原料溶液的雾化液滴,获得氧化气氛。能够通过调整成膜时间来设定p-型氧化物半导体的膜厚度。p-型氧化物半导体的膜厚度可为1nm至1mm。根据本发明主题的实施方式,出于将进一步改善半导体特性的原因,p-型氧化物半导体的膜厚度可优选地为1nm至100μm。p-型氧化物半导体的膜厚度可进一步优选地为1nm至10μm。
根据本发明主题的实施方式,p-型氧化物半导体可直接提供在基材上或可经另一层,比如与p-型氧化物半导体的半导体不同的半导体层(例如,n-型半导体层、n+-型半导体层、n--型半导体层)、包括半绝缘层的绝缘层、或缓冲层而提供在基材上。半导体层和绝缘层的例子包括包含周期表第13族的金属的半导体层和包括周期表第13族的金属的绝缘层。缓冲层的优选例子可包括具有刚玉结构的半导体层、具有刚玉结构的绝缘层和具有刚玉结构的导电层。半导体层的例子包括α-Fe2O3、α-Ga2O3或α-Al2O3。在基材上形成缓冲层的方法没有特别限制,并且可通过使用与形成如上所述的p-型氧化物半导体方法类似的方法。
根据本发明主题的实施方式,优选地在形成p-型氧化物半导体层之前或之后形成n-型氧化物半导体层。更具体而言,上面提到的制造半导体装置的方法可优选地包括至少形成p-型氧化物半导体并且也形成n-型氧化物半导体层。形成n-型半导体层的方法没有特别限制并且可为已知的方法,但是,根据本发明主题的实施方式,n-型半导体层可优选地通过喷雾CVD方法形成。n-型半导体层优选地包含氧化物半导体作为主要组分。n-型半导体层中包含的氧化物半导体可优选地包含第2族的金属(例如,Be、Mg、Ca、Sr、Ba)、第9族的金属(例如,Co、Rh、Ir)或第13族的金属(例如,Al、Ga、In、Tl)。根据本发明主题的实施方式,n-型半导体层可优选地包含作为主要组分的结晶氧化物半导体,可进一步优选地包含作为主要组分的包含Ga的结晶氧化物半导体,并且可最优选地包含作为主要组分的具有包含Ga的刚玉结构和刚玉结构的结晶氧化物半导体。而且,根据本发明主题的实施方式,n-型半导体层和p-型氧化物半导体中包含的作为主要组分的氧化物半导体之间晶格常数的差可优选地为1.0%或更小,以实现增强的p-n结,并且晶格常数的差可进一步优选地为0.3%或更小。术语“晶格常数的差”在本文中定义为如下获得的数值(%):n-型半导体层中包含的作为主要组分的氧化物半导体的晶格常数减去p-型氧化物半导体的晶格常数,获得差值,接着,将该差值除以p-型氧化物半导体的晶格常数,获得绝对值,然后,将绝对值乘以100。作为例子,在p-型氧化物半导体层和n-型氧化物半导体层的晶格常数的差为1.0%或更小的情况下,p-型氧化物半导体具有刚玉结构并且作为n-型半导体的主要组分的氧化物半导体也具有刚玉结构。此外,根据本发明主题的实施方式,p-型氧化物半导体优选地为Ir2O3的单晶体或Ir2O3的混合晶体,并且n-型半导体层中包含的作为主要组分的氧化物半导体优选地为Ga2O3的单晶体或Ga2O3的混合晶体。
通过上面提到的方法获得的p-型氧化物半导体能够作为p-型半导体层用于半导体装置。p-型氧化物半导体尤其用于电源装置。半导体装置可分为横向装置和竖直装置。在横向装置中,可在半导体层的一侧上形成第一电极和第二电极。在竖直装置中,可在半导体层的第一侧上形成第一电极并且可在半导体层的第二侧上形成第二电极。半导体层的第一侧位于第二侧对面。根据本发明主题的实施方式,p-型氧化物半导体可用于横向装置并且也可用于竖直装置。根据本发明主题的实施方式,p-型氧化物半导体可优选地用于竖直装置。半导体装置的例子包括肖特基势垒二极管(SBD)、金属半导体场效应晶体管(MESFET)、高电子迁移率晶体管(HEMT)、金属氧化物半导体场效应晶体管(MOSFET)、静电感应晶体管(SIT)、结型场效应晶体管(JFET)、绝缘栅双极型晶体管(IGBT)和发光二极管。
图3至图9显示了使用本发明主题的p-型氧化物半导体作为p-型半导体层的示例。根据本发明主题的实施方式,n-型半导体可为包含与p-型半导体层的主要组分相同的主要组分和n-型掺杂剂的半导体。n-型半导体可为包含不同于p-型氧化物半导体的主要组分的不同主要组分的半导体。而且,通过使用已知的方法,比如调整n-型氧化物半导体中n-型掺杂剂的浓度,n-型半导体可用作n--型半导体层或n+-型半导体层。
图3显示了根据本发明主题的肖特基势垒二极管(SBD)的实施方式的示意图,其包括n--型半导体层101a、n+-型半导体层101b、p-型半导体层、金属层103、绝缘层104、肖特基电极105a和欧姆电极105b。金属层103由金属比如铝组成,并且覆盖肖特基电极105a。图4显示了根据本发明主题的高电子迁移率晶体管(HEMT)的实施方式的示意图,其包括具有宽带隙的n-型半导体层121a、具有窄带隙的n-型半导体层121b、n+-型半导体层121c、p-型半导体层123、栅电极125a、源电极125b、漏电极125c和基板129。
肖特基电极和欧姆电极的材料可为已知的电极材料。这种电极材料的例子包括:金属,包含Al、Mo、Co、Zr、Sn、Nb、Fe、Cr、Ta、Ti、Au、Pt、V、Mn、Ni、Cu、Hf、W、Ir、Zn、In、Pd、Nd、Ag和/或其合金;金属氧化物导电膜,比如氧化锡、氧化锌、氧化铟、氧化铟锡(ITO)和氧化铟锌(IZO);有机导电化合物,比如聚苯胺、聚噻吩和聚吡咯;以及这些材料的混合物。
而且,可通过已知的方法,比如真空蒸发或溅射形成肖特基电极和欧姆电极。更具体而言,当形成肖特基电极时,形成包含Mo的第一层,并且在第一层上形成包含Al的第二层。然后光刻,例如,可在第一层和在第二层形成图案。
用于绝缘层的材料的例子包括GaO、AlGaO、InAlGaO、AlInZnGaO4、AlN、Hf2O3、SiN、SiON、Al2O3、MgO、GdO、SiO2和/或Si3N4。根据本发明主题的实施方式,绝缘层可优选地包含刚玉结构。可通过已知的方法比如溅射、真空蒸发或CVD方法形成绝缘层。
图5显示了根据本发明主题的金属氧化物半导体场效应晶体管(MOSFET)的实施方式的示意图。MOSFET包括n-型半导体层131a、第一n+-型半导体层131b、第二n+-型半导体层131c、p-型半导体层132、p+型半导体层132a、栅绝缘层134、栅电极135a、源电极135b和漏电极135c。图6显示了根据本发明主题的结型场效应晶体管(JFET)的实施方式的示意图,其包括n--型半导体层141a、第一n+-型半导体层141b、第二n+-型半导体层141c、p-型半导体层142、栅电极145a、源电极145b和漏电极145c。图7显示了根据本发明主题的绝缘栅双极型晶体管(IGBT)的实施方式的示意图,其包括n-型半导体层151、n-型半导体层151a、n+-型半导体层151b、p-型半导体层152、栅绝缘层154、栅电极155a、发射电极155b和集电极155c。
图8显示了根据本发明主题的发光二极管(LED)的实施方式的示意图。图8中显示的LED包括第二电极165b上的n-型半导体层161,并且发光层163设置在n-型半导体层161上。而且,p-型半导体层162设置在发光层163上。渗透发光层163中产生的光的透光电极167提供在p-型半导体层162上。第一电极设置在透光电极167上。用于发光层的发光材料可为已知的材料。除了电极部分之外,图8中显示的发光装置可被保护层覆盖。
透光电极的材料的例子包括包含铟或钛的氧化物导电材料。就透光电极的材料而言,具体地,该材料可为In2O3、ZnO、SnO2、Ga2O3、TiO2、其混合晶体。该材料可包含掺杂剂。通过提供这些材料,使用已知的方法比如溅射,将形成透光电极。而且,可在形成透光电极之后进行退火,以使电极更透明。
根据图8的发光二极管,发光层163配置为通过以第一电极165a作为正极,第二电极作为负极,向p-型半导体层162、发光层163和n-型半导体层施加电流而发光。
第一电极165a和第二电极165b的材料的例子包括Al、Mo、Co、Zr、Sn、Nb、Fe、Cr、Ta、Ti、Au、Pt、V、Mn、Ni、Cu、Hf、W、Ir、Zn、Pd、Nd、Ag和/或其合金;金属氧化物导电膜,比如氧化锡、氧化锌、氧化铟、氧化铟锡(ITO)和氧化铟锌(IZO);有机导电化合物,比如聚苯胺、聚噻吩和聚吡咯;以及这些材料的混合物。对第一和第二电极的形成方法没有特别限制。第一和第二电极的形成方法的例子包括湿式方法,比如印刷法、喷雾法、涂布法;物理方法,比如真空沉积法、溅射法、离子镀法;化学方法,比如CVD方法、等离子体CVD方法。考虑到第一电极和第二电极的材料的适用性,形成方法可选自上面提到的方法。
图9显示了根据本发明主题的发光二极管(LED)的另一实施方式的示意图。在图9的LED中,n-型半导体层161设置在基板169上,并且第二电极165b设置在n-型半导体层161的暴露表面的一部分上,其中通过切割出一部分p-型半导体层162、发光层163和n-型半导体层161而形成暴露的表面。
图13显示了根据本发明主题的异质结双极性晶体管(HBT)的实施方式的示意图。图13的HBT能够具有npn结构或pnp结构。下文,将详细描述根据本发明主题的具有npn结构的实施方式,但是,具有pnp结构的实施方式与具有npn结构的实施方式相同,即,具有npn结构的p-型层可被n-型层替换,并且npn结构的n-型层可被p-型层替换。基板60可为半绝缘基材并且可具有高电阻率(例如,大于105Ωcm)。基板60可具有n-型电导率。
集电层42在基板60上形成。集电层42的厚度可为例如200nm至100μm,并且优选地厚度可为400nm至20μm。集电层42可包含刚玉结构化的n-型氧化物半导体作为主要组分。根据本发明主题的实施方式,集电层42中包含的n-型氧化物半导体可优选地包括包含周期表第2族的金属(例如,Be、Mg、Ca、Sr、Ba)、周期表第9族的金属(例如,Co、Rh、Ir)或周期表第13族的金属(例如,Al、Ga、In、Tl)的氧化物半导体作为主要组分。根据本发明主题的实施方式,集电层中包含的n-型氧化物半导体可进一步优选地包含选自铝、铟和镓中的至少一种金属。对于本发明主题,集电层中包含的n-型氧化物半导体可最优选地为氧化镓或氧化镓的混合晶体。术语“主要组分”在本文中意指与上述“主要组分”的含义相同。而且,根据本发明主题的实施方式,n-型氧化物半导体中包含的掺杂剂(例如,Sn、Ge、Si或Ti)通常具有约1×1016/cm3至1×1022/cm3的浓度。根据本发明主题的实施方式,通过调整n-型氧化物半导体中n-型掺杂剂的浓度至约1×1017/cm3或更小,n-型氧化物半导体可为n--型半导体。而且,通过调整n-型氧化物半导体中n-型掺杂剂的浓度至约1×1020/cm3或更大,n-型氧化物半导体可为n+-型半导体。
根据本发明主题的实施方式,尤其当基板60为半绝缘时,子集电层40可提供在集电层42和基板60之间。子集电层40可优选地包含刚玉结构化的n+-型氧化物半导体作为主要组分。根据本发明主题的实施方式,子集电层40中包含的n+-型氧化物半导体可优选地包括包含周期表第2族的金属(例如,Be、Mg、Ca、Sr、Ba)、周期表第9族的金属(例如,Co、Rh、Ir)或周期表第13族的金属(例如,Al、Ga、In、Tl)的氧化物半导体作为主要组分。根据本发明主题的实施方式,子集电层40中包含的n+-型氧化物半导体可进一步优选地包含选自铝、铟和镓中的至少一种金属。对于本发明主题,子集电层40中包含的n+-型氧化物半导体可最优选地为氧化镓或氧化镓的混合晶体。术语“主要组分”在本文中意指与上面提到的“主要组分”的含义相同。
子集电层40的厚度可为约0.1至100μm。在子集电层40的表面上形成集电极52。子集电层40的目的是增强欧姆集电极52的性能。如果基板60是导电的,则可省略子集电层40。
在集电层42上形成基材层44。通常,对基材层44没有特别限制,只要基材层44包含根据本发明主题的实施方式的p-型氧化物半导体作为主要组分即可。基材层44的厚度没有特别限制,并且可优选地为10nm至10μm,并且可进一步优选地为10nm至1μm。根据本发明主题的实施方式,优选地,基材层44的组成从接触集电层的部分至邻近基材层44顶部的部分逐渐改变。根据本发明主题的另一优选的实施方式,超晶格可设置为沉积在基材层44上。
在基材层44上形成发射层46。发射层46可优选地包含刚玉结构化的n-型氧化物半导体作为主要组分。根据本发明主题的实施方式,发射层46中包含的n-型氧化物半导体可优选地包括包含周期表第2族的金属(例如,Be、Mg、Ca、Sr、Ba)、周期表第9族的金属(例如,Co、Rh、Ir)或周期表第13族的金属(例如,Al、Ga、In、Tl)的氧化物半导体作为主要组分。根据本发明主题的实施方式,发射层中包含的n-型氧化物半导体可进一步优选地包含选自铝、铟和镓中的至少一种金属。对于本发明主题,发射层46中包含的n-型氧化物半导体可最优选地为氧化镓或氧化镓的混合晶体。术语“主要组分”在本文中意指与如上所述的“主要组分”的含义相同。发射层的厚度没有特别限制,并且可为10nm至100μm。发射层46通常具有比基材层44更宽的带隙。根据本发明主题的优选实施方式,发射层46的组成可从与基材层44的界面至发射层46的顶部逐渐改变。
根据本发明主题的实施方式,可优选地在发射层46上形成覆盖层48。覆盖层48可为n+-型氧化物半导体的层并且可优选地为包含选自铝、铟和镓中的至少一种金属的n+-型氧化物半导体的层。根据本发明主题的实施方式,覆盖层48可进一步优选地为n+-掺杂氧化镓的层或n+-掺杂氧化镓的混合晶体的层。覆盖层48的厚度没有特别限制,并且可为10nm至100μm。可通过例如蚀刻覆盖层48发射层46而暴露基材层44。而且,当例如提供向上的集电极时,可以通过蚀刻进一步的层而产生更深的通孔,来暴露子集电层40。
集电极52、基材电极54和发射电极56各自可优选地为欧姆金属电极。发射电极56在待沉积的覆盖层48上形成。基材电极54在,例如,通过蚀刻而暴露的基材层44暴露的表面上形成。如上所述,集电极52在子集电层40上形成。根据本发明主题的另一实施方式,当基板为n-型半导体时,集电极(图13中未示出)提供在背侧,该背侧为具有基板的装置结构的一侧的相对侧。
每个电极的材料没有特别限制,并且已知材料可用于每个电极。根据本发明主题的实施方式,用于每个电极的适当组分的例子包括用于欧姆电极的已知材料(即,例如Ni、Al、Ti、Pt、Au及其层压板)。每个电极的厚度没有特别限制,并且可为约10μm至100μm。每个电极的沉积可通过电子束蒸发、热蒸发、溅射或沉积方法进行。根据本发明主题的实施方式,可在沉积每个电极之后进行退火,以便实现欧姆接触。退火的温度没有特别限制,并且可为约300℃至1000℃。
应当注意,具有pnp结构的HBT,通过用具有npn结构的HBT的n-型层替换具有pnp结构的HBT的p-型层获得,并且也可通过具有npn结构的HBT的p-型层替换具有pnp结构的HBT的n-型层获得。
另外,根据本发明主题的实施方式,半导体装置可用于包括电源的半导体系统中。可通过使用已知方法将半导体装置电连接至布线图案而获得电源。图10显示了根据本发明主题的实施方式的电源系统的示意图。图10的半导体系统包括两个或更多个电源装置(电源)和控制电路。电源系统可结合电路用于系统装置,如图11中显示。图12显示了电源装置的电源电路的电路图的示意图,其包括电源电路和控制电路。将DC电压通过逆变器(配备有MOSFET A至D)在高频率下转换,以转化成AC,随后绝缘并且通过变压器变换。将电压通过整流MOSFET整流并且通过DCL(平滑线圈L1和L2)和电容器平滑,以输出直流电压。此时,通过电压比较器,将输出电压与基准电压比较,以通过PWM控制电路来控制逆变器和整流MOSFET,从而具有期望的输出电压。
实施例
(实施例I)
1.成膜装置
就成膜装置而言,下面结合图1描述根据本发明主题的方法的实施方式中使用的喷雾CVD装置19。喷雾CVD装置19包括基座21,其上放置基板20。喷雾CVD装置19包括:载气供应装置22a;第一流量控制阀23a,其配置为控制从载气供应装置22a送出的载气流;稀释气体供应装置22b;第二流量控制阀23b,其配置为控制从稀释载气供应装置22b送出的载气流;喷雾发生器24,其中包含原料溶液24a;容器25,其中包含水25a;超声换能器26,其附接至容器25的底部;供应管27,其可为内径可为40mm的石英管;和加热器28,其布置在供应管27的外周部分。基座21包括从水平方向倾斜的表面,并且在其上布置基板20。基座21由石英制成。由于配置为成膜室的基座21和供应管27由石英制成,因此该配置减少了外来物质进入在基板20上形成的膜的可能性。
2.原料溶液的制备
通过如下将水溶液制备为原料溶液:将乙酰丙酮镁和盐酸添加至乙酰丙酮铱中,铱为0.005mol/L,使得乙酰丙酮镁的摩尔比为1%并且盐酸具有相同的摩尔数。
3.成膜制备
在2获得原料溶液24a。将上述原料溶液的制品设置在喷雾发生器24中。然后,将c-平面蓝宝石基板作为基板20放置在基座21上,并且激活加热器28,以使加热器28的温度升高至500℃。打开第一流量控制阀23a和第二流量控制阀23b,以从气体供应装置22a和稀释载气供应装置22b(均为载气的来源)将载气供应至成膜室27中,而用载气充分替换成膜室27中的气氛。在成膜室27中的气氛被载气充分替换之后,将来自载气装置22a的载气的流速调整为5.0L/min,并且将来自稀释载气供应装置22b的稀释载气调整为0.5L/min。在本实施方式中,使用氧气作为载气。
4.成膜
然后,使超声换能器振动,并且通过水25a将振动传播至原料溶液24a,以使原料溶液24a雾化,从而形成雾化液滴。通过载气运载雾化液滴并且引入成膜室27中。在大气压下在500℃使雾化液滴在成膜室27中进行热反应,以在基板20上形成膜。成膜时间为1小时并且膜厚度为20nm。
使用X-射线衍射(XRD)装置,在4获得膜的相。上述的成膜鉴定为α-Ir2O3。图2显示了XRD的结果。而且,测量所获得的α-Ir2O3膜的霍尔效应并且α-Ir2O3膜具有的F值为0.997,膜的载流子类型确认为p-型,膜的载流子密度为1.7×1021(/cm3),并且膜的迁移率为2.3(cm2/Vs)。通过透射比测量的所获得的α-Ir2O3膜的带隙为3.0eV。
在4获得α-Ir2O3膜的电子衍射图像。使用TEM分析进行上述成膜。图14显示了电子衍射图像,并且从图14的电子衍射图像显而易见的是,所获得的α-Ir2O3膜具有刚玉结构,该刚玉结构与用作基板的蓝宝石的结构为相同结构。
(参考例)
利用实施例I的实验值计算α-Ir2O3的晶格常数,并且发现α-Ir2O3和α-Ga2O3之间晶格常数的差为0.3%。该结果显示α-Ga2O3的晶体作为主要组分用作n-型半导体的氧化物半导体。
(实施例II)
实施例II在与实施例I的条件相同的条件下获得膜,只是下述条件不同:使用通过将盐酸添加至氯化铱(III)(铱浓度为0.05mol/L)以使盐酸的体积比为20%而制备的水溶液作为原料溶液;调节载气的流速为1.0L/min,用于成膜的温度设置为1000℃,并且成膜时间为20分钟。以与实施例I相同的方式鉴定在实施例II获得的膜,并且发现是α-Ir2O3。图15显示了XRD的结果。而且,所获得的α-Ir2O3膜的厚度为2μm。
(实施例III)
实施例III在与实施例I的条件相同条件下获得膜,只是下面四个条件不同:使用通过混合铱浓度为0.02mol/L的氯化铱(III)和镓浓度为0.02mol/L的氯化镓(III),并且将盐酸添加至体积比为20%而制备的水溶液作为原料溶液;调节载气的流速为15L/min,用于成膜的温度设置为750℃,并且成膜时间为20分钟。以与实施例I相同的方式鉴定在实施例III获得的膜,并且发现是α-(Ir0.95Ga0.05)2O3。膜厚度为2μm。而且,以与实施例I相同的方式测量所获得的α-(Ir0.95Ga0.05)2O3膜的霍尔效应并且发现F值为0.905。膜的载流子类型鉴定为p-型,膜的载流子密度为3.7×1020(/cm3),并且膜的空穴迁移率为2.9(cm2/Vs)。
(实施例IV)
为了确认再现性,实施例IV以与实施例III相同的方式获得膜。以与实施例I中相同的方式鉴定所获得的膜,并且发现是α-(Ir0.95Ga0.05)2O3。以与实施例I中相同的方式,测量所获得的α-(Ir0.95Ga0.05)2O3膜的霍尔效应,并且发现膜的F值为0.927,膜的载流子类型定义为p-型,膜的载流子密度为2.0×1020(/cm3),并且膜的空穴迁移率为5.8(cm2/Vs)。
为了确认再现性,以与实施例III中相同的方式获得膜。以与实施例I中相同的方式鉴定所获得的膜的相,为α-(Ir0.95Ga0.05)2O3。以与实施例I中相同的方式测量所获得的α-(Ir0.95Ga0.05)2O3膜的霍尔效应,并且显示F值为0.927,膜的载流子类型定义为p-型,载流子密度为2.0×1020(/cm3),并且膜的迁移率为5.8(cm2/Vs)。
工业实用性
本发明主题的p-型氧化物半导体可应用为半导体装置(例如,化合物半导体装置)和电部件和电子装置,光学和电子摄像相关的装置以及工业零件。由于根据本发明主题的p-型氧化物半导体具有增强的p-型半导体性能,因此p-型氧化物半导体尤其可应用于半导体装置。
标号说明
19 喷雾CVD装置
20 基板
21 基座
22a 载气供应装置
22b 稀释载气供应装置
23a 流量调节阀
23b 流量调节阀
24 喷雾发生器
25 容器
25a 水
26 超声换能器
27 供应管
28 加热器
29 排气口
40 子集电层
42 集电层
44 基材层
46 发射层
48 覆盖层
52 集电极
54 基材电极
56 发射电极
60 基板
101a n--型半导体层
101b n+-型半导体层
103 金属层
104 绝缘层
105a 肖特基电极
105b 欧姆电极
121a 具有宽带隙的n-型半导体层
121b 具有窄带隙的n-型半导体层
121c n+-型半导体层
123 p-型半导体层
125a 栅电极
125b 源电极
125c 漏电极
128 缓冲层
129 基板
131a n-型半导体层
131b 第一n+-型半导体层
131c 第二n+-型半导体层
132 p-型半导体层
134 栅绝缘膜
135a 栅电极
135b 源电极
135c 漏电极
138 缓冲层
139 半绝缘层
141a n--型半导体层
141b 第一n+-型半导体层
141c 第二n+-型半导体层
142 p-型半导体层
145a 栅电极
145b 源电极
145c 漏电极
151 n-型半导体层
151a n--型半导体层
151b n+-型半导体层
152 p-型半导体层
154 栅绝缘层
155a 栅电极
155b 发射电极
155c 集电极
161 n-型半导体层
162 p-型半导体层
163 发光层
165a 第一电极
165b 第二电极
167 透光电极
169 基板
Claims (21)
1.一种制造p-型氧化物半导体的方法,其包括:
通过将包括铱且任选地包括不同于铱的金属的原料溶液雾化,产生雾化液滴;
通过使用载气,将所述雾化液滴运载到基材的表面上;和
使邻近所述基材的所述表面的所述雾化液滴发生热反应,以在所述基材上形成包括铱的金属氧化物的晶体或包括铱的金属氧化物的混合晶体。
2.根据权利要求1所述的方法,
其中所述原料溶液包括铱和所述不同于铱的金属,并且
其中所述金属包括选自下述的金属:周期表第2族的金属、周期表第9族除铱之外的金属和周期表第13族的金属。
3.根据权利要求1或权利要求2所述的方法,
其中所述热反应在大气压下进行。
4.根据权利要求1至3中任一项所述的方法,
其中所述基材为包括刚玉结构的基板。
5.一种p-型氧化物半导体,其包括:
作为主要组分的结晶氧化物半导体,所述结晶氧化物半导体包括包含铱的金属氧化物的晶体,或所述结晶氧化物半导体包括包含铱的金属氧化物的混合晶体。
6.根据权利要求5所述的p-型氧化物半导体,
其中所述金属氧化物包括Ir2O3。
7.根据权利要求5或权利要求6所述的p-型氧化物半导体,
其中所述结晶氧化物半导体包括包含铱和选自下列中的金属的混合晶体:周期表第2族的金属、周期表第9族除铱之外的金属和周期表第13族的金属。
8.根据权利要求5至7中任一项所述的p-型氧化物半导体,
其中所述结晶氧化物半导体包括刚玉结构或β-氧化镓结构。
9.p-型氧化物半导体,其包括:
作为主要组分的结晶氧化物半导体,其带隙为2.4eV或更大。
10.一种半导体装置,其包括:
包含根据权利要求5至9中任一项所述的p-型氧化物半导体的半导体层;和
电极。
11.根据权利要求10所述的半导体装置,进一步包括:
包括作为主要组分的氧化物半导体的n-型半导体层。
12.根据权利要求11所述的半导体装置,
其中所述n-型半导体层包括作为主要组分的所述氧化物半导体,所述氧化物半导体包括周期表第2族的金属、周期表第9族的金属或周期表第13族的金属。
13.根据权利要求11或权利要求12所述的半导体装置,
其中所述n-型半导体层和所述p-型氧化物半导体中包括的作为主要组分的所述氧化物半导体之间的晶格常数的差为1.0%或更小。
14.根据权利要求11至13中任一项所述的半导体装置,
其中所述n-型半导体层包括包含镓(Ga)的结晶氧化物半导体作为主要组分。
15.根据权利要求10至14中任一项所述的半导体装置,
其中所述半导体装置为异质结双极性晶体管(HBT)。
16.一种制造根据权利要求11至19中任一项所述的半导体装置的方法,其包括:
在所述n-型半导体层上设置所述p-型半导体层,
其中所述p-型半导体层包括根据权利要求5至9中任一项所述的p-型氧化物半导体作为主要组分。
17.根据权利要求16所述的方法,
其中所述n-型半导体层包括氧化物半导体作为主要组分,
并且其中所述n-型半导体层和所述p-型氧化物半导体中包括的所述氧化物半导体之间的晶格常数的差为1.0%或更小。
18.根据权利要求16或权利要求17所述的方法,
其中所述n-型半导体层包括包含镓(Ga)的结晶氧化物半导体作为主要组分。
19.一种半导体系统,其包括:
根据权利要求10至15中任一项所述的半导体装置。
20.一种制造氧化物半导体的方法,其包括:
使用包括铱且任选地包括不同于铱的金属的原料,通过晶体或混合晶体的生长,直接在包括刚玉结构的基材上或在穿过至少一层的基材上,形成包括铱的金属氧化物的晶体或包括铱的金属氧化物的混合晶体。
21.根据权利要求20所述的方法,
其中所述原料包括卤化铱。
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