CN108780772A - 硅通孔芯片的二次封装方法及其二次封装体 - Google Patents

硅通孔芯片的二次封装方法及其二次封装体 Download PDF

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CN108780772A
CN108780772A CN201780010390.2A CN201780010390A CN108780772A CN 108780772 A CN108780772 A CN 108780772A CN 201780010390 A CN201780010390 A CN 201780010390A CN 108780772 A CN108780772 A CN 108780772A
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silicon via
via chip
tin ball
plastic packaging
secondary package
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CN108780772B (zh
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吴宝全
龙卫
柳玉平
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Shenzhen Goodix Technology Co Ltd
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Shenzhen Goodix Technology Co Ltd
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    • G06—COMPUTING; CALCULATING OR COUNTING
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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

本申请实施例涉及半导体封装技术领域，公开了一种硅通孔芯片的二次封装方法。本申请实施例中，硅通孔芯片具有相对的正向表面与反向表面，反向表面上设置有焊球阵列封装BGA锡球，硅通孔芯片的二次封装方法包括：将至少一硅通孔芯片放置在铺设有释放应力膜层的底座上；使用软化的塑封胶包覆硅通孔芯片；待塑封胶固化后去除底座，以获取硅通孔芯片的二次封装体；对二次封装体的表面进行处理，以露出BGA锡球。本申请还公开了一种硅通孔芯片的二次封装体。本申请实施例在二次封装中无需使用基板作为载体，在保证硅通孔芯片具有较高机械结构强度的基础上，降低了二次封装体的厚度，有利于电子产品的薄型化和小型化设计。

Description

硅通孔芯片的二次封装方法及其二次封装体
交叉引用
本申请引用于2017年2月13日递交的名称为“硅通孔芯片的二次封装方法及其二次封装体”的第PCT/CN2017/073354号国际专利申请，其通过引用被全部并入本申请。
技术领域
本申请实施例涉及半导体封装技术领域，特别涉及一种硅通孔芯片的二次封装方法及其二次封装体。
背景技术
带有指纹识别功能的电子产品随着整机设计的需要，逐步迈向小型化和薄型化方向发展，因此，对指纹识别芯片的厚度也提出了越来越高的要求，同时，在满足芯片封装尺寸的要求下，还需要封装体具有良好的机械结构强度以及较小的低翘曲度。
然而，发明人发现在现有的指纹识别芯片的封装方案中，至少存在以下技术问题：不论是采用trench挖槽工艺进行的wire bond打线封装还是TSV(Through Silicon Vias)硅通孔封装，均需要使用基板101作为载体进行二次封装(如图1所示为硅通孔芯片的剖面示意图，如图2所示为采用基板101进 行二次封装后的剖面示意图)，在使用基板作为载体进行封装后，整个封装体的厚度一般会超出0.5mm，单个封装体的翘曲度也会接近50um，这样的封装体尺寸是无法满足电子产品日趋小型化和薄型化的设计需求的。
发明内容
本申请实施例的目的在于提供一种硅通孔芯片的二次封装方法及其二次封装体，二次封装中无需使用基板作为载体，因此，在保证硅通孔芯片具有较高机械结构强度的基础上，降低了二次封装体的厚度，有利于电子产品的薄型化和小型化设计。
为解决上述技术问题，本申请的实施例提供了一种硅通孔芯片的二次封装方法，硅通孔芯片具有相对的正向表面与反向表面，反向表面上设置有焊球阵列封装BGA锡球，硅通孔芯片的二次封装方法包括：将至少一硅通孔芯片放置在铺设有释放应力膜层的底座上；其中，硅通孔芯片的正向表面接触释放应力膜层；使用软化的塑封胶包覆硅通孔芯片；待塑封胶固化后去除底座，以获取硅通孔芯片的二次封装体；对二次封装体的表面进行处理，以露出BGA锡球；其中，被处理的二次封装体的表面与硅通孔芯片的反向表面相对应。
本申请的实施例还提供了一种硅通孔芯片的二次封装体，包括：硅通孔芯片与塑封胶；硅通孔芯片具有正向表面、反向表面以及多个侧向表面；硅通孔芯片的反向表面设置有焊锡球；塑封胶包覆硅通孔芯片的反向表面与多个侧向表面，焊锡球外露于塑封胶的表面。
本申请实施例相对于现有技术而言，通过采用释放应力膜层，当塑封胶固化后，使得硅通孔芯片的二次封装体可以与铺设有释放应力膜层的底座分离， 得到无基板形式的二次封装体，在保证硅通孔芯片具有较高机械结构强度的基础上，相较于基板封装形式降低了硅通孔芯片二次封装体的厚度，有助于电子产品的薄型化和小型化设计。
另外，使用软化的塑封胶包覆硅通孔芯片中，具体包括：将具有空腔的注塑模具按压在底座上，使得硅通孔芯片位于空腔中；向空腔中注入软化的塑封胶，使得塑封胶包覆硅通孔芯片。本实施例提供了使用软化的塑封胶包覆硅通孔芯片的第一种具体实现方式，即采用注塑模具注入软化的塑封胶的方式。
另外，使用软化的塑封胶包覆硅通孔芯片中，具体包括：将软化的塑封胶涂布在硅通孔芯片上；利用压合模具对软化的塑封胶与硅通孔芯片进行压合，使得塑封胶包覆硅通孔芯片。本实施例提供了使用软化的塑封胶包覆硅通孔芯片的第二种具体实现方式，即采用直接涂布并压合的方式。
另外，对二次封装体的表面进行处理，以露出BGA锡球中，具体包括：对二次封装体的表面进行研磨，以露出BGA锡球。本实施例提供了露出BGA锡球的第一种具体实现方式，即采用研磨方式去除部分塑封胶与部分BGA锡球。
另外，BGA锡球的外露面为圆形，BGA锡球的外露面与硅通孔芯片的反向表面的距离等于圆形的半径，此时BGA锡球的外露面的面积最大，提高了BGA锡球与外界电气互连的可靠性。
另外，在对二次封装体的表面进行处理，以露出BGA锡球之后，还包括：在BGA锡球上设置辅助锡球；其中，辅助锡球高于表面。当研磨去除BGA锡球部分过多或者不足、或者BGA锡球的外露面的面积不够大时，可以在BGA锡球上设置辅助锡球，相当于增大了BGA锡球的外露面积，进一步提高了BGA 锡球与外界电气互连的可靠性。
另外，对二次封装体的表面进行处理，以露出BGA锡球中，具体包括：对二次封装体中对应于BGA锡球的塑封胶部分进行局部去除，以露出BGA锡球；在对二次封装体的表面进行处理，以露出BGA锡球之后，还包括：在BGA锡球上设置辅助锡球，且辅助锡球高于或齐平于表面。本实施例提供了露出BGA锡球的第二种具体实现方式，即采用局部去除塑封较并设置辅助锡球的方式。
另外，局部去除的方式包括激光镭射、离子轰击、化学腐蚀中的其中之一或任意组合。
另外，硅通孔芯片的数目为多个；在对二次封装体的表面进行处理，以露出BGA锡球之后，还包括：对二次封装体进行切割，以获取单个硅通孔芯片的二次封装体。
另外，当辅助锡球的外露面高于塑封胶的表面时，辅助锡球的外露面高出塑封胶的表面的距离是50um至300um之间，能够使得辅助锡球有足够的外露面积以确保与外界之间电性连接的可靠性的同时，使得硅通孔芯片的二次封装体的整体厚度尽可能小。
另外，硅通孔芯片为指纹识别芯片，硅通孔芯片的正向表面包括指纹识别感应区。
附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表 示为类似的元件，除非有特别申明，附图中的图不构成比例限制。
图1是根据现有技术中的硅通孔芯片的剖面示意图；
图2是根据现有技术中的采用基板的硅通孔芯片的二次封装体的剖面示意图；
图3是根据本申请第一实施例的硅通孔芯片的二次封装方法的具体流程图；
图4是根据本申请第一实施例中的硅通孔芯片放置于底座的剖面示意图；
图5是根据本申请第一实施例中去除底座的硅通孔芯片的二次封装体的剖面示意图；
图6是根据本申请第二实施例的硅通孔芯片的二次封装方法的具体流程图；
图7是根据本申请第二实施例中使用软化的塑封胶包覆硅通孔芯片的第一种具体实现方式的结构示意图；
图8是根据本申请第三实施例的硅通孔芯片的二次封装方法的具体流程图；
图9是根据本申请第三实施例中使用软化的塑封胶包覆硅通孔芯片的第二种具体实现方式的结构示意图；
图10是根据本申请第四实施例的硅通孔芯片的二次封装方法的具体流程图；
图11A是根据本申请第四实施例中对二次封装体的表面进行研磨以露出BGA锡球的第一种具体实现方式的结构示意图；
图11B是根据本申请第四实施例中硅通孔芯片的二次封装体的单体剖面 示意图；
图12是根据本申请第五实施例中在BGA锡球上设置辅助锡球的硅通孔芯片的二次封装体的剖面示意图；
图13是根据本申请第五实施例中的硅通孔芯片的二次封装体的单体剖面示意图；
图14是根据本申请第六实施例的硅通孔芯片的二次封装方法的具体流程图；
图15是根据本申请第六实施例中局部去除塑封胶以露出BGA锡球的实现方式的结构示意图；
图16是根据本申请第六实施例中局部去除塑封胶并增加辅助锡球的实现方式的结构示意图；
图17是根据本申请第六实施例中的硅通孔芯片的二次封装体的单体剖面示意图。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施例中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本申请所要求保护的技术方案。
本申请的第一实施例涉及一种硅通孔芯片的二次封装方法，具体流程如图3所示。
步骤301，将至少一硅通孔芯片1放置在铺设有释放应力膜层3的底座41上。
请参考图4所示，硅通孔芯片1具有相对的正向表面11与反向表面12，反向表面12上设置有焊球阵列封装BGA锡球2，本实施例中，硅通孔芯片为指纹识别芯片，正向表面11还包括指纹识别感应区13。
在本实施例提供的二次封装过程中，底座41用于承载硅通孔芯片1；当硅通孔芯片1放置在释放应力膜层3上后，由于释放应力膜层3具有一定的黏性，可以起到固定硅通孔芯片1的作用；硅通孔芯片1的正向表面11包括指纹识别感应区13，无需塑封胶封装，因此将正向表面11与释放应力膜层3接触。
可以同时对多个硅通孔芯片1进行二次封装，并可以根据实际需求设置多个硅通孔芯片1摆放在底座41上的规则，例如：可以根据底座41的尺寸或者对二次封装体尺寸的要求，决定多个硅通孔芯片之间的摆放间距或者摆放数量。
较佳的，正向表面11上还设置有保护层(图未示)，保护层覆盖指纹识别感应区13，以对指纹识别感应区13进行保护。其中，保护层的厚度可以是大于或等于5微米且小于或等于50微米，例如，保护层的厚度可以是5微米、或者25微米、或者50微米；该保护层的材料可以是有机胶体，且可以是以涂覆方式设置在正向表面11上。然，本实施例对保护层的厚度、材料以及设置方式，不作任何限制。
步骤302，使用软化的塑封胶包覆硅通孔芯片1。
本步骤中，硅通孔芯片1中除了正向表面11(包括指纹识别感应区13)接触释放应力膜层3外，其余的五个面均被软化的塑封胶所塑封。软化的塑封 胶一般含有树脂、硅油以及二氧化硅颗粒等有机和无机材料。
步骤303，待塑封胶固化后去除底座41，以获取硅通孔芯片1的二次封装体。
如图5所示，当多个硅通孔芯片1同时排列在基板上时，由于硅通孔芯片1的四周有固化的塑封胶环绕支撑，固化后的塑封胶具有一定的强度，因此能形成整片的连体的多个硅通孔芯片1的二次封装体；由于释放应力膜层3与塑封胶之间结合力不会过强，待塑封胶固化后，可以使二次封装体与铺设有释放应力膜层3的底座41分离，从而得到无基板形式的硅通孔芯片的二次封装体。
步骤304，对二次封装体的表面进行处理，以露出BGA锡球2。
此时，BGA锡球2全部埋在固化的塑封胶内，因此需使BGA锡球2露出来。可以采用特定的处理工艺对二次封装体的表面进行处理，以使被处理的二次封装体的表面与硅通孔芯片1的反向表面12相对应，也就是让设置于硅通孔芯片1反向表面12的BGA锡球2外露，使得硅通孔芯片1仅通过BGA锡球2与外界进行电气互连。
需要说明的是，一般来说，在对二次封装体的表面进行处理时，会同时去除部分塑封胶与部分BGA锡球；然而，在有些情况下，也可以仅去除塑封胶。
当获得的是多个硅通孔芯片的二次封装体时，在对二次封装体的表面进行处理露出BGA锡球后，可以对这一连体的多个硅通孔芯片的二次封装体进行切割，以获取单个硅通孔芯片的二次封装体。
本实施例提供的硅通孔芯片的二次封装方法与现有技术相比，通过采用释放应力膜层，当塑封胶固化后，使得硅通孔芯片的二次封装体可以与铺设有 释放应力膜层的底座分离，得到无基板形式的二次封装体，在保证硅通孔芯片具有较高机械结构强度的基础上，相较于基板封装形式降低了硅通孔芯片二次封装体的厚度，有助于电子产品的薄型化和小型化设计。
本申请的第二实施例涉及一种硅通孔芯片的二次封装方法。第二实施例是对第一实施例的细化，主要细化之处在于：请参考图6和图7，本实施例提供了使用软化的塑封胶5以包覆硅通孔芯片1的第一种具体实现方式，即，使用注塑模具注入塑封胶的方式。
本实施例提供的硅通孔芯片的二次封装方法的具体流程如图6所示。
其中，步骤601与步骤301对应大致相同，步骤603至步骤604与步骤303至步骤304对应大致相同，在此处不再赘述；不同之处在于：本实施例对步骤302进行了细化，具体说明如下：
子步骤6021，将具有空腔的注塑模具42按压在底座41上，硅通孔芯片1位于空腔中。
事先将释放应力膜层3铺设在底座41上，摆放好硅通孔芯片1后，合上注塑模具42；通过外界施加给注塑模具42的压紧力，将注塑模具42与底座41压合在一起。
子步骤6022，向空腔中注入软化的塑封胶5，使得塑封胶5包覆硅通孔芯片1。
注塑模具42实际上还设置有注塑口44与排气口43。此时，通过注塑口44向空腔中注入软化的塑封胶5；排气口43用于在注入塑封胶5的过程中排掉空腔内的空气，使得塑封胶5能够完全填充空腔，以完全覆盖硅通孔芯片1。
本实施例提供的硅通孔芯片的二次封装方法与第一实施例相比，提供了 使用注塑模具注塑软化的塑封胶以包覆硅通孔芯片的一种具体实现方式，且注塑模具在本领域内较为常用，操作工艺简单、方便。
本申请的第三实施例涉及一种硅通孔芯片的二次封装方法。第三实施例是对第一实施例的细化，主要细化之处在于：请参考图8和图9，本实施例提供了使用软化的塑封胶包覆硅通孔芯片的第二种具体实现方式，即采用直接涂布并压合的方式。
本实施例提供的硅通孔芯片的二次封装方法的具体流程如图8所示。
其中，步骤801与步骤301对应大致相同，步骤803至步骤804与步骤303至步骤304对应大致相同，在此处不再赘述；不同之处在于：本实施例对步骤302进行了细化，具体说明如下：
步骤8021，将软化的塑封胶5涂布在硅通孔芯片1上。
本实施例中，将硅通孔芯片1摆放在铺设有释放应力膜层3的底座41上后，直接将软化的塑封胶5涂布在硅通孔芯片1上。
步骤8022，利用压合模具45对软化的塑封胶5与硅通孔芯片1进行压合，使得塑封胶5包覆硅通孔芯片。
本实施例中，直接将压合模具45按照如图9中箭头所示方向压合，在压合过程中，多余的塑封胶会溢出，压合完成后，塑封胶5完整包覆硅通孔芯片1除了正向表面11外其余的五个面，并完全填充多个硅通孔芯片之间的缝隙，待塑封胶固化后即能够得到平整的胶面。
需要说明的是，本实施例中的压合模具45可以不设置注塑口与排气口，直接利用压合模具45的压合作用即可实现本实施例记载的技术方案。
由上述分析可以看出，本实施例与本申请第二实施例分别提供了使用软 化的塑封胶包覆硅通孔芯片的一种具体实现方式；区别之处在于：在本申请第二实施例中，硅通孔芯片的二次封装方法为向注塑模具内注入软化的塑封胶以包覆硅通孔芯片；而在本实施例中，直接在硅通孔芯片表面涂布软化的塑封胶并利用压合模具压合，于实际应用中，可以选择任一种方式，本实施例对此不作限制。
本实施例提供的硅通孔芯片的二次封装方法与第一实施例相比，提供了一种直接在硅通孔芯片上涂布软化的塑封胶并利用压合模具压合的包覆方式，且压合模具在本领域内较为常用，操作工艺简单、方便。
本申请的第四实施例涉及一种硅通孔芯片的二次封装方法，请参考图10、图11A和图11B，本实施例提供了对二次封装体的表面进行处理，以露出BGA锡球的第一种具体实现方式。
本实施例提供的硅通孔芯片的二次封装方法具体流程如图10所示。
其中，步骤1001至步骤1003与步骤301至步骤303对应大致相同，在此处不再赘述；不同之处在于：本实施例对步骤304进行了细化，具体说明如下：
步骤1004，对二次封装体的表面进行研磨，以露出BGA锡球。
由于BGA锡球2仍然埋在固化的塑封胶5里面，本实施例通过对固化的塑封胶进行研磨，使BGA锡球2露出来。
如图11A所示，于实际中，可以研磨掉部分塑封胶5与部分BGA锡球2。研磨时，使研磨设备的机械头直接对二次封装体的表面(即硅通孔芯片的反向表面12所对应的表面)施加压力，机械头通电后高速旋转从而可以打磨掉二次封装体表面的一部分，具体打磨掉的高度实际上取决于塑封胶5固化后的高 度，直至BGA锡球2露出来；为了尽量提高BGA锡球2与外界电气连接时的可靠性，可以使BGA锡球2露出的面积最大化，本实施例中，以圆形的BGA锡球(即BGA锡球的外露面为圆形)为例，一般是研磨掉BGA锡球2的一半为最佳的实现方式，因为此时BGA锡球2露出来的面积最大，也就是说，此时，BGA锡球2的外露面与硅通孔芯片的反向表面12的距离等于圆形的半径。如图11B为研磨后对多个硅通孔芯片的二次封装体进行切割得到的二次封装体的单体。
值得一提的是，本实施例记载的技术方案也可基于本申请第二或者第三实施例的基础上实施。
本实施例提供的硅通孔芯片的二次封装方法与第一实施例相比，提供了对二次封装体的表面进行处理，以露出BGA锡球的第一种具体实现方式，且研磨工艺在本领域内较为常用，操作简单方便、成本低廉。
本申请的第五实施例涉及一种硅通孔芯片的二次封装方法，本实施例是对第四实施例的改进，主要改进之处在于：请参考图12和图13，在对二次封装体的表面进行处理，以露出BGA锡球2之后，还包括：在BGA锡球上设置辅助锡球6，以进一步提高BGA锡球2与外界电气连接时的可靠性。
于实际中，如果研磨时研磨去除BGA锡球2的部分过多或者不足导致BGA锡球2外露面面积不足时、或者虽然BGA锡球2的外露面面积已经最大化了但是依然无法满足电子产品的实际设计需求(即BGA锡球2的外露面积依然不够大)时，可以采用丝网印刷工艺在BGA锡球2上设置辅助锡球6，再经过焊锡回流得到硅通孔芯片的二次封装体，其中，辅助锡球6高于二次封装体的表面，相当于增大了BGA锡球2的外露面积，从而进一步提高了BGA锡 球2与外界电气连接时的可靠性。如图13为设置辅助锡球6后切割得到的硅通孔芯片的二次封装体的单体。
值得一提的是，本实施例记载的技术方案也可基于本申请第二或者第三实施例的基础上实施。
本实施例提供的硅通孔芯片的二次封装方法与第四实施例相比，通过增加辅助锡球，进一步提高了BGA锡球与外界电气连接时的可靠性。
本申请的第六实施例涉及一种硅通孔芯片的二次封装方法。第五实施例是对第一实施例的细化，主要细化之处在于：请参考图14和图15，本实施例提供了对二次封装体的表面进行处理，以露出BGA锡球的第二种具体实现方式。
本实施例提供的硅通孔芯片的二次封装方法具体流程如图14所示。
其中，步骤1401至步骤1403与步骤301至步骤303对应大致相同，在此处不再赘述；不同之处在于：本实施例对步骤304进行了细化，并增加步骤1405，具体说明如下：
步骤1404，对二次封装体中对应于BGA锡球2的塑封胶部分进行局部去除，以露出BGA锡球2。
如图15所示，本实施例中，可以采用激光镭射、离子轰击、化学腐蚀中的其中之一或任意组合去除部分塑封胶，由于工艺特性所致，本实施例中仅去除对应于BGA锡球2的塑封胶部分，使BGA锡球2上方形成一个空腔区域21，这几种工艺可以用于去除二次封装体中不需要的材料，但是并不去除BGA锡球2。
步骤1405，在BGA锡球上设置辅助锡球6，且辅助锡球6高于或齐平 于表面。
如图16所示，由于BGA锡球2的外露面低于二次封装体的表面，所以本实施例中还需要设置辅助锡球6，填充到每个BGA锡球2对应的空腔区域21中，于实际中，可以采用丝网印刷工艺把焊锡印刷到空腔区域，或者采用落球工艺直接填充锡球到腔区域21，再经过回流工艺使得空腔区域21被完全填充；在设置辅助锡球6时，需使辅助锡球6高于或齐平于表面，以方便二次封装体与外界实现电气连接。图17为设置辅助锡球6后切割得到的硅通孔芯片的二次封装体的单体。
由上述分析可以看出，本实施例与本申请第四实施例分别提供了对二次封装体的表面进行处理，以露出所述BGA锡球的一种具体实现方式；区别之处在于：第一，在本申请第四实施例中，对二次封装体的表面进行处理时，采用的是研磨工艺，可以同时研磨掉部分塑封胶5与部分BGA锡球2，也可以仅研磨掉塑封胶5；而在本实施例中，对二次封装体的表面进行处理时，仅去除对应于BGA锡球2的塑封胶5部分，并不去除BGA锡球2；第二，在本申请第四实施例中，可以选择适用辅助锡球6；而在本实施例中，必须使用辅助锡球6。
值得一提的是，本实施例记载的技术方案也可基于本申请第二或者第三实施例的基础上实施。
本实施例提供的硅通孔芯片的二次封装方法与第一实施例相比，提供了对二次封装体的表面进行处理，以露出BGA锡球的第二种具体实现方式，且局部去除塑封胶的工艺与设置辅助锡球的工艺在本领域内较为常用，实现非常简单。
上面各种工艺方法的步骤划分，只是为了描述清楚，于实际操作中可以合并为一个步骤或者对某些步骤进行拆分，分解为多个步骤。
本申请的第七实施例涉及一种硅通孔芯片的二次封装体，硅通孔芯片的二次封装体包括：请参考图11，硅通孔芯片1与塑封胶2；硅通孔芯片1具有正向表面11、反向表面12以及多个侧向表面；硅通孔芯片1的反向表面12设置有焊锡球2；塑封胶5包覆硅通孔芯片1的反向表面12与多个侧向表面，焊锡球2外露于塑封胶5的表面。
本实施例中，硅通孔芯片1为指纹识别芯片，硅通孔芯片1的正向表面11还包括指纹识别感应区13；焊锡球包括BGA锡球2，BGA锡球2外露于塑封胶5的表面，且BGA锡球2的外露面与塑封胶5的表面齐平，从而使BGA锡球2与外界实现电气互连。
于实际中，在对硅通孔芯片的二次封装体的表面进行处理时，可以采用研磨工艺去除部分塑封胶与部分BGA锡球，从而使BGA锡球2外露于塑封胶5的表面。
优选地，BGA锡球2的外露面为圆形，BGA锡球2的外露面与硅通孔芯片1的反向表面12的距离等于圆形的半径，此时BGA锡球2外露面的面积最大，尽量提高BGA锡球2与外界电气连接的可靠性。
本实施例提供的硅通孔芯片的二次封装体与现有技术相比，通过采用释放应力膜层，当塑封胶固化后，使得硅通孔芯片的二次封装体可以与铺设有释放应力膜层的底座分离，得到无基板形式的二次封装体，在保证硅通孔芯片具有较高机械结构强度的基础上，相较于基板封装形式降低了硅通孔芯片二次封装体的厚度，有助于电子产品的薄型化和小型化设计。
本申请的第八实施例涉及一种硅通孔芯片的二次封装体，本实施例与第六实施例大致相同，主要区别之处在于：在本申请第七实施例中，焊锡球包括BGA锡球2，BGA锡球2外露于塑封胶5的表面，且BGA锡球2的外露面与塑封胶5的表面齐平；而在本实施例中，请参考图13或17，焊锡球包括BGA锡球2与辅助锡球6，辅助锡球6外露于塑封胶5的表面，且辅助锡球6的外露面高于或者齐平于塑封胶5的表面。
本实施例中，BGA锡球2连接于硅通孔芯片的反向表面12，获得二次封装体后需要对硅通孔芯片的二次封装体的表面进行处理以使BGA锡球2外露，于实际中，可以采用激光镭射、离子轰击、化学腐蚀中的其中之一或任意组合，以去除对应于BGA锡球2的塑封胶，由于工艺特性所致，采用这几种工艺时并不去除BGA锡球，所以此时BGA锡球的外露面是低于二次封装体的表面的，因此需在BGA锡球2上设置辅助锡球6，使辅助锡球6连接于BGA锡球2，并使辅助锡球6外露于塑封胶5的表面，且辅助锡球6的外露面高于或者齐平于塑封胶5的表面。
优选地，当辅助锡球6的外露面高于塑封胶5的表面时，辅助锡球6的外露面高出塑封胶5的表面的距离是50um至300um之间，能够使得辅助锡球6有足够的外露面积以确保与外界之间电性连接的可靠性的同时，使得硅通孔芯片的二次封装体的整体厚度尽可能小。
本实施例提供的硅通孔芯片的二次封装体与第七实施例相比，提供了第二种硅通孔芯片的二次封装体的具体实现方式：通过在BGA锡球上设置辅助锡球以增大BGA锡球与外界的接触面积，以提高电气连接的可靠性。
本领域的普通技术人员可以理解，上述各实施例是实现本申请的具体实 施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (17)

  1. 一种硅通孔芯片的二次封装方法，其特征在于，所述硅通孔芯片具有相对的正向表面与反向表面，所述反向表面上设置有焊球阵列封装BGA锡球，所述硅通孔芯片的二次封装方法包括：
    将至少一硅通孔芯片放置在铺设有释放应力膜层的底座上；其中，所述硅通孔芯片的正向表面接触所述释放应力膜层；
    使用软化的塑封胶包覆所述硅通孔芯片；
    待所述塑封胶固化后去除所述底座，以获取所述硅通孔芯片的二次封装体；
    对所述二次封装体的表面进行处理，以露出所述BGA锡球；其中，被处理的所述二次封装体的表面与所述硅通孔芯片的反向表面相对应。
  2. 根据权利要求1所述的硅通孔芯片的二次封装方法，其特征在于，所述使用软化的塑封胶包覆所述硅通孔芯片中，具体包括：
    将具有空腔的注塑模具按压在所述底座上，使得所述硅通孔芯片位于所述空腔中；
    向所述空腔中注入软化的所述塑封胶，使得所述塑封胶包覆所述硅通孔芯片。
  3. 根据权利要求1所述的硅通孔芯片的二次封装方法，其特征在于，所述使用软化的塑封胶包覆所述硅通孔芯片中，具体包括：
    将软化的所述塑封胶涂布在所述硅通孔芯片上；
    利用压合模具对软化的所述塑封胶与所述硅通孔芯片进行压合，使得所述塑封胶包覆所述硅通孔芯片。
  4. 根据权利要求1至3中任一项所述的硅通孔芯片的二次封装方法，其特征在于，所述对所述二次封装体的表面进行处理，以露出所述BGA锡球中，具体包括：
    对所述二次封装体的表面进行研磨，以露出所述BGA锡球。
  5. 根据权利要求4所述的硅通孔芯片的二次封装方法，其特征在于，所述BGA锡球的外露面为圆形，所述BGA锡球的外露面与所述硅通孔芯片的反向表面的距离等于所述圆形的半径。
  6. 根据权利要求4或5所述的硅通孔芯片的二次封装方法，其特征在于，在所述对所述二次封装体的表面进行处理，以露出所述BGA锡球之后，还包括：
    在所述BGA锡球上设置辅助锡球；其中，所述辅助锡求高于所述表面。
  7. 根据权利要求1至3中任一项所述的硅通孔芯片的二次封装方法，其特征在于，所述对所述二次封装体的表面进行处理，以露出所述BGA锡球中，具体包括：
    对所述二次封装体中对应于所述BGA锡球的塑封胶部分进行局部去除，以露出所述BGA锡球；
    在所述对所述二次封装体的表面进行处理，以露出所述BGA锡球之后，还包括：
    在所述BGA锡球上设置辅助锡球，且所述辅助锡球高于或齐平于所述表面。
  8. 根据权利要求7所述的硅通孔芯片的二次封装方法，其特征在于，所述局部去除的方式包括激光镭射、离子轰击、化学腐蚀中的其中之一或任意组合。
  9. 根据权利要求1至8中任一项所述的硅通孔芯片的二次封装方法，其特征在于，所述硅通孔芯片的数目为多个；在所述对所述二次封装体的表面进行处理，以露出所述BGA锡球之后，还包括：
    对所述二次封装体进行切割，以获取单个所述硅通孔芯片的二次封装体。
  10. 一种硅通孔芯片的二次封装体，其特征在于，包括：硅通孔芯片与塑封胶；
    所述硅通孔芯片具有正向表面、反向表面以及多个侧向表面；所述硅通孔芯片的反向表面设置有焊锡球；
    所述塑封胶包覆所述硅通孔芯片的反向表面与多个侧向表面，所述焊锡球外露于所述塑封胶的表面。
  11. 根据权利要求10所述的硅通孔芯片的二次封装体，其特征在于，所述焊锡球包括BGA锡球；
    所述BGA锡球外露于所述塑封胶的表面，且所述BGA锡球的外露面与所述塑封胶的表面齐平。
  12. 根据权利要求11所述的硅通孔芯片的二次封装体，其特征在于，所述BGA锡球的外露面为圆形，所述BGA锡球的外露面与所述硅通孔芯片的反向表面的距离等于所述圆形的半径。
  13. 根据权利要求10所述的硅通孔芯片的二次封装体，其特征在于，所述焊锡球包括BGA锡球与辅助锡球，所述BGA锡球连接于所述硅通孔芯片的反向表面，所述辅助锡球连接于所述BGA锡球；
    所述辅助锡球外露于所述塑封胶的表面，且所述辅助锡球的外露面高于或者齐平于所述塑封胶的表面。
  14. 根据权利要求13所述的硅通孔芯片的二次封装体，其特征在于，当所述辅助锡球的外露面高于所述塑封胶的表面时，所述辅助锡球的外露面高出所述塑封胶的表面的距离为50um至300um之间。
  15. 根据权利要求10至14中任一项所述的硅通孔芯片的二次封装体，其特征在于，所述硅通孔芯片为指纹识别芯片，所述硅通孔芯片的正向表面包括指纹识别感应区。
  16. 根据权利要求15所述的硅通孔芯片的二次封装体，其特征在于，所述硅通孔芯片的正向表面设置有保护层，且所述保护层覆盖所述指纹识别感应区。
  17. 根据权利要求16所述的硅通孔芯片的二次封装体，其特征在于，所述保护层的厚度大于或等于5微米且小于或等于50微米。
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