CN207038516U - 硅通孔芯片的二次封装体 - Google Patents

硅通孔芯片的二次封装体 Download PDF

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CN207038516U
CN207038516U CN201720925097.6U CN201720925097U CN207038516U CN 207038516 U CN207038516 U CN 207038516U CN 201720925097 U CN201720925097 U CN 201720925097U CN 207038516 U CN207038516 U CN 207038516U
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silicon hole
hole chip
tin ball
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吴宝全
龙卫
柳玉平
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Shenzhen Goodix Technology Co Ltd
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Shenzhen Huiding Technology Co Ltd
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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Abstract

本实用新型涉及半导体封装技术领域,公开了一种硅通孔芯片的二次封装体。本实用新型实施方式中,硅通孔芯片的二次封装体包括:硅通孔芯片与塑封胶;硅通孔芯片具有正向表面、反向表面以及多个侧向表面;硅通孔芯片的反向表面设置有焊锡球;塑封胶包覆硅通孔芯片的反向表面与多个侧向表面,焊锡球外露于所述塑封胶的表面。本实用新型实施方式中,硅通孔芯片的二次封装体无需使用基板作为载体,在保证硅通孔芯片具有较高机械结构强度的基础上,降低了二次封装体的厚度,有利于电子产品的薄型化和小型化设计。

Description

硅通孔芯片的二次封装体
技术领域
本实用新型涉及半导体封装技术领域,特别涉及一种硅通孔芯片的二次封装体。
背景技术
带有指纹识别功能的电子产品随着整机设计的需要,逐步迈向小型化和薄型化方向发展,因此,对指纹识别芯片的厚度也提出了越来越高的要求,同时,在满足芯片封装尺寸的要求下,还需要封装体具有良好的机械结构强度以及较小的低翘曲度。
然而,发明人在实现本实用新型的过程中,发现在现有的指纹识别芯片的封装方案中,至少存在以下技术问题:不论是采用trench挖槽工艺进行的wire bond打线封装还是TSV(Through Silicon Vias)硅通孔封装,均需要使用基板101作为载体进行二次封装(如图1所示为硅通孔芯片的剖面示意图,如图2所示为采用基板101进行二次封装后的剖面示意图),在使用基板作为载体进行封装后,整个封装体的厚度一般会超出0.5mm,单个封装体的翘曲度也会接近50um,这样的封装体尺寸是无法满足电子产品日趋小型化和薄型化的设计需求的。
实用新型内容
本实用新型的目的在于提供一种硅通孔芯片的二次封装体,无需使用基板作为载体,因此,在保证硅通孔芯片具有较高机械结构强度的基础上,降低了二次封装体的厚度,有利于电子产品的薄型化和小型化设计。
为解决上述技术问题,本实用新型的实施方式提供了一种硅通孔芯片的二次封装体,包括:硅通孔芯片与塑封胶;硅通孔芯片具有正向表面、反向表面以及多个侧向表面;硅通孔芯片的反向表面设置有焊锡球;塑封胶包覆硅通孔芯片的反向表面与多个侧向表面,焊锡球外露于塑封胶的表面。
本实用新型实施方式相对于现有技术而言,硅通孔芯片的二次封装体无需采用基板作为载体,在保证硅通孔芯片具有较高机械结构强度的基础上,相较于基板封装形式降低了硅通孔芯片二次封装体的厚度,有助于电子产品的薄型化和小型化设计。
另外,焊锡球包括焊球阵列封装BGA锡球;BGA锡球外露于塑封胶的表面,且BGA锡球的外露面与塑封胶的表面齐平,在确保BGA锡球与外界实现电性连接的同时,尽量不增加硅通孔芯片二次封装体的厚度。
另外,BGA锡球的外露面为圆形,BGA锡球的外露面与硅通孔芯片的反向表面的距离等于圆形的半径,此时BGA锡球的外露面的面积最大,提高了BGA锡球与外界电气互连的可靠性。
另外,硅通孔芯片的二次封装体包括BGA锡球与辅助锡球,BGA锡球连接于硅通孔芯片的反向表面,辅助锡球连接于BGA锡球;辅助锡球外露于塑封胶的表面,且辅助锡球的外露面高于或者齐平于塑封胶的表面。设置辅助锡球相当于增大了BGA锡球的外露面积,以确保BGA锡球与外界电气互连的可靠性。
另外,当辅助锡球的外露面高于塑封胶的表面时,辅助锡球的外露面高出塑封胶的表面的距离是50um至300um之间,能够使得辅助锡球有足够的外露面积以确保与外界之间电性连接的可靠性的同时,使得硅通孔芯片的二次封装体的整体厚度尽可能小。
另外,硅通孔芯片为指纹识别芯片,硅通孔芯片的正向表面包括指纹识别感应区。
另外,硅通孔芯片的正向表面设置有保护层,且所述保护层覆盖所述指纹识别感应区。
另外,保护层的厚度大于或等于5微米且小于或等于50微米。
附图说明
图1是根据现有技术中的硅通孔芯片的剖面示意图;
图2是根据现有技术中的采用基板封装的硅通孔芯片的二次封装体的剖面示意图;
图3是根据本实用新型第一实施方式的硅通孔芯片的二次封装体的剖面示意图;
图4是根据本实用新型第二实施方式中的硅通孔芯片的二次封装体的第一种具体实现方式的剖面示意图;
图5是根据本实用新型第二实施方式中的硅通孔芯片的二次封装体的第二种具体实现方式的剖面示意图。
具体实施方式
为使本实用新型的目的、技术方案和优点更加清楚,下面将结合附图对本实用新型的各实施方式进行详细的阐述。然而,本领域的普通技术人员可以理解,在本实用新型各实施方式中,为了使读者更好地理解本申请而提出了许多技术细节。但是,即使没有这些技术细节和基于以下各实施方式的种种变化和修改,也可以实现本申请各权利要求所要求保护的技术方案。
本实用新型的第一实施方式涉及一种硅通孔芯片的二次封装体,如图3所示,硅通孔芯片的二次封装体包括:硅通孔芯片1与塑封胶4;硅通孔芯片1具有正向表面11、反向表面12以及多个侧向表面;硅通孔芯片1的反向表面12设置有焊锡球2;塑封胶4包覆硅通孔芯片1的反向表面12与多个侧向表面,焊锡球2外露于塑封胶4的表面。
本实施方式中,硅通孔芯片1为指纹识别芯片,硅通孔芯片1的正向表面11还包括指纹识别感应区13;焊锡球包括BGA锡球2,BGA锡球2外露于塑封胶4的表面,且BGA锡球2的外露面与塑封胶4的表面齐平,从而使BGA锡球2与外界实现电气互连。
较佳的,正向表面11上还设置有保护层(图未示),保护层覆盖指纹识别感应区13,以对指纹识别感应区13进行保护。其中,保护层的厚度可以是大于或等于5微米且小于或等于50微米,例如,保护层的厚度可以是5微米、或者25微米、或者50微米;该保护层的材料可以是有机胶体,且可以是以涂覆方式设置在正向表面11上。然,本实施方式对保护层的厚度、材料以及设置方式,不作任何限制。
需要说明的是,一般而言,在对硅通孔芯片的二次封装体的表面进行处理时,可以采用研磨工艺去除部分塑封胶4与部分BGA锡球2,从而使BGA锡球2外露于塑封胶4的表面;因此,优选地,为了尽量提高BGA锡球2与外界电气连接时的可靠性,可以使BGA锡球2露出的面积最大化,本实施方式中,以圆形的BGA锡球2(即BGA锡球2的外露面为圆形)为例,一般是研磨掉BGA锡球2的一半为最佳的实现方式,因为此时BGA锡球2露出来的面积最大,也就是说,此时,BGA锡球2的外露面与硅通孔芯片的反向表面12的距离等于圆形的半径。然而,在有些情况下,也可以仅去除塑封胶4,并不去除BGA锡球2,只需使BGA锡球2外露即可。
本实施方式提供的硅通孔芯片的二次封装体与现有技术相比,硅通孔芯片的二次封装体为无基板形式的二次封装体,在保证硅通孔芯片具有较高机械结构强度的基础上,相较于基板封装形式降低了硅通孔芯片二次封装体的厚度,有助于电子产品的薄型化和小型化设计。
本发明的第二实施方式涉及一种硅通孔芯片的二次封装体,本实施方式与第一实施方式大致相同,主要区别之处在于:在本发明第一实施方式中,焊锡球包括BGA锡球2,BGA锡球2外露于塑封胶4的表面,且BGA锡球2的外露面与塑封胶4的表面齐平;而在本实施方式中,请参考图4和图5,焊锡球包括BGA锡球2与辅助锡球5,辅助锡球5外露于塑封胶4的表面,且辅助锡球5的外露面高于或者齐平于塑封胶4的表面。
本实施方式中,BGA锡球2连接于硅通孔芯片的反向表面12,辅助锡球5连接于BGA锡球2,可以有两种具体实现方式:
第一种具体实现方式,如图4所示,获得硅通孔芯片的二次封装体后,由于BGA锡球2是被包覆在塑封胶中,因此需对二次封装体的表面(即硅通孔芯片的反向表面12所对应的表面)进行处理,以使BGA锡球2外露实现与外界电气互连。一般来说,可以采用研磨工艺去除部分塑封胶部分与部分BGA锡球,如果研磨时研磨去除BGA锡球2的部分过多或者不足导致BGA锡球2外露面面积不足时、或者虽然BGA锡球2的外露面面积已经最大化了但是依然无法满足电子产品的实际设计需求(即BGA锡球2的外露面积依然不够大)时,可以采用丝网印刷工艺在BGA锡球2上设置辅助锡球5,再经过焊锡回流得到硅通孔芯片1的二次封装体,其中,辅助锡球5高于二次封装体的表面,相当于增大了BGA锡球2的外露面积,进一步提高了BGA锡球2与外界电气连接时的可靠性。
第二种具体实现方式,如图5所示,还可以采用激光镭射、离子轰击、化学腐蚀中的其中之一或任意组合,以去除对应于BGA锡球2的塑封胶部分,使BGA锡球2上方形成一个空腔区域,这几种工艺可以用于去除二次封装体中不需要的材料,但是并不去除BGA锡球2,所以此时BGA锡球2的外露面是低于二次封装体的表面的,因此需在BGA锡球2上再设置辅助锡球5,填充到每个BGA锡球2对应的空腔区域中,可以采用丝网印刷工艺把焊锡印刷到空腔区域,或者采用落球工艺直接填充锡球到腔区域,再经过回流工艺使得空腔区域被完全填充,使辅助锡球5连接于BGA锡球2;在设置辅助锡球5时,需使辅助锡球5高于或齐平于二次封装体的表面,以方便二次封装体通过辅助锡球5与外界实现电气连接。
优选地,本实施方式中,当辅助锡球5的外露面高于塑封胶4的表面时,辅助锡球5的外露面高出塑封胶4的表面的距离是50um至300um之间,能够使得辅助锡球5有足够的外露面积以确保与外界之间电性连接的可靠性的同时,使得硅通孔芯片的二次封装体的整体厚度尽可能小。
本实施方式提供的硅通孔芯片的二次封装体与第一实施方式相比,提供了第二种硅通孔芯片的二次封装体的两种具体实现方式:通过在BGA锡球上设置辅助锡球以增大BGA锡球与外界的接触面积,以提高电气连接的可靠性。
本领域的普通技术人员可以理解,上述各实施方式是实现本实用新型的具体实施方式,而在实际应用中,可以在形式上和细节上对其作各种改变,而不偏离本实用新型的精神和范围。

Claims (8)

1.一种硅通孔芯片的二次封装体,其特征在于,包括:硅通孔芯片与塑封胶;
所述硅通孔芯片具有正向表面、反向表面以及多个侧向表面;所述硅通孔芯片的反向表面设置有焊锡球;
所述塑封胶包覆所述硅通孔芯片的反向表面与多个侧向表面,所述焊锡球外露于所述塑封胶的表面。
2.根据权利要求1所述的硅通孔芯片的二次封装体,其特征在于,所述焊锡球包括焊球阵列封装BGA锡球;
所述BGA锡球外露于所述塑封胶的表面,且所述BGA锡球的外露面与所述塑封胶的表面齐平。
3.根据权利要求2所述的硅通孔芯片的二次封装体,其特征在于,所述BGA锡球的外露面为圆形,所述BGA锡球的外露面与所述硅通孔芯片的反向表面的距离等于所述圆形的半径。
4.根据权利要求1所述的硅通孔芯片的二次封装体,其特征在于,所述硅通孔芯片的二次封装体包括BGA锡球与辅助锡球,所述BGA锡球连接于所述硅通孔芯片的反向表面,所述辅助锡球连接于所述BGA锡球;
所述辅助锡球外露于所述塑封胶的表面,且所述辅助锡球的外露面高于或者齐平于所述塑封胶的表面。
5.根据权利要求4所述的硅通孔芯片的二次封装体,其特征在于,当所述辅助锡球的外露面高于所述塑封胶的表面时,所述辅助锡球的外露面高出所述塑封胶的表面的距离是50um至300um之间。
6.根据权利要求1至5中任一项所述的硅通孔芯片的二次封装体,其特征在于,所述硅通孔芯片为指纹识别芯片,所述硅通孔芯片的正向表面包括指纹识别感应区。
7.根据权利要求6所述的硅通孔芯片的二次封装体,其特征在于,所述硅通孔芯片的正向表面设置有保护层,且所述保护层覆盖所述指纹识别感应区。
8.根据权利要求7所述的硅通孔芯片的二次封装体,其特征在于,所述保护层的厚度大于或等于5微米且小于或等于50微米。
CN201720925097.6U 2017-02-13 2017-07-27 硅通孔芯片的二次封装体 Ceased CN207038516U (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109065459A (zh) * 2018-07-27 2018-12-21 大连德豪光电科技有限公司 焊盘的制作方法
US11183414B2 (en) 2017-02-13 2021-11-23 Shenzhen GOODIX Technology Co., Ltd. Secondary packaging method and secondary package of through silicon via chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11183414B2 (en) 2017-02-13 2021-11-23 Shenzhen GOODIX Technology Co., Ltd. Secondary packaging method and secondary package of through silicon via chip
CN109065459A (zh) * 2018-07-27 2018-12-21 大连德豪光电科技有限公司 焊盘的制作方法

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