CN107240568A - 晶片载置装置 - Google Patents
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- 239000000919 ceramic Substances 0.000 claims abstract description 27
- 238000010438 heat treatment Methods 0.000 claims abstract description 27
- 239000011159 matrix material Substances 0.000 claims abstract description 25
- 229910017398 Au—Ni Inorganic materials 0.000 claims description 22
- 238000000137 annealing Methods 0.000 claims description 10
- 229910001182 Mo alloy Inorganic materials 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 20
- 238000000034 method Methods 0.000 description 18
- 239000000463 material Substances 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000009832 plasma treatment Methods 0.000 description 4
- 229910000833 kovar Inorganic materials 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000001934 delay Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Abstract
本发明提供一种晶片载置装置。该晶片载置装置(30)具备:具有晶片载置面的陶瓷基体(32)、埋设于陶瓷基体(32)的加热电极(34),以及从陶瓷基体(32)的与晶片载置面相反一侧的面电连接于加热电极(34)的Cu制的供电杆(36、37)。供电杆(36)优选在螺纹结合之前的状态下,将一端作为固定端,另一端作为自由端,求出在从固定端起向着自由端为50mm的位置施加的应力与该位置的应变的关系时,与应变1mm对应的应力落入5~10N的范围内。
Description
技术领域
本发明涉及晶片载置装置。
背景技术
以往,作为这种晶片载置装置,已知例如专利文献1中公开的装置。如图4所示,该晶片载置装置具备:陶瓷基体102、埋设于该陶瓷基体102的加热电极104、以及Ni制的供电杆108,该供电杆108从陶瓷基体102的与晶片载置面相反一侧的面电连接于加热电极104的埋设端子106。在加热电极104的埋设端子106与供电杆108之间设有应力缓和层110。应力缓和层110通过焊接层112与加热电极104的埋设端子106接合,并通过焊接层114与供电杆108接合。
现有技术文献
专利文献
专利文献1:日本专利5029257号公报
发明内容
发明所要解决的问题
然而,上述晶片载置装置中,供电杆108是Ni制的,因此,在对加热电极104供给电流时,在供电杆108的周围产生磁场,有可能对半导体制造工艺产生不良影响。
本发明为了解决这样的课题而完成,其主要目的在于,抑制在供电杆的周围产生磁场。
用于解决问题的方法
本发明的晶片载置装置具备:
具有晶片载置面的陶瓷基体、
埋设于前述陶瓷基体的静电电极、加热电极和高频电极中的至少1个电极、以及
从前述陶瓷基体的与晶片载置面相反一侧的面电连接于前述电极的Cu制的供电杆。
在该晶片载置装置中,介由非磁性材料的Cu制的供电杆向电极供给电力,因此能够抑制在供电杆周围产生磁场。由此,能够防止在半导体制造工艺中发生晶片中仅有供电杆周围的处理结果发生变化这样的状况。
本发明的晶片载置装置中,对于前述供电杆,优选将一端作为固定端,另一端作为自由端,并求出在从前述固定端起向着前述自由端为50mm的位置施加的应力与该位置的应变的关系时,与前述应变1mm对应的应力落入5~10N的范围。供电杆的一端连接于电极,另一端固定于固定用器具。将供电杆的另一端固定于固定用器具时,虽然在供电杆承受负荷,但由于供电杆具有上述的应力与应变的关系,因此能够自行吸收该负荷。因此,供电杆与电极的连接部位不会承受大的负荷。需说明的是,上述的应力与应变的关系可以通过例如对供电杆进行退火来获得。
本发明的晶片载置装置具备连接端子,所述连接端子介由Au-Ni焊接层接合于前述电极,或者介由Au-Ni焊接层接合于耐热性应力缓和层的一面,所述耐热性应力缓和层的另一面与前述电极接合;前述陶瓷基体为AlN制,前述电极和前述连接端子为Mo制或Mo合金制,前述供电杆可以紧固于前述连接端子。耐热性应力缓和层是指耐热温度为1000℃以上的应力缓和层。如果这样设计,则由于任一构成要素的耐热温度都高,因此即使在半导体制造工艺的温度高的情况下也能够使用本发明的晶片载置装置。需说明的是,即使在Mo制或Mo合金制的连接端子的周围产生了磁场,由于连接端子的长度比供电杆短,因此其影响也小。
另外,还可以考虑省略连接端子,通过Au-Ni焊接层将电极与供电杆或者应力缓和层与供电杆直接接合。但是,Au-Ni焊接层是将Au-Ni焊料以高的接合温度(约1000℃)进行处理而形成的。此时,Cu与Au在Cu制的供电杆与Au-Ni焊料的界面接触,由于Au/Cu混合层的熔点低,因此存在供电杆在Au-Ni焊料的接合温度下熔化的担忧。因此,使用由没有这样的担忧的材质形成的连接端子。此外,如果用不含Au的焊料来接合,则也许能够将Cu制的供电杆接合于电极或应力缓和层。但是,这样的焊料由于大多情况下接合温度低,因此在高温下使用晶片载置装置时,存在焊料熔出的担忧。因此,使用没有这样的担忧的Au-Ni焊料。
具备连接端子的本发明的晶片载置装置中,前述供电杆和前述连接端子的一方具有阳螺纹,另一方具有阴螺纹,可以通过将双方的螺纹进行螺纹结合而使之紧固。如果这样设计,则能够容易地进行供电杆与连接端子的拆装。
附图说明
图1是本实施方式的等离子处理装置10的构成图。
图2是图1的部分放大图。
图3是表示对Cu制的供电杆施加的应力与应变的关系的图表。
图4是以往的晶片载置装置的构成图。
符号说明
10:等离子处理装置;12:处理容器;14:圆孔;16:排气管;20:喷头;22:绝缘部件;24:气体导入管;26:气体喷射孔;30:晶片载置装置;31:晶片载置台;32:陶瓷基体;32a:晶片载置面;33:静电电极;34:加热电极;34a:一端;34b:另一端;35:供电杆;36:供电杆;36a:阴螺纹;37:供电杆;38:中空轴;38a、38b:凸缘;39:杆固定器;40:凹部;41:埋设端子;42:圆筒环;43:应力缓和层;44:连接端子;44a:阳螺纹;45、46:焊接层;60:直流电源;62:加热器电源;102:陶瓷基体;104:加热电极;106:埋设端子;108:供电杆;110:应力缓和层;112、114:焊接层。
具体实施方式
以下,边参照附图边对本发明的优选的实施方式进行说明。图1是等离子处理装置10的构成图,图2是图1的部分放大图。
如图1所示,等离子处理装置10具备处理容器12、喷头20、以及晶片载置装置30。
处理容器12是由铝合金等形成为盒状的容器。该处理容器12在底面的大致中央处具有圆孔14。此外,处理容器12在底面具有排气管16。排气管16在中途具备未图示的压力调节阀、真空泵等,能够将处理容器12的内部调整为所期望的压力。处理容器12的顶部是开口的。
喷头20以堵住处理容器12顶部的开口的方式安装。在处理容器12顶部的开口边缘与喷头20之间设有绝缘部件22。由喷头20堵住了开口的处理容器12的内部构成为确保气密性。喷头20使得将从气体导入管24导入的气体由多个气体喷射孔26向载置于晶片载置台31的晶片W喷射。本实施方式中,喷头20与未图示的用于产生等离子体的高频电源连接。因此,喷头20作为用于产生等离子体的电极而发挥作用。
晶片载置装置30具备晶片载置台31和中空轴38。
晶片载置台31是在圆板状的陶瓷基体32中埋设有静电电极33和加热电极34的晶片载置台。本实施方式中,陶瓷基体32为AlN陶瓷制。陶瓷基体32的一面成为用于载置晶片W的晶片载置面32a。
静电电极33为Mo制,埋设于晶片载置面32a与加热电极34之间。静电电极33介由从陶瓷基体32中与晶片载置面32a相反一侧的面(背面)插入的供电杆35,连接至静电卡盘用的直流电源60。静电电极33由直流电源60供给电力时,将晶片W通过静电引力而吸附保持于晶片载置面32a。该静电电极33兼用作用于产生等离子体的电极(与喷头20成对的电极)。
加热电极34为Mo制,以遍及整个圆板状的陶瓷基体32的方式,按照一笔画的要领从一端34a配线至另一端34b。加热电极34的一端34a和另一端34b分别与供电杆36、37连接。在2个供电杆36、37之间连接有加热器电源62。加热电极34由加热器电源62供给电力时,对保持于晶片载置面32a的晶片W进行加热。
中空轴38为陶瓷制,在两端的开口的周围设有凸缘38a、38b。中空轴38介由一端的凸缘38a通过固相接合与陶瓷基体32的背面气密地接合。此外,中空轴38介由另一端的凸缘38b气密地安装在设于处理容器12底面的圆孔14的周围。因此,中空轴38的内部与处理容器12的内部成为完全隔断的状态。在中空轴38的凸缘38b的背面安装有杆固定器39。杆固定器39是通过未图示的紧固机构将贯通的供电杆35、36、37固定的部件。
接下来,对将供电杆35连接于静电电极33的结构、将供电杆36、37连接于加热电极34的结构进行说明。这些连接结构是共通的,因此,以下使用图2对将供电杆36连接于加热电极34的一端34a的结构进行说明。
在陶瓷基体32的背面形成有朝加热电极34的一端34a凹陷的形状的凹部40。在凹部40的内周面设有螺纹。在凹部40的底面露出与加热电极34的一端34a连接的埋设端子41的端面。埋设端子41例如由与加热电极34相同的材质形成,在这里是由Mo形成的。凹部40与在外周面设有螺纹的金属制的圆筒环42螺纹结合。圆筒环42是增强凹部40的内周面的部件,在本实施方式中是Ni制的。在圆筒环42的内侧,从凹部40的底面侧起依次配置有应力缓和层43和连接端子44。应力缓和层43是用于缓和在埋设端子41与连接端子44之间产生的应力的层,具体而言,是用于缓和由埋设端子41和连接端子44的热膨胀差引起的应力的层。本实施方式中,应力缓和层43为可伐合金(FeNiCo系合金)制,连接端子44为Mo制。埋设端子41与应力缓和层43通过焊接层45而接合,应力缓和层43与连接端子44通过焊接层46而接合。考虑到耐热性,焊接层45、46使用Au-Ni焊料形成。本实施方式的晶片载置装置30的使用温度的上限为700℃。Au-Ni接合温度约为1000℃,因此,焊接层45、46甚至连使用温度的上限都能够耐受。连接端子44在与接合于应力缓和层43的端面相反一侧的端面具有阳螺纹44a。该阳螺纹44a与设于Cu制的供电杆36前端的阴螺纹36a螺纹结合。对于供电杆36,在螺纹结合之前的状态下,将一端作为固定端,另一端(阴螺纹36a侧)作为自由端,求出在从固定端起向着自由端为50mm的位置施加的应力与该位置的应变(位移量)的关系时,与应变1mm对应的应力落入5~10N的范围。
接下来,对于将供电杆36连接于加热电极34的一端34a的步骤进行说明。首先,在凹部40的底面露出的埋设端子41的端面依次配置Au-Ni焊料、应力缓和层43、Au-Ni焊料、连接端子44。在该状态下加热至Au-Ni接合温度(约1000℃),然后降温,从而埋设端子41与应力缓和层43通过焊接层45而接合,且应力缓和层43与连接端子44通过焊接层46而接合。在图2中,圆筒环42的内周与应力缓和层43之间存在空隙,但实际上,熔融的Au-Ni焊料也会流入该间隙中,然后发生固化而形成焊接层。如上所述,由于接合温度是约为1000℃这样的高温,因此,连接端子44由可耐受该温度的材质(本实施方式中为Mo)形成。
接着,将供电杆36的阴螺纹36a拧入连接端子44的阳螺纹44a,但在此之前,对供电杆36实施退火处理。图3中,针对直径4mm的Cu制的供电杆,将一端作为固定端,另一端作为自由端,并对于表示在从固定端起向着自由端为50mm的位置施加的应力与该位置的应变的关系的曲线图,按照经过退火处理时和未经退火处理时进行比较。关于测定,分别进行2次。退火处理在下述条件下进行:真空气氛中,在最高温度500℃保持1小时。需说明的是,该退火处理与退火(焼き鈍し)意义相同。从图3可知,对于未经退火处理的供电杆,与应变1mm对应的应力为25~30N,而对于经过退火处理的供电杆为5~10N(更详细而言,为6~8N),与未经退火处理的供电杆相比具有柔软性。将这样的经过退火处理的供电杆36的阴螺纹36a与连接端子44的阳螺纹44a螺纹结合。
与连接端子44一体化了的供电杆36由内置于图1所示的杆固定器39的紧固机构进行固定。如果供电杆36是未经退火处理的过硬的状态,则在将供电杆36组装于杆固定器39时,有时供电杆36所承受的负荷会直接施加到接合部位(焊接层),因此接合有时会脱离。与此相对,如果供电杆36是经过退火处理的柔软的状态,则在将供电杆36组装于杆固定器39时,即使供电杆36承受了负荷,也能够通过自身的柔软性将该负荷吸收。因此,接合部位(焊接层)不会承受大的负荷,接合不会脱离。
另外,还可以考虑省略连接端子44而直接通过焊接层将应力缓和层43与Cu制的供电杆(没有阴螺纹)接合。焊接层是通过对Au-Ni焊料以高的接合温度(约1000℃)进行处理而形成的。此时,Cu与Au在Cu制的供电杆36与Au-Ni焊料的界面接触,但由于Au/Cu混合层的熔点低,因此存在供电杆36在Au-Ni焊料的接合温度下熔化的担忧。因此,使由没有这样的担忧的材质形成的连接端子44介于应力缓和层43与供电杆36之间。此外,如果通过非Au-Ni焊料的不含Au的焊料接合,则也许能够使应力缓和层43与Cu制的供电杆36接合。但是,这样的焊料的接合温度低,因此存在在使用温度的上限附近使用晶片载置装置30时焊料熔出的担忧。因此,使用没有这样的担忧的Au-Ni焊料。
根据以上说明的本实施方式的晶片载置装置30,由于介由非磁性材料的Cu制的供电杆35~37对静电电极33、加热电极34供给电力,因此与使用Ni制的供电杆的情况相比,能够抑制磁场的产生。由此,能够防止在半导体制造工艺中发生晶片W中仅有供电杆35~37周围的等离子处理结果发生变化的状况。
此外,对于Cu制的供电杆35~37,在求出上述应力与应变的关系时,与应变1mm对应的应力落入5~10N的范围,因此即使在将供电杆35~37的自由端侧组装于杆固定器39时供电杆35~37承受了负荷,也能够通过自身的柔软性将该负荷吸收。因此,接合部位(焊接层)不会承受大的负荷,接合不会脱离。
进而,晶片载置装置30中,陶瓷基体32为AlN制,静电电极33、加热电极34为Mo制,应力缓和层43为可伐合金制,连接端子44为Mo制,供电杆36为Cu制,耐热温度均为1000℃以上。此外,焊接层45、46的耐热温度与它们也是同等程度。因此,即使在半导体制造工艺的温度高的情况下也能够使用本实施方式的晶片载置装置30。
进而,供电杆36与连接端子44通过将螺纹进行螺纹结合而结合,因此能够容易地进行供电杆36与连接端子44的拆装。
需说明的是,本发明不受上述实施方式的任何限定,不言而喻,只要属于本发明的技术范围,就可以通过各种方式实施。
例如,在上述实施方式中设置了应力缓和层43,但埋设端子41和连接端子44均为Mo制,两者之间几乎不会发生热膨胀差所引起的应力,因此可以省略应力缓和层43。即,可以介由焊接层45将连接端子44接合于埋设端子41。这样也能够获得与上述实施方式同样的效果。此外,应力缓和层43为磁性体的情况下,通过省略应力缓和层43,能够进一步抑制磁场的产生。
上述实施方式中,将陶瓷基体32设为AlN制,将静电电极33、加热电极34设为Mo制,将应力缓和层43设为可伐合金制,将连接端子44设为Mo制,焊接层45、46设为Au-Ni焊料制,但也可以采用其他材料。
上述实施方式中采用了Mo制的连接端子44,但也可以将连接端子44的材质变更为非磁性体(例如非磁性的不锈钢等)。如果这样设计,则能够进一步抑制磁场的产生。
上述实施方式中,作为加热电极34例示了1个区的加热电极,其用一条连续的配线在整个圆形的晶片载置面上进行了布线,但也可以将整个晶片载置面划分为多个区,在每个区设置加热电极。这种情况下,虽然供电杆的数量根据加热电极的数量而增加,但与上述实施方式同样地操作,将供电杆连接于加热电极即可。
上述实施方式中,通过螺纹将连接端子44与供电杆36螺纹结合来紧固,但也可以将两者压接而紧固,还可以通过将一方压入另一方或进行铆接而紧固。
本申请以2016年3月28日申请的日本专利申请第2016-063623号为优先权主张的基础,其全部内容通过引用而包含于本说明书中。
Claims (5)
1.一种晶片载置装置,其具备:
具有晶片载置面的陶瓷基体,
埋设于所述陶瓷基体的静电电极、加热电极和高频电极中的至少1个电极,以及
从所述陶瓷基体的与晶片载置面相反一侧的面电连接于所述电极的Cu制的供电杆。
2.根据权利要求1所述的晶片载置装置,
对于所述供电杆,将一端作为固定端,另一端作为自由端,求出在从所述固定端起向着所述自由端为50mm的位置施加的应力与该位置的应变的关系时,与所述应变1mm对应的应力落入5~10N的范围。
3.根据权利要求1或2所述的晶片载置装置,所述供电杆经过退火。
4.根据权利要求1~3中任一项所述的晶片载置装置,其具备连接端子,所述连接端子介由Au-Ni焊接层接合于所述电极,或介由Au-Ni焊接层接合于耐热性应力缓和层的一面,该耐热性应力缓和层的另一面与所述电极接合,
所述陶瓷基体为AlN制,
所述电极和所述连接端子为Mo制或Mo合金制,
所述供电杆紧固于所述连接端子。
5.根据权利要求4所述的晶片载置装置,所述供电杆和所述连接端子中,一方具有阳螺纹,另一方具有阴螺纹,通过将双方的螺纹进行螺纹结合来紧固。
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KR20170113277A (ko) | 2017-10-12 |
KR102282781B1 (ko) | 2021-07-29 |
US20170278732A1 (en) | 2017-09-28 |
TW201803008A (zh) | 2018-01-16 |
CN107240568B (zh) | 2021-09-07 |
JP6560150B2 (ja) | 2019-08-14 |
JP2017183329A (ja) | 2017-10-05 |
TWI701761B (zh) | 2020-08-11 |
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