CN107204299B - 半导体装置的制造方法及半导体装置 - Google Patents
半导体装置的制造方法及半导体装置 Download PDFInfo
- Publication number
- CN107204299B CN107204299B CN201710133174.9A CN201710133174A CN107204299B CN 107204299 B CN107204299 B CN 107204299B CN 201710133174 A CN201710133174 A CN 201710133174A CN 107204299 B CN107204299 B CN 107204299B
- Authority
- CN
- China
- Prior art keywords
- lead
- wiring part
- recess portion
- semiconductor device
- electronic pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016053321A JP2017168703A (ja) | 2016-03-17 | 2016-03-17 | 半導体装置の製造方法および半導体装置 |
JP2016-053321 | 2016-03-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107204299A CN107204299A (zh) | 2017-09-26 |
CN107204299B true CN107204299B (zh) | 2019-10-25 |
Family
ID=59904888
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710133174.9A Active CN107204299B (zh) | 2016-03-17 | 2017-03-08 | 半导体装置的制造方法及半导体装置 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2017168703A (ja) |
CN (1) | CN107204299B (ja) |
TW (1) | TWI646608B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109841590A (zh) * | 2017-11-28 | 2019-06-04 | 恩智浦美国有限公司 | 用于具有j引线和鸥翼引线的集成电路装置的引线框 |
CN109904136A (zh) * | 2017-12-07 | 2019-06-18 | 恩智浦美国有限公司 | 用于具有j引线和鸥翼引线的集成电路装置的引线框 |
US10566713B2 (en) * | 2018-01-09 | 2020-02-18 | Semiconductor Components Industries, Llc | Press-fit power module and related methods |
CN110707063A (zh) * | 2018-07-10 | 2020-01-17 | 恩智浦美国有限公司 | 具有可弯曲引线的引线框架 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6867072B1 (en) * | 2004-01-07 | 2005-03-15 | Freescale Semiconductor, Inc. | Flipchip QFN package and method therefor |
CN201392831Y (zh) * | 2009-04-03 | 2010-01-27 | 宁波康强电子股份有限公司 | 用于制造引线框架的铜带 |
CN201523004U (zh) * | 2009-10-11 | 2010-07-07 | 天水华天科技股份有限公司 | 一种小载体四面扁平无引脚封装件 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7018378A (ja) * | 1970-12-17 | 1972-06-20 | ||
JPS5593245A (en) * | 1979-01-05 | 1980-07-15 | Nec Corp | Lead frame |
JP2670569B2 (ja) * | 1992-07-27 | 1997-10-29 | 株式会社三井ハイテック | 半導体装置及びそれに用いるリードフレームの製造方法 |
JPH11145365A (ja) * | 1997-11-11 | 1999-05-28 | Toppan Printing Co Ltd | Ic用リードフレーム |
JP4467195B2 (ja) * | 2001-01-29 | 2010-05-26 | 京セラ株式会社 | リードフレームおよびそれを用いた半導体素子収納用パッケージ |
US6924548B2 (en) * | 2001-01-31 | 2005-08-02 | Hitachi, Ltd. | Semiconductor device and its manufacturing method with leads that have an inverted trapezoid-like section |
TW482335U (en) * | 2001-05-07 | 2002-04-01 | Siliconware Precision Industries Co Ltd | Chip carrier to reduce the wear of pressing tool |
JP3583403B2 (ja) * | 2001-12-27 | 2004-11-04 | 日電精密工業株式会社 | Loc用リードフレーム及びその製造方法 |
TW569414B (en) * | 2002-12-19 | 2004-01-01 | Chipmos Technologies Bermuda | Method for manufacturing a leadframe with fine pitch inner leads and leadframe formed from the same |
TWI419288B (zh) * | 2009-01-23 | 2013-12-11 | Advanced Semiconductor Eng | 導線架條及其封膠方法與具有導線架之半導體封裝構造 |
JP6129645B2 (ja) * | 2013-05-29 | 2017-05-17 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
-
2016
- 2016-03-17 JP JP2016053321A patent/JP2017168703A/ja not_active Abandoned
-
2017
- 2017-02-14 TW TW106104751A patent/TWI646608B/zh active
- 2017-03-08 CN CN201710133174.9A patent/CN107204299B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6867072B1 (en) * | 2004-01-07 | 2005-03-15 | Freescale Semiconductor, Inc. | Flipchip QFN package and method therefor |
CN201392831Y (zh) * | 2009-04-03 | 2010-01-27 | 宁波康强电子股份有限公司 | 用于制造引线框架的铜带 |
CN201523004U (zh) * | 2009-10-11 | 2010-07-07 | 天水华天科技股份有限公司 | 一种小载体四面扁平无引脚封装件 |
Also Published As
Publication number | Publication date |
---|---|
TW201810461A (zh) | 2018-03-16 |
CN107204299A (zh) | 2017-09-26 |
JP2017168703A (ja) | 2017-09-21 |
TWI646608B (zh) | 2019-01-01 |
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Legal Events
Date | Code | Title | Description |
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PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder | ||
CP01 | Change in the name or title of a patent holder |
Address after: Tokyo Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo Patentee before: Pangea Co.,Ltd. Address after: Tokyo Patentee after: Kaixia Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220209 Address after: Tokyo Patentee after: Pangea Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |