CN106538079A - 印刷电路板的通孔 - Google Patents
印刷电路板的通孔 Download PDFInfo
- Publication number
- CN106538079A CN106538079A CN201580026648.9A CN201580026648A CN106538079A CN 106538079 A CN106538079 A CN 106538079A CN 201580026648 A CN201580026648 A CN 201580026648A CN 106538079 A CN106538079 A CN 106538079A
- Authority
- CN
- China
- Prior art keywords
- catalytic
- sticker
- hole
- dielectric
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
- H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0221—Insulating particles having an electrically conductive coating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0236—Plating catalyst as filler in insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0709—Catalytic ink or adhesive for electroless plating
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
- Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Chemically Coating (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
Abstract
印刷电路板的穿孔由一个图形化金属层构成,该图形化金属层延伸穿过介电板材内的孔,介电板材的两面覆有催化性粘着剂。介电板材的穿孔周围涂有一层催化性粘着剂。图形化金属层置于介电板材两面以及所述穿孔之内的催化性粘着剂之上。
Description
背景技术
相关专利申请的交叉引用:
本申请涉及并要求2014年5月19号提交的题为《印刷电路板的通孔》的美国专利申请号为14/281,802的专利申请的利益和优先权,整体在此通过参照的方式引入。
发明内容
电子行业的微型化给印刷电路板(PCB)产业带来了压力,敦促其创造精细线路。经常用来生产PCB和内芯板的印刷与蚀刻工艺在精确度方面还达不到1密耳或更小的线径和间距。而使用催化性层压板材的添加工艺利用阻镀剂在光刻法制成的通道和通孔内进行局部镀铜(Cu)。
多层板结构的制造方法有多种。其中之一就是通过印刷和蚀刻在无催化性的内芯板的双面都印上线路。外层和孔的钻孔和线路设计完成之后会对内芯板进行加压和粘合。
附图说明
图1显示了根据一种实施方式的印刷电路板的通孔的简图。
图2、图3、图4、图5、图6和图7显示了根据一种实施方式在印刷电路板中形成通孔的具体步骤。
图8是一个流程图,所述流程图总结了根据一种实施方式在印刷电路板内形成通孔的过程。
图9是一个流程图,所述流程图总结了根据另一种替代实施方式在印刷电路板内形成通孔的过程。
具体实施方式
在印刷电路板(PCB)的制造过程中,对高密度的要求使得金属布线相当困难,外层形成在制造过程终端,然后印刷电路板内芯板两面都会涂有催化性的粘着剂。此涂层可使用与内芯板层压板材相同或相似的材料。这就给了金属线路层良好的粘性。外层制造过程中,可使用激光来制造盲孔,使用感光膜来生成迹线。
图1示出了一部分印刷电路板(PCB)9的通孔。介电板材10被用作印刷电路板的基板(双面层压内芯板),其构成材料是,比如,玻璃或非玻璃强化材料和一种树脂(比如环氧树脂、聚酰亚胺、铁氟龙或其他任何一种适合做印刷电路板基板的树脂)。介电板材10,举例来说,厚度大约是0.028英寸,被压在顶部粘着层11和底部粘着层12中间。顶部粘着层11和底部粘着层12,比如每层厚度大约是25微米(1密耳)。顶部粘着层11和底部粘着层12的构成材料举例来说是一种介电粘着剂,比如环氧树脂、聚酰亚胺、氰酸盐酯或其他合适的介电粘着剂。介电粘着剂包括,比如,非催化性和催化性填充粒子。所述催化性填充粒子构成材料是,比如一种金属,诸如钯(Pd)、铁(Fe)和/或其他用来镀铜的催化性粒子,在这个过程中,化学镀铜(Cu)由Cu++被还原为Cu。例如,所述催化性的粒子可由有金属涂层的无机填料组成。例如,该无机填料可以是二氧化硅、高岭土或是其他拥有适用于此特定应用的特性的无机填料。通孔13,比如,可以由铜构成,从顶部粘着层11、介电板材10和底部粘着层12穿过,保证了印刷电路板9不同面上线路之间的电气连接。
图2到图7示出了通孔的形成过程。图2显示了介电板材10。
如图3所示,针对每个通孔,介电板材10上钻一个孔14,所述孔14的直径约为8密耳。通孔的直径根据应用、实际的生产制程等等不尽相同。
介电板材10的两面都涂有催化性粘着剂,以此形成顶部粘着层11和底部粘着层12。孔14内也填满了催化性粘着剂25。比如,所述催化性粘着剂由诸如环氧树脂、聚酰亚胺、氰酸盐酯或其他适合的介电粘着剂构成。所述粘着剂的流变性(粘性)可根据粘着剂涂层方式及填孔方式进行调整。所述电介质材料包含比如粒子尺寸大小在2到12微米(urn)之间的催化性粒子。或者,也可使用其他尺寸的粒子。例如,较小的粒子更好,因为尺寸较大的粒子会影响顶部粘着层11和底部粘着层12镀铜的均匀性和粗糙度。例如,从重量上来看,粒子占催化性粘着材料25总重量的百分之六到百分之十五。此百分比只是一个范例,因为根据不同的应用,粒子占催化性粘着材料25总重量的百分比也会不同。催化性粘着材料沉积的方法有,比如,丝网印刷术、镂花涂装或刮刀涂布。刮刀涂布可使用ITC、Intercircuit、N.A.公司的相关设备,或行业内其他可使用一种或多种现有制程或方法来沉积印刷电路板基材物质的涂布设备。
图5显示了孔26穿过催化性粘着材料25。比如,孔26的直径是6密耳,催化性粘着材料的一个表层15在孔26的所述直径四周。孔26的直径根据应用、实际的生产制程等等不尽相同。
顶部粘着层11和底部粘着层12上涂有一层抗蚀剂。抗蚀层被暴露在外,以在顶部粘着层11之上形成抗蚀图17,并在底部粘着层12之上形成抗蚀图18。结果如图6所示。
整个化学镀铜经沉积过后,在顶部粘着层11之上留下一个铜线路图形层16,并在无抗蚀剂的底部粘着层12之上留下一个铜线路图形层19。孔26内同样也会形成镀铜区20。比如,铜线路图形层19和镀铜区20的厚度在0.5到1.4密耳之间。如图7所示,抗蚀剂脱离。孔26直径四周的催化性粘着材料保证了孔26内镀铜区20的良好粘性。
铜线路图形层16和铜线路图形层19用作PCB(印刷电路板)的迹线。所述迹线形成后,可以(选择性地)清除顶部粘着层11和底部粘着层12暴露的部分(即顶部粘着层11和底部粘着层12未被迹线覆盖的部分)。清除方法有,比如说,用等离子刻蚀、激光烧蚀、或者其他适合用来清除粘着层同时又不损害镀铜的工艺。
上述工艺好处之一就是线路层间没有铜可被蚀刻掉。比如,如果不用上述的方法,而在覆铜薄层压板上进行印刷及蚀刻处理,以此来形成迹线,但是当印刷电路板的迹线宽度和间距小于1密耳时,就会有问题了,原因是嵌入层压板表面的铜粒子有可能导致短路。在上述实施方式中,仅去除顶部粘着层11和底部粘着层12未被铜迹线覆盖部分,就可以很容易移除所有金属粒子。
另外,顶部粘着层11和底部粘着层12还有助于形成铜线路图形层16和19的直壁。这是因为粘着层的使用允许抗蚀图17和抗蚀图18来制定铜线路图形层16和19。使用抗蚀图来形成镀铜可以制造更好的迹线(也就是线路更直的壁面),此线路层的迹线电气特性,包括阻抗和信号损失,都会更佳。当使用腐蚀印刷及蚀刻工艺形成铜迹线时,迹线的截面会看起来像一个梯形,而非使用抗蚀剂时形成的正方形或矩形。
双面层压内芯板线路一旦形成,就可以使用现有已知技术来构造多层结构了,这类技术包括诸如在线路层上施加额外的催化性粘着剂,或者通过激光或等离子来形成通孔,进而构造附加层等。
图8总结了上述实施方式。在方框41中,介电板材钻有第一孔。在方框42中,介电板材的两个面都涂覆有催化性粘着剂。此涂覆还包括在第一孔内填满催化性粘着剂。
在方框43中,在催化性粘着剂填满了第一孔处穿过催化性粘着剂钻第二孔。所述第二孔直径比所述第一孔的直径小,使得催化性粘着剂表层保留在所述第二孔的直径内。
在方框44中,在所述介电板材的两个面上的催化性粘着剂上分别形成了一图形化金属层。这包括在第二孔的直径上留下的一层催化性粘着剂层上形成的所述金属层。
在可选方框45中,去除未被图形化金属层覆盖的催化性粘着材料的暴露部分。
图9对一种替代实施方式进行了总结。在方框51中,介电板材上被钻了一个孔。在方框52中,介电板材的两个面都涂有催化性粘着剂。该涂层部分未填满所述孔。例如,使用静电喷涂法、喷涂或其他涂层方法,比如,利用行业内的标准涂层设备,来在介电板材上喷涂催化性粘着剂,目的是在对介电板材两个面进行喷涂时,还喷涂了孔壁。
在方框53中,介电板材两个面上的催化性粘着剂上分别形成了一图形化金属层。这包括在孔壁上的催化性粘着层上产生一层金属层。
在可选方框54中,去除未被图形化金属层覆盖的催化性粘着材料的暴露部分。
上述讨论仅揭露并描述了典型的方法和具体实施方式。正如本领域技术人员所理解的那样,揭露的主旨可能会以其他具体形式呈现出来,而不会背离其中的精神或特性。例如,在方框43或方框52之后,化学镀铜液会产生一个薄薄的镀铜层(比如,1-2微米),接着就是分别是方框44和方框53。特征形成之后,基板上薄薄的镀铜层可通过化学方法去除。另外,叠孔形成方式之一就是,用电介质材料填充镀孔,然后进行标准化的化学镀铜处理,接着施加仅暴露通孔填充区域的抗蚀剂,最后镀上更多铜。若通过添加催化粉末到电介质材料中填充镀孔,然后使用加成的化学镀铜液对通孔之上的铜进行电镀,则可以省略很多步骤。相应地,目前的揭露意在说明而非限制本发明的范围,本发明的范围由所附权利要求而不是实施方案上述说明限定。
Claims (18)
1.一种在印刷电路板上形成通孔的方法,其特征在于:所述方法包括:
在介电板材上钻第一孔;
用催化性粘着剂对介电板材的两个面进行涂层,包括用催化性粘着剂填充所述第一孔;
在催化性粘着剂填充第一孔处穿透所述催化性粘着剂钻第二孔,所述第二孔的直径比所述第一孔的直径小,使得一层催化性粘着剂保留在所述第二孔的直径内;和
在所述介电板材的两个面的所述催化性粘着剂上分别形成图形化金属层,包括在所述第二孔的直径内的一层催化性粘着剂上形成所述图形化金属层。
2.如权利要求1所述的方法,其特征在于:所述方法还包括:
去除未被图形化金属层覆盖的催化性粘着剂的暴露部分。
3.如权利要求1所述的方法,其特征在于:所述催化性粘着剂是一种同时包含非催化性及催化性填充粒子的介电粘着剂。
4.如权利要求1所述的方法,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由适合用作镀铜催化剂的金属构成。
5.如权利要求1所述的方法,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由无机填料和涂覆在无机填料上的金属构成。
6.如权利要求1所述的方法,其特征在于:所述图形化金属层由铜构成。
7.一种印刷电路板,其特征在于:其包括:
已有一个钻孔的介电板材,其上涂有催化性粘着剂,所述催化性粘着剂也涂在所述介电板材的钻孔周围;以及,
介电板材的两个面的催化性粘着剂上的图形化金属层,包括形成于涂在所述介电板材的钻孔周围的一层催化性粘着剂上的图形化金属层的部分。
8.如权利要求7所述的印刷电路板,其特征在于:所述催化性粘着剂未被图形化金属层覆盖的区域被去除。
9.如权利要求7所述的印刷电路板,其特征在于:所述催化性粘着剂是一种同时包含非催化性及催化性填充粒子的介电粘着剂。
10.如权利要求7所述的印刷电路板,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由适合用作镀铜催化剂的金属构成。
11.如权利要求7所述的印刷电路板,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由有金属涂层的无机填料构成。
12.如权利要求7所述的印刷电路板,其特征在于:所述图形化金属层由铜构成。
13.一种在印刷电路板中形成通孔的方法,其特征在于:所述方法包括:
在介电板材上钻第一孔;
将催化性粘着剂涂在介电板材的两个面上,包括将催化性粘着剂涂在所述第一孔的孔壁上;以及
在所述介电板材的两个面的催化性粘着剂上形成图形化金属层,包括在第一孔的孔壁的催化性粘着剂涂层上形成所述图形化金属层。
14.如权利要求13所述的方法,其特征在于:所述方法还包括:
去除未被图形化金属层覆盖的催化性粘着材料的暴露部分。
15.如权利要求13所述的方法,其特征在于:所述催化性粘着剂是一种同时包含非催化性及催化性填充粒子的介电粘着剂。
16.如权利要求13所述的方法,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由适合用作镀铜催化剂的金属构成。
17.如权利要求13所述的方法,其特征在于:所述催化性粘着剂是一种包含催化性填充粒子的介电粘着剂,所述催化性填充粒子由有金属涂层的无机填料构成。
18.如权利要求13所述的方法,其特征在于:所述图形化金属层由铜构成。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911338361.6A CN110933874A (zh) | 2014-05-19 | 2015-02-05 | 印刷电路板的通孔 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/281,802 | 2014-05-19 | ||
US14/281,802 US9398703B2 (en) | 2014-05-19 | 2014-05-19 | Via in a printed circuit board |
PCT/US2015/014615 WO2015178971A1 (en) | 2014-05-19 | 2015-02-05 | Via in a printed circuit board |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911338361.6A Division CN110933874A (zh) | 2014-05-19 | 2015-02-05 | 印刷电路板的通孔 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106538079A true CN106538079A (zh) | 2017-03-22 |
CN106538079B CN106538079B (zh) | 2020-01-17 |
Family
ID=52629662
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911338361.6A Pending CN110933874A (zh) | 2014-05-19 | 2015-02-05 | 印刷电路板的通孔 |
CN201580026648.9A Active CN106538079B (zh) | 2014-05-19 | 2015-02-05 | 印刷电路板的通孔 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911338361.6A Pending CN110933874A (zh) | 2014-05-19 | 2015-02-05 | 印刷电路板的通孔 |
Country Status (7)
Country | Link |
---|---|
US (2) | US9398703B2 (zh) |
EP (1) | EP3146812B1 (zh) |
JP (1) | JP6591533B2 (zh) |
KR (1) | KR102215572B1 (zh) |
CN (2) | CN110933874A (zh) |
TW (1) | TWI657729B (zh) |
WO (1) | WO2015178971A1 (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017135135A (ja) * | 2016-01-25 | 2017-08-03 | 京セラ株式会社 | 配線基板 |
US10849233B2 (en) | 2017-07-10 | 2020-11-24 | Catlam, Llc | Process for forming traces on a catalytic laminate |
US9706650B1 (en) | 2016-08-18 | 2017-07-11 | Sierra Circuits, Inc. | Catalytic laminate apparatus and method |
EP3501242A4 (en) * | 2016-08-18 | 2020-04-15 | Catlam LLC | PLASMA ETCHED CATALYTIC LAMINATE WITH INTERCONNECTION HOLES |
US9922951B1 (en) * | 2016-11-12 | 2018-03-20 | Sierra Circuits, Inc. | Integrated circuit wafer integration with catalytic laminate or adhesive |
WO2018089798A1 (en) * | 2016-11-12 | 2018-05-17 | Sierra Circuits, Inc. | Integrated circuit wafer integration with catalytic laminate or adhesive |
JP6941939B2 (ja) | 2016-12-22 | 2021-09-29 | リンテック株式会社 | 検査部材、および検査部材の製造方法 |
US10349520B2 (en) | 2017-06-28 | 2019-07-09 | Catlam, Llc | Multi-layer circuit board using interposer layer and conductive paste |
US10765012B2 (en) | 2017-07-10 | 2020-09-01 | Catlam, Llc | Process for printed circuit boards using backing foil |
US10827624B2 (en) | 2018-03-05 | 2020-11-03 | Catlam, Llc | Catalytic laminate with conductive traces formed during lamination |
US11096271B1 (en) * | 2020-04-09 | 2021-08-17 | Raytheon Company | Double-sided, high-density network fabrication |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3322881A (en) * | 1964-08-19 | 1967-05-30 | Jr Frederick W Schneble | Multilayer printed circuit assemblies |
GB1208337A (en) * | 1967-08-29 | 1970-10-14 | Int Standard Electric Corp | Method to produce printed circuits |
US4585502A (en) * | 1984-04-27 | 1986-04-29 | Hitachi Condenser Co., Ltd. | Process for producing printed circuit board |
JPH0294592A (ja) * | 1988-09-30 | 1990-04-05 | Sony Corp | 配線基板の製造方法 |
EP0275071B1 (en) * | 1987-01-14 | 1992-08-12 | AMP-AKZO CORPORATION (a Delaware corp.) | Adherent coating for copper |
US5309632A (en) * | 1988-03-28 | 1994-05-10 | Hitachi Chemical Co., Ltd. | Process for producing printed wiring board |
US5387493A (en) * | 1989-10-25 | 1995-02-07 | Hitachi, Ltd. | Photosensitive resin composition for forming conductor patterns and multilayer circuit boards using same |
US20020195716A1 (en) * | 2001-02-27 | 2002-12-26 | International Business Machines Corporation | Copper plated PTH barrels and methods for fabricating |
CN101622919A (zh) * | 2007-03-05 | 2010-01-06 | 株式会社普利司通 | 透光性电磁波屏蔽材料及其制造方法以及具有贵金属的极薄的膜的微粒 |
WO2014041057A1 (de) * | 2012-09-12 | 2014-03-20 | Würth Elektronik GmbH & Co. KG | Verfahren zum herstellen einer in einem substrat integrierten oder auf einem substrat aufgebrachten spule und elektronisches gerät |
Family Cites Families (56)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3014818A (en) | 1957-12-09 | 1961-12-26 | Du Pont | Electrically conducting articles and process of making same |
US3259559A (en) | 1962-08-22 | 1966-07-05 | Day Company | Method for electroless copper plating |
US3226256A (en) | 1963-01-02 | 1965-12-28 | Jr Frederick W Schneble | Method of making printed circuits |
US3269861A (en) | 1963-06-21 | 1966-08-30 | Day Company | Method for electroless copper plating |
US3370974A (en) | 1965-10-20 | 1968-02-27 | Ivan C. Hepfer | Electroless plating on non-conductive materials |
US3799802A (en) | 1966-06-28 | 1974-03-26 | F Schneble | Plated through hole printed circuit boards |
US3925138A (en) | 1973-11-27 | 1975-12-09 | Formica Int | Process for preparing an insulating substrate for use in printed circuits |
US4001466A (en) | 1973-11-27 | 1977-01-04 | Formica International Limited | Process for preparing printed circuits |
US4287253A (en) | 1975-04-08 | 1981-09-01 | Photocircuits Division Of Kollmorgen Corp. | Catalytic filler for electroless metallization of hole walls |
JPS5279276A (en) * | 1975-12-25 | 1977-07-04 | Hitachi Chemical Co Ltd | Method of producing printed circuit board |
JPS5288772A (en) * | 1976-01-20 | 1977-07-25 | Matsushita Electric Ind Co Ltd | Method of producing printed circuit board |
JPS5335163A (en) * | 1976-09-14 | 1978-04-01 | Hitachi Chemical Co Ltd | Method of producing printed circuit board substrate having through hole from metallic material |
US4167601A (en) | 1976-11-15 | 1979-09-11 | Western Electric Company, Inc. | Method of depositing a stress-free electroless copper deposit |
DE2728465C2 (de) | 1977-06-24 | 1982-04-22 | Preh, Elektrofeinmechanische Werke, Jakob Preh, Nachf. Gmbh & Co, 8740 Bad Neustadt | Gedruckte Schaltung |
US4145460A (en) * | 1977-06-27 | 1979-03-20 | Western Electric Company, Inc. | Method of fabricating a printed circuit board with etched through holes |
JPS5830760B2 (ja) | 1980-10-09 | 1983-07-01 | 株式会社日立製作所 | プリント回路板の製法 |
DE3121015C2 (de) | 1981-05-27 | 1986-12-04 | Friedr. Blasberg GmbH und Co KG, 5650 Solingen | Verfahren zur Aktivierung von gebeizten Oberflächen und Lösung zur Durchführung desselben |
US4354895A (en) | 1981-11-27 | 1982-10-19 | International Business Machines Corporation | Method for making laminated multilayer circuit boards |
DE3408630A1 (de) * | 1984-03-09 | 1985-09-12 | Hoechst Ag, 6230 Frankfurt | Verfahren und schichtmaterial zur herstellung durchkontaktierter elektrischer leiterplatten |
US4581301A (en) | 1984-04-10 | 1986-04-08 | Michaelson Henry W | Additive adhesive based process for the manufacture of printed circuit boards |
JPS61102796A (ja) * | 1984-10-26 | 1986-05-21 | 日立コンデンサ株式会社 | 印刷配線板の製造方法 |
US4908242A (en) | 1986-10-31 | 1990-03-13 | Kollmorgen Corporation | Method of consistently producing a copper deposit on a substrate by electroless deposition which deposit is essentially free of fissures |
US4954185A (en) | 1987-01-14 | 1990-09-04 | Kollmorgen Corporation | Method of applying adherent coating on copper |
US5153987A (en) * | 1988-07-15 | 1992-10-13 | Hitachi Chemical Company, Ltd. | Process for producing printed wiring boards |
JPH0366194A (ja) * | 1989-08-04 | 1991-03-20 | Ibiden Co Ltd | プリント配線板の製造方法 |
JP2881963B2 (ja) * | 1990-05-25 | 1999-04-12 | ソニー株式会社 | 配線基板及びその製造方法 |
US5200720A (en) * | 1990-11-27 | 1993-04-06 | Sam Hwa Capacitor Co., Ltd. | Emi bead core filter, process and apparatus thereof |
US5162144A (en) | 1991-08-01 | 1992-11-10 | Motorola, Inc. | Process for metallizing substrates using starved-reaction metal-oxide reduction |
JPH0570961A (ja) * | 1991-09-17 | 1993-03-23 | Hitachi Chem Co Ltd | 無電解めつき用触媒とその製造法およびその使用方法 |
JPH05160565A (ja) * | 1991-12-06 | 1993-06-25 | Hitachi Chem Co Ltd | 配線板の製造法 |
JPH06232558A (ja) * | 1993-02-04 | 1994-08-19 | Toshiba Corp | 多層プリント配線板の製造方法 |
JPH088513A (ja) * | 1994-06-22 | 1996-01-12 | Sumitomo Metal Mining Co Ltd | プリント配線板の製造方法 |
EP0744884A3 (en) * | 1995-05-23 | 1997-09-24 | Hitachi Chemical Co Ltd | Method of manufacturing a multilayer printed circuit board |
DE19731346C2 (de) | 1997-06-06 | 2003-09-25 | Lpkf Laser & Electronics Ag | Leiterbahnstrukturen und ein Verfahren zu deren Herstellung |
DE69936892T2 (de) * | 1998-02-26 | 2007-12-06 | Ibiden Co., Ltd., Ogaki | Mehrschichtige Leiterplatte mit gefüllten Kontaktlöchern |
JP3100131B1 (ja) * | 1998-09-07 | 2000-10-16 | キヤノン株式会社 | 画像形成装置 |
MY144573A (en) * | 1998-09-14 | 2011-10-14 | Ibiden Co Ltd | Printed circuit board and method for its production |
DE60045566D1 (de) * | 1999-08-06 | 2011-03-03 | Ibiden Co Ltd | Mehrschicht-Leiterplatte |
EP2053908B1 (en) * | 1999-08-12 | 2011-12-21 | Ibiden Co., Ltd. | Multilayer printed wiring board with a solder resist composition |
US7334326B1 (en) | 2001-06-19 | 2008-02-26 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded passive components |
JP2003105061A (ja) * | 2001-09-27 | 2003-04-09 | Sanei Kagaku Kk | 光・熱硬化性樹脂組成物、並びに穴詰プリント配線(基)板の製造方法及び穴詰プリント配線(基)板 |
KR100632579B1 (ko) * | 2004-04-07 | 2006-10-09 | 삼성전기주식회사 | 인쇄회로기판의 비아홀 형성방법 |
JP4146826B2 (ja) | 2004-09-14 | 2008-09-10 | カシオマイクロニクス株式会社 | 配線基板及び半導体装置 |
TW200618705A (en) | 2004-09-16 | 2006-06-01 | Tdk Corp | Multilayer substrate and manufacturing method thereof |
US20060068173A1 (en) | 2004-09-30 | 2006-03-30 | Ebara Corporation | Methods for forming and patterning of metallic films |
TWI291382B (en) * | 2004-12-08 | 2007-12-21 | Ind Tech Res Inst | Method of forming a metal thin film with micro holes by ink-jet printing |
JP2007134364A (ja) * | 2005-11-08 | 2007-05-31 | Hitachi Cable Ltd | 多層配線基板の製造方法及び多層配線基板並びにそれを用いた電子装置 |
BRPI0813652A2 (pt) | 2007-07-02 | 2014-12-30 | 3M Innovative Properties Co | Método de padronização de um substrato |
KR100936078B1 (ko) | 2007-11-12 | 2010-01-12 | 삼성전기주식회사 | 전기부재 및 이를 이용한 인쇄회로기판의 제조방법 |
US8698003B2 (en) * | 2008-12-02 | 2014-04-15 | Panasonic Corporation | Method of producing circuit board, and circuit board obtained using the manufacturing method |
TWI388122B (zh) | 2009-04-20 | 2013-03-01 | Unimicron Technology Corp | 形成複合材料電路板結構的方法 |
TWI392425B (zh) | 2009-08-25 | 2013-04-01 | Unimicron Technology Corp | 內埋式線路板及其製造方法 |
TWI423750B (zh) | 2010-09-24 | 2014-01-11 | Kuang Hong Prec Co Ltd | 非導電性載體形成電路結構之製造方法 |
GB2489042A (en) | 2011-03-18 | 2012-09-19 | Conductive Inkjet Technology Ltd | Photo-patternable structure |
US8784952B2 (en) | 2011-08-19 | 2014-07-22 | Earthone Circuit Technologies Corporation | Method of forming a conductive image on a non-conductive surface |
JP2014072324A (ja) * | 2012-09-28 | 2014-04-21 | Ibiden Co Ltd | プリント配線板及びその製造方法 |
-
2014
- 2014-05-19 US US14/281,802 patent/US9398703B2/en active Active
-
2015
- 2015-02-05 WO PCT/US2015/014615 patent/WO2015178971A1/en active Application Filing
- 2015-02-05 CN CN201911338361.6A patent/CN110933874A/zh active Pending
- 2015-02-05 EP EP15708363.5A patent/EP3146812B1/en active Active
- 2015-02-05 KR KR1020167034800A patent/KR102215572B1/ko active IP Right Grant
- 2015-02-05 CN CN201580026648.9A patent/CN106538079B/zh active Active
- 2015-02-05 JP JP2017514256A patent/JP6591533B2/ja active Active
- 2015-05-19 TW TW104115823A patent/TWI657729B/zh active
-
2016
- 2016-06-16 US US15/184,426 patent/US9674967B2/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3322881A (en) * | 1964-08-19 | 1967-05-30 | Jr Frederick W Schneble | Multilayer printed circuit assemblies |
GB1208337A (en) * | 1967-08-29 | 1970-10-14 | Int Standard Electric Corp | Method to produce printed circuits |
US4585502A (en) * | 1984-04-27 | 1986-04-29 | Hitachi Condenser Co., Ltd. | Process for producing printed circuit board |
EP0275071B1 (en) * | 1987-01-14 | 1992-08-12 | AMP-AKZO CORPORATION (a Delaware corp.) | Adherent coating for copper |
US5309632A (en) * | 1988-03-28 | 1994-05-10 | Hitachi Chemical Co., Ltd. | Process for producing printed wiring board |
JPH0294592A (ja) * | 1988-09-30 | 1990-04-05 | Sony Corp | 配線基板の製造方法 |
US5387493A (en) * | 1989-10-25 | 1995-02-07 | Hitachi, Ltd. | Photosensitive resin composition for forming conductor patterns and multilayer circuit boards using same |
US20020195716A1 (en) * | 2001-02-27 | 2002-12-26 | International Business Machines Corporation | Copper plated PTH barrels and methods for fabricating |
CN101622919A (zh) * | 2007-03-05 | 2010-01-06 | 株式会社普利司通 | 透光性电磁波屏蔽材料及其制造方法以及具有贵金属的极薄的膜的微粒 |
WO2014041057A1 (de) * | 2012-09-12 | 2014-03-20 | Würth Elektronik GmbH & Co. KG | Verfahren zum herstellen einer in einem substrat integrierten oder auf einem substrat aufgebrachten spule und elektronisches gerät |
Also Published As
Publication number | Publication date |
---|---|
EP3146812A1 (en) | 2017-03-29 |
EP3146812B1 (en) | 2022-04-06 |
JP2017517158A (ja) | 2017-06-22 |
JP6591533B2 (ja) | 2019-10-16 |
CN106538079B (zh) | 2020-01-17 |
TW201607397A (zh) | 2016-02-16 |
KR20170005097A (ko) | 2017-01-11 |
US20150334836A1 (en) | 2015-11-19 |
KR102215572B1 (ko) | 2021-02-10 |
US9398703B2 (en) | 2016-07-19 |
US9674967B2 (en) | 2017-06-06 |
US20160295708A1 (en) | 2016-10-06 |
WO2015178971A1 (en) | 2015-11-26 |
TWI657729B (zh) | 2019-04-21 |
CN110933874A (zh) | 2020-03-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106538079A (zh) | 印刷电路板的通孔 | |
US9706667B2 (en) | Via in a printed circuit board | |
TW200524502A (en) | Method of providing printed circuit board with conductive holes and board resulting therefrom | |
TWI665949B (zh) | 柔性電路板及其製作方法 | |
WO2009131182A1 (ja) | フレックスリジッド配線基板とその製造方法 | |
TW201637522A (zh) | 具有輪廓化導電層的印刷電路板及其製造方法 | |
JP2008078343A (ja) | プリント配線板及びその製造方法 | |
KR100752017B1 (ko) | 인쇄회로기판의 제조방법 | |
JP5958558B2 (ja) | 樹脂多層基板 | |
KR100783462B1 (ko) | 전자 소자 내장형 인쇄회로기판 및 그 제조방법 | |
KR100674320B1 (ko) | 노즐 분사에 의해 회로패턴이 구현된 인쇄회로기판 및 그제조 방법 | |
JP5014673B2 (ja) | 多層配線基板及びその製造方法 | |
JP2007242872A (ja) | 多層プリント配線板およびその製造方法 | |
EP2673801A1 (de) | Kontaktsystem mit einem verbindungsmittel und verfahren | |
CN103929898A (zh) | 一种超厚铜层的印刷电路板的制作方法 | |
KR101050214B1 (ko) | 다층 인쇄회로기판 및 그 제조방법 | |
JP2002280741A (ja) | 多層プリント配線板とその製造法 | |
JP2007059777A (ja) | 多層プリント配線板及びその製造方法 | |
JP2006156438A (ja) | 電子部品搭載装置の製造方法及び電子部品搭載装置 | |
CN109378295A (zh) | 基于铜柱导通技术的摄像模组封装基板及其制造方法 | |
JP2016162968A (ja) | 多層プリント配線板及びその製造方法 | |
JP2000216551A (ja) | 多層配線基板及びその製造方法 | |
JP2005026548A (ja) | マルチワイヤ配線板の製造方法 | |
JP2006086315A (ja) | 多層プリント配線板の製造方法 | |
JPH01106496A (ja) | スルーホール回路基板の製造法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20200316 Address after: California, USA Patentee after: SIERRA CIRCUITS, Inc. Address before: 1108 Evelyn Avenue, Sunnyvale, California, USA Patentee before: SIERRA CIRCUITS, Inc. |
|
TR01 | Transfer of patent right |