CN105702731A - 半导体器件及制造半导体器件的方法 - Google Patents
半导体器件及制造半导体器件的方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 96
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 27
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 230000004888 barrier function Effects 0.000 claims description 92
- 238000000034 method Methods 0.000 claims description 24
- 238000009825 accumulation Methods 0.000 claims description 20
- 230000015572 biosynthetic process Effects 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 9
- 150000002500 ions Chemical class 0.000 claims description 8
- 238000002347 injection Methods 0.000 claims description 2
- 239000007924 injection Substances 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 abstract 2
- 238000007254 oxidation reaction Methods 0.000 abstract 2
- 230000015556 catabolic process Effects 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003631 expected effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
本发明概念涉及半导体器件,且更具体地,涉及能够通过减少阻抗来提高电流量的半导体器件,以及制造所述半导体器件的方法。半导体器件包括置于n+型碳化硅衬底的第一表面上的n-型外延层;置于所述n-型外延层上的n+型区;置于所述n-型外延层和所述n+型区中的第一沟槽和第二沟槽;分别置于所述第一沟槽和第二沟槽内部的第一栅极绝缘层和第二栅极绝缘层;分别置于所述第一栅极绝缘层和第二栅极绝缘层上的第一栅极和第二栅极;置于所述第一沟槽和第二沟槽中一者的两侧的p-型区;置于所述第一栅极和第二栅极上的氧化膜;置于所述n+型区和所述氧化膜上的源极;以及置于所述n+型碳化硅衬底的第二表面上的漏极,其中在所述第一沟槽的两侧上设置有第一沟道,并且在所述第二沟槽的两侧上设置有第二沟道。
Description
相关申请的交叉引用
本申请要求2014年12月12日向韩国知识产权局提交的韩国专利申请No.10-2014-0179659的优先权权益,该专利申请的全部内容通过引用并入本文。
技术领域
本发明涉及半导体器件,且更具体地,涉及能够通过减少阻抗来提高电流量的半导体器件,以及制造半导体器件的方法。
背景技术
近来,由于应用设备已在尺寸和容量上增长,因此对于具有高击穿电压、高电流以及高速开关特性的功率半导体器件的需求正在增长。
功率半导体器件需要低阻抗以及低饱和电压以在进行电能传输时允许大电流流过并且减少功率损耗。更进一步地,功率半导体器件应该能够在关断状态或者当开关关断时,抵抗施加在功率半导体器件两端的PN结反向高压。即,功率半导体器件基本上需要高击穿电压。
在功率半导体器件中,金属氧化物半导体场效应晶体管(MOSFET)是在数字电路和模拟电路中最典型的场效应晶体管。
当制造功率半导体器件时,要使用的原材料的外延区或漂移区所需的浓度和厚度都取决于半导体器件的额定电压。为了能获得在击穿电压理论下以及在期望水平的合适的击穿电压下所需要的原材料的浓度和厚度,需要通过适当的产生由耗尽层在PN结的反向偏压模式下感应出的电场、适当的使用PN结结构,最小化在半导体和电介质材料的接触面上的表面电场的增长,并且需要依据功率半导体器件的击穿来设计足以抵抗原材料的固有的阈值电场的功率半导体器件。
具体的,在使用碳化硅(SiC)的MOSFET中,起栅极绝缘膜作用的SiC接触面和氧化硅膜的状态差,并且其影响流经在氧化硅膜的侧面产生的沟道的电流的流动,因此,电子的移动性将显著地减弱。
更进一步地,现有技术的MOSFET进入电信号不能够直接提供至基极区的浮置状态。
对于现有技术的描述是为了帮助理解本发明的背景,并且其可包括本领域技术人员已知的现有技术以外的事项。
在本文背景技术部分公开的上述信息仅用于增强对发明概念的背景的理解,并且因此其可包含不形成该国本领域技术人员已知的现有技术的信息。
发明内容
本发明致力于提供具有包括反型层沟道和积累层沟道二者的特点的半导体器件以及制造半导体器件的方法。
更进一步地,本发明提供一种其源极能够接触n+区和p-区的半导体器件以及制造半导体器件的方法。
本发明概念的示例性实施例提供一种半导体器件,其包括:n-型外延层,其置于n+型碳化硅衬底的第一表面上;n+型区,其置于n-型外延层上;第一沟槽和第二沟槽,其置于n-型外延层和n+型区中;第一栅极绝缘层和第二栅极绝缘层,其分别置于第一沟槽和第二沟槽内;第一栅极和第二栅极,其分别置于第一栅极绝缘层和第二栅极绝缘层上;p-型区,其置于第一沟槽和第二沟槽中一者的两侧上;氧化膜,其置于第一栅极和第二栅极上;源极,其置于n+型区和氧化膜上;以及漏极,其置于n+型碳化硅衬底的第二表面上,其中第一沟道置于第一沟槽两侧上并且第二沟道置于第二沟槽两侧上。
源极可与n+型区和p-型区接触。
源极的下表面可交替地接触n+型区的上表面和p-型区的上表面。
p-型区可置于第二沟槽的两侧上,以及第一沟道可以是积累层沟道,并且第二沟道可以是反型层沟道。
第一沟槽和第二沟槽可具有不同的深度。
第一栅极绝缘层和第二栅极绝缘层可具有不同的厚度。
第一栅极和第二栅极可具有不同的深度。
本发明概念的另一示例性实施例提供一种制造半导体器件的方法,所述方法包括:在n+型碳化硅衬底的第一表面上形成n-型外延层;在n-型外延层上形成n+型区;形成穿过n-型外延层和n+型区的第一沟槽和第二沟槽;在第一沟槽和第二沟槽中一者的两侧形成p-型区;分别在第一沟槽和第二沟槽内形成第一栅极绝缘层和第二栅极绝缘层;分别在第一栅极绝缘层和第二栅极绝缘层上形成第一栅极和第二栅极;在第一栅极和第二栅极上形成氧化膜;在氧化膜和n+型区上形成源极;以及在n+型碳化硅衬底的第二表面上形成漏极,其中第一沟道置于第一沟槽的两侧,并且第二沟道置于第二沟槽的两侧。
形成p-型区的步骤可包括通过向第一沟槽和第二沟槽中一者的两侧注入离子来形成p-型区。
第一沟道可以是积累层沟道,并且第二沟道可以是反型层沟道。
形成源极的步骤包括在氧化膜、n+型区和p-型区上形成源极。
形成源极的步骤可包括形成源极从而使源极的下表面交替地接触n+型区的上表面和p-型区的上表面。
形成第一沟槽和第二沟槽的步骤包括:蚀刻n-型外延层和n+型区来形成第一沟槽;以及蚀刻n-型外延层和n+型区以形成第二沟槽,其中第二沟槽与第一沟槽蚀刻成不同的深度。
形成第一栅极绝缘层和第二栅极绝缘层的步骤可包括形成第一栅极绝缘层以使第一栅极绝缘层具有的深度不同于第二栅极绝缘层的深度。
形成第一栅极绝缘层和第二栅极绝缘层的步骤可包括:在第一沟槽和第二沟槽中形成第一绝缘层;蚀刻置于第一沟槽中的第一绝缘层以形成第一栅极绝缘层;以及蚀刻置于第二沟槽中的第一绝缘层以形成第二栅极绝缘层,其中第一栅极绝缘层厚于第二栅极绝缘层。
本发明概念的另一示例性实施例提供一种制造半导体器件的方法,所述方法包括:在n+型碳化硅衬底的第一表面上形成n-型外延层;在n-型外延层上形成n+型区;形成穿过n-型外延层和n+型区的第一沟槽和第二沟槽;通过向第一沟槽和第二沟槽中一者的两侧注入离子来形成p-型区;在第一沟槽和第二沟槽中分别形成第一栅极绝缘层和第二栅极绝缘层;在第一栅极绝缘层和第二栅极绝缘层上分别形成第一栅极和第二栅极;在第一栅极和第二栅极上形成氧化膜;在氧化膜、n+型区以及p-型区上形成源极;以及在n+型碳化硅衬底的第二表面上形成漏极,其中源极交替地与n+型区和p-型区接触。
形成p-型区的步骤可包括:在第二沟槽的两侧形成p-型区,在第一沟槽的两侧形成第一沟道,以及在第二沟槽的两侧形成第二沟道,其中第一沟道是积累型沟道,并且第二沟道是反型层沟道。
根据本发明概念,由于半导体器件包括反型层沟道和积累层沟道两者,其能够减少阻抗并且增大电流量。
更进一步地,由于源极与n+型区和p-型区接触,能够克服电信号不能被直接连接的浮置。
更进一步地,能从本发明概念的示例性实施例获得或者预期的效果将在下文详细描述中进行直接或者暗示性地描述。即,从本发明概念的示例性实施例预期的各种效果将在下文中进行详细的描述。
附图说明
图1是示出根据本发明概念的示例性实施例的半导体器件的俯视图。
图2A是沿着图1中的线I-I截取的截面图,并且图2B是沿着图1中的线II-II截取的截面图。
图3到图8是顺序地示出根据本发明概念的示例性实施例的制造半导体器件的方法的视图。
图9是示出根据本发明概念的另一示例性实施例的半导体器件的截面图。
图10是示出根据本发明概念的另一示例性实施例的半导体器件的截面图。
图11是将根据本发明概念的示例性实施例的半导体器件与根据对比示例性实施例的半导体器件进行对比的表格。
图12是将根据本发明概念的示例性实施例的半导体器件与根据对比示例性实施例的半导体器件进行对比的曲线图。
具体实施方式
根据本发明概念的示例性实施例的半导体器件的操作原理及半导体器件的制造方法将在下文中参考附图进行详细的描述。然而,下述附图和如下详细描述涉及用于有效地解释本发明概念的特点的多个示例性实施例中的一个示例性实施例。因此,本发明概念不应解释成限制于附图和如下描述。
更进一步地,在本发明概念的描述中,当确定现有众所周知的配置和功能不必定使本发明概念的范围不清楚时,不提供其详细描述。更进一步地,下述术语是考虑其在本发明概念中的功能进行定义的,并且其可根据用户、操作者或者消费者的意图而改变。因此,其定义应在本发明概念描述的基础上进行。
更进一步地,下述示例性实施例中,为了有效地解释本发明概念的主要技术特征,术语被适当的改变、结合或者划分从而使本领域技术人员能够清楚地理解它们,但是本发明概念不限于此。
下文中,本发明概念的示例性实施例将参考附图进行详细的描述。
根据本发明概念的示例性实施例的半导体器件将参考图1、图2A和图2B进行描述。
图1是示出根据本发明概念的示例性实施例的半导体器件的俯视图,图2A是沿着图1中的线I-I截取的截面图,并且图2B是沿着图1中的线II-II截取的截面图。图1是示出无源极的半导体器件的俯视图。
参考图1、2A和2B,半导体器件50包括n+型碳化硅衬底100、n-型外延层110、n+型区120、p-型区130、第一沟槽143、第二沟槽145、第一栅极绝缘层153、第二栅极绝缘层155、第一栅极163、第二栅极165、氧化膜170、源极180,以及漏极190。
n-型外延层110置于n+型碳化硅衬底100的第一表面上。
n+型区120在n-型外延层110上形成。n+型区120可由n+离子制成,n+离子例如是磷(P)、砷(As)以及锑(Sb)。
第一沟槽143和第二沟槽145在n-型外延层110中形成。即,第一沟槽143和第二沟槽145被形成为穿过n-型外延层110和n+型区120。
第一栅极绝缘层153在第一沟槽143中形成。即,第一栅极绝缘层153在第一沟槽143的内侧形成。第一栅极163在第一栅极绝缘层153上形成。换句话说,第一栅极163填充除第一栅极绝缘层153形成的部分以外的第一沟槽143的部分。
第二栅极绝缘层155和第二栅极165在第二沟槽145中形成。即,第二栅极绝缘层155围绕着第二沟槽145的内侧形成,并且第二栅极165在第二栅极绝缘层155上形成,填充第二沟槽145。
p-型区130在第二沟槽145的两侧形成。
第一沟槽143和第二沟槽145可具有不同的深度。
氧化膜170在位于第一沟槽143的第一栅极绝缘层153和第一栅极163上形成,并且在位于第二沟槽145的第二栅极绝缘层155和第二栅极165上形成。
氧化膜170、第一栅极绝缘层153以及第二栅极绝缘层155可由氧化硅(SiO2)制成。
源极180在n+型区120、p-型区130以及氧化膜170上形成。即,如图2A所示,源极180的底部与氧化膜170的顶部相接触,并且如图1中的附图标记“250”所示,n+型区120的顶部和p-型区130的顶部彼此交替接触。因此,在根据本发明概念的示例性实施例的半导体器件50中,由于源极180与n+型区120和p-型区130两者都接触,通过直接提供电信号能够阻止浮置。
漏极190在n+型碳化硅衬底100的另一侧上形成。
第一栅极163、第二栅极165、源极180以及漏极190可由金(Au)、银(Ag)、铬(Cr)、钛(Ti)、铜(Cu)、铝(Al)、钽(Ta)、钼(Mo)、钨(W)、镍(Ni)、钯(Pd)以及铂(Pt)中选择任意一者或者其合金制成。第一栅极163、第二栅极165、源极180以及漏极190可由多晶硅制成。
半导体器件50在第一沟槽143和第二沟槽145处分别具有第一沟道210和第二沟道220。第一沟道210和第二沟道220通过电荷载流子在第一沟槽143和第二沟槽145处积累而形成。
如上所述,由于第一沟道210和第二沟道220是通过电荷载流子的积累形成,因此第一沟道210和第二沟道220将变得更深。因此,氧化膜170的接触面的影响将减少,从而电子的移动性将提高并且第一沟道210和第二沟道220的电阻将减小。
第一沟道210是在n-型外延层110中的第一沟槽143的两侧都形成的积累层沟道,并且第二沟道220是在p-型区130中,在第二沟槽145的两侧都形成的反型层沟道。
当施加电压至第一栅极163和第二栅极165时,电子和电流从源极180通过第一沟道210和第二沟道220流至漏极190。即,通过施加电压至第一栅极163和第二栅极165,电荷通过在沟道区域积累产生积累层沟道以及反型层沟道,从而该器件可导通。积累层沟道和反型层沟道可独立或者同时的导通,其取决于制造结果。
因此,由于在根据本发明概念的示例性实施例的半导体器件50中同时具有积累层沟道和反型层沟道,因此其能够提供低阻抗。
根据本发明概念的示例性实施例的制造半导体器件的方法现在将参考图3到图8进行描述。
图3到图8是顺序地示出根据本发明概念的示例性实施例的制造半导体器件的方法的视图。
根据图3,n-型外延层110在n+型碳化硅衬底100的侧面形成。
换句话说,n+型碳化硅衬底100被预备以制造半导体器件50。因此,n+型碳化硅衬底100能被清洁。清洁n+型碳化硅衬底100的原因是为了移除在n+型碳化硅衬底100上的包括有机物和无机物的外来物质。
n-型外延层110通过在n+型碳化硅衬底100的侧面外延伸长而形成。
根据图4,n+型区120在n-型外延层110上形成。即,n+型区120是在n-型外延层110上通过注入n+离子形成,n+离子例如是磷(P),砷(As)和锑(Sb)。
根据图5,第二沟槽145和p-型区130在n-型外延层110中形成。
换句话说,第二沟槽145通过蚀刻n-型外延层110和n+型区120形成。即,第二沟槽145被形成为穿过n+型区120,并且形成在n-型外延层110的一部分中。因此,p-型区130在n+型区120之下、在第二沟槽145的两侧通过注入p-离子形成,p-离子例如是硼(B)和铝(Al)。更进一步地,当第二沟槽145被蚀刻时或者之后,n+型区120的部分被蚀刻,从而p-型区130与源极180接触。因此,p-型区130的部分能与n+型区120接触并且其余的部分能与源极180接触。
根据图6,第一沟槽143在n-型外延层110中形成,并且形成第一绝缘层150。
换句话说,第一沟槽143通过蚀刻n-型外延层110和n+型区120而形成。即,第一沟槽143被形成为穿过n+型区120,并且形成在n-型外延层110的一部分中。第一沟槽143可形成深于第二沟槽145。第一绝缘层150被形成以在第一沟槽143、第二沟槽145以及n+型区120上形成第一栅极绝缘层153和第二栅极绝缘层155。
尽管参考图5和图6示出了可单独形成第一沟槽143和第二沟槽145,但是本发明概念不限于此,并且第一沟槽143和第二沟槽145可以同时形成。
根据图7,第二绝缘层151在第二沟槽145中形成。
换句话说,在第二沟槽145中形成的第一绝缘层150被蚀刻,并且第二绝缘层151形成在第二沟槽145的内侧上以比在第一沟槽143中形成的第一绝缘层150更薄。
根据图8,第一栅极163以及第二栅极165分别在第一沟槽143和第二沟槽145中形成,并且之后形成源极180和漏极190。
具体地,第一栅极绝缘层153和第二栅极绝缘层155通过蚀刻形成于n+型区120上的第一绝缘层150和第二绝缘层151而形成。第一栅极163和第二栅极165在第一栅极绝缘层153和第二栅极绝缘层155形成所在的第一沟槽143和第二沟槽145中形成。在第一栅极绝缘层153、第一栅极163,、第二栅极绝缘层155以及第二栅极165上的氧化膜170由氧化硅(SiO2)制成。
源极180在氧化膜170、n+型区120以及p-型区130上形成,并且漏极190在n+型碳化硅衬底100的另一侧上形成。
如图8所示,在根据本发明概念的示例性实施例的半导体器件50中,第一栅极绝缘层153的厚度t11大于第二栅极绝缘层155的厚度t12,并且第一沟槽143的深度d11大于第二沟槽145的深度d12,因此,第一栅极163也可形成深于第二栅极165。
在关断状态中,电场集中在栅极下端边缘,使得栅极可击穿。因此,通过使得第一栅极绝缘层153的厚积累层沟道的第一栅极163深于反型层沟道的第二栅极165,能够使得即使在高压下也能防止栅极被击穿。因此击穿电压提高。
更进一步地,如图9所示,在根据本发明概念的另一示例性实施例的半导体器件50中,第一沟槽143的深度d21与第二沟槽145的深度d22相同,但是第一栅极绝缘层153的厚度t21大于第二栅极绝缘层155的厚度t22。
当栅极绝缘层具有同样的厚度时,积累层沟道的阈值电压低于反型层沟道的阈值电压。因此,能够通过使得第一栅极绝缘层153厚于第二栅极绝缘层155来提高阈值电压以防止在导通状态下在积累层沟道中可引起的电流泄漏。
进一步地,如图10所示,在根据本发明概念的另一示例性实施例的半导体器件50中,第一沟槽143的深度d31与第二沟槽145的深度d32相同,并且第一栅极绝缘层153的厚度t31也与第二栅极绝缘层155的厚度t32相同。
根据本发明概念的示例性实施例的半导体器件与根据对比示例的半导体器件的特点将参考图11和12进行描述。
图11是将根据本发明概念的示例性实施例的半导体器件与根据对比示例性实施例的半导体器件对比的示例图,以及图12是将根据本发明概念的示例性实施例的半导体器件与根据对比示例性实施例的半导体器件对比的曲线图。
图11中所示的表格示出根据本发明概念的示例性实施例的半导体器件和根据对比示例性实施例的半导体器件的特性的模拟结果,并且图12是示出根据本发明概念的示例性实施例的半导体器件与根据对比示例性实施例的半导体器件的阻抗的曲线图。
在图11和图12中,结构A510是只包括反型层沟道的半导体器件,结构B520是只包括积累层沟道的半导体器件,并且本发明概念530是根据示例性实施例的包括反型层沟道和积累层沟道的半导体器件。
根据图11,在结构A510的半导体器件中,由于充足的阈值电压,栅极绝缘层可形成相对薄。然而,阻抗高,从而能够发现电子和电流的流动缓慢,并且电流密度低。
结构B520的半导体器件具有低阻抗,从而能够发现电子和电流的流动快并且电流密度高。
对于根据本发明概念的示例性实施例530的半导体器件,能够发现其阻抗低于结构A510的半导体器件和结构B520的半导体器件的阻抗,并且其电流密度得以提高。即,在根据本发明概念的示例性实施例的半导体器件中,在同样水平的击穿电压下,其阻抗相较于结构A510的半导体器件减少34%,并且相较于结构B520的半导体器件减少21%。更进一步地,在根据本发明概念的示例性实施例的半导体器件中,在同样水平的击穿电压下,其电流密度相较于结构A510的半导体器件提高了51%,并且相较于结构B520的半导体器件提高了26%。
因此,在根据本发明概念的示例性实施例的半导体器件中,由于电流密度提高,能够在减小的区域中提供同样的电流。
更进一步地,能够发现在根据本发明概念的示例性实施例530的半导体器件中示出半导体器件性能的性能指标大于在结构A510的半导体器件和结构B520的半导体器件的性能指标。即,在根据本发明概念的示例性实施例的半导体器件中,其性能指标相较于结构A510的半导体器件提高51%,并且相较于结构B520的半导体器件提高28%。
因此,能够发现根据本发明概念的示例性实施例的包括积累层沟道和反型层沟道的半导体器件具有比只包括反型层沟道的结构A510的半导体器件和只包括积累层沟道的结构B520的半导体器件更高的性能。示出半导体器件的性能的性能指标,通常是通过用击穿电压的平方除以阻抗得到。
虽然本发明概念参考多个示例性实施例进行了描述,但应当理解的是,在未违背所附权利要求主张的本发明概念的技术思想和范围的情况下,本发明概念可以以多种方式进行变化和修改。
Claims (17)
1.一种半导体器件,其包括:
n-型外延层,其置于n+型碳化硅衬底的第一表面上;
n+型区,其置于所述n-型外延层上;
第一沟槽和第二沟槽,其置于所述n-型外延层和所述n+型区中;
第一栅极绝缘层和第二栅极绝缘层,其分别置于所述第一沟槽和第二沟槽内;
第一栅极和第二栅极,其分别置于所述第一栅极绝缘层和第二栅极绝缘层上;
p-型区,其置于所述第一沟槽和第二沟槽中一者的两侧;
氧化膜,其置于所述第一栅极和第二栅极上;
源极,其置于所述n+型区和所述氧化膜上;以及
漏极,其置于所述n+型碳化硅衬底的第二表面上,
其中在所述第一沟槽的两侧上设置有第一沟道,并且在所述第二沟槽的两侧上设置有第二沟道。
2.根据权利要求1所述的半导体器件,其中所述源极与所述n+型区和所述p-型区相接触。
3.根据权利要求1所述的半导体器件,其中所述源极的下表面交替地与所述n+型区的上表面和所述p-型区的上表面接触。
4.根据权利要求1所述的半导体器件,其中所述p-型区设置在所述第二沟槽的两侧上,以及所述第一沟道是积累层沟道,并且所述第二沟道是反型层沟道。
5.根据权利要求1所述的半导体器件,其中所述第一沟槽和第二沟槽具有不同的深度。
6.根据权利要求1所述的半导体器件,其中所述第一栅极绝缘层和第二栅极绝缘层具有不同的厚度。
7.根据权利要求1所述的半导体器件,其中所述第一栅极和第二栅极具有不同的深度。
8.一种制造半导体器件的方法,所述方法包括以下步骤:
在n+型碳化硅衬底的第一表面上形成n-型外延层;
在所述n-型外延层上形成n+型区;
形成穿过所述n-型外延层和所述n+型区的第一沟槽和第二沟槽;
在所述第一沟槽和第二沟槽中一者的两侧形成p-型区;
分别在所述第一沟槽和第二沟槽内形成第一栅极绝缘层和第二栅极绝缘层;
分别在所述第一栅极绝缘层和第二栅极绝缘层上形成第一栅极和第二栅极;
在所述第一栅极和第二栅极上形成氧化膜;
在所述氧化膜和所述n+型区上形成源极;以及
在所述n+型碳化硅衬底的第二表面上形成漏极,
其中在所述第一沟槽的两侧上设置有第一沟道,并且在所述第二沟槽的两侧上设置有第二沟道。
9.根据权利要求8所述的方法,其中所述形成p-型区的步骤包括通过向所述第一沟槽和第二沟槽中的一者的两侧注入离子形成所述p-型区。
10.根据权利要求9所述的方法,其中所述第一沟道是积累层沟道,并且所述第二沟道是反型层沟道。
11.根据权利要求8所述的方法,其中所述形成源极的步骤包括在所述氧化膜、所述n+型区以及所述p-型区上形成源极。
12.根据权利要求8所述的方法,其中所述形成源极的步骤包括形成所述源极从而使所述源极的下表面交替地与所述n+型区的上表面和所述p-型区的上表面相接触。
13.根据权利要求8所述的方法,其中所述形成第一沟槽和第二沟槽的步骤包括:
蚀刻所述n-型外延层和所述n+型区以形成所述第一沟槽;以及
蚀刻所述n-型外延层和所述n+型区以形成所述第二沟槽,
其中所述第二沟槽被蚀刻至不同于所述第一沟槽的深度。
14.根据权利要求8所述的方法,其中所述形成第一栅极绝缘层和第二栅极绝缘层的步骤包括形成所述第一栅极绝缘层以使所述第一栅极绝缘层具有的深度不同于所述第二栅极绝缘层的深度。
15.根据权利要求8所述的方法,其中所述形成第一栅极绝缘层和第二栅极绝缘层的步骤包括:
在所述第一沟槽和第二沟槽中形成第一绝缘层;
蚀刻置于所述第一沟槽中的所述第一绝缘层以形成第一栅极绝缘层;以及
蚀刻置于所述第二沟槽中的所述第一绝缘层以形成第二栅极绝缘层,
其中,所述第一栅极绝缘层厚于所述第二栅极绝缘层。
16.一种制造半导体器件的方法,所述方法包括以下步骤:
在n+型碳化硅衬底的第一表面上形成n-型外延层;
在n-型外延层上形成n+型区;
形成穿过所述n-型外延层和所述n+型区的第一沟槽和第二沟槽;
通过向所述第一沟槽和第二沟槽中的一者的两侧注入离子来形成p-型区;
分别在所述第一沟槽和第二沟槽中形成第一栅极绝缘层和第二栅极绝缘层;
分别在所述第一栅极绝缘层和第二栅极绝缘层上形成第一栅极和第二栅极;
在所述第一栅极和第二栅极上形成氧化膜;
在所述氧化膜、所述n+型区以及所述p-型区上形成源极;以及
在所述n+型碳化硅衬底的第二表面上形成漏极,
其中所述源极交替地与所述n+型区和所述p-型区相接触。
17.根据权利要求16所述的方法,其中所述形成p-型区的步骤包括在所述第二沟槽的两侧形成p-型区,在所述第一沟槽的两侧形成第一沟道,并且在所述第二沟槽的两侧形成第二沟道,
其中所述第一沟道是积累层沟道,并且所述第二沟道是反型层沟道。
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