CN107046062B - 一种具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管 - Google Patents
一种具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管 Download PDFInfo
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Abstract
本发明提出了一种具有半绝缘多晶硅(SIPOS)层的纵向双扩散金属氧化物半导体场效应管(VDMOS),该器件主要的特征是在器件漂移区的侧壁形成SIPOS填充层,SIPOS填充层两端分别连接器件的栅漏两端。一方面,由于SIPOS层具有均匀的电阻率,在器件关断时,SIPOS上具有均匀的电场。根据电位移连续方程可知,器件漂移区上的电场受到SIPOS上均匀电场的调制变得更加均匀。并且SIPOS层使得VDMOS器件漂移区的耗尽增强,从而器件漂移区的掺杂浓度提高,使得器件在导通时具有较低的导通电阻。另一方面,在器件开态时,由于SIPOS层与器件漂移区表面具有电势差,使得器件漂移区存在多数载流子积累,从而使得器件的导通电阻进一步降低。
Description
技术领域
本发明涉及半导体器件领域,特别是涉及一种沟槽(Trench)型的纵向双扩散金属氧化物半导体场效应管。
背景技术
功率半导体器件的发展,使得电子产品进入到了一个新阶段。功率MOSFET是多子导电的器件,具有开关速度快、输入阻抗高、易驱动、不存在二次击穿现象等优点。在1985年由D.Ueda等人提出了沟槽(Trench)MOS结构。采用U型沟槽结构使得器件的导通沟道由横向变为纵向,有效地消除了JFET的电阻,大大增加了原胞密度,提高了器件的电流处理能力。然而在功率器件高压应用领域内,随着器件击穿电压的升高,功率VDMOS外延层厚度不断增加,漂移区掺杂浓度逐渐降低,导致器件的导通电阻会随着器件击穿电压的2.5次急剧增加,使得器件的导通损耗增大。
发明内容
本发明提出了一种具有半绝缘多晶硅(SIPOS)层的纵向双扩散金属氧化物半导体场效应管(VDMOS),旨在优化VDMOS器件击穿电压与比导通电阻的矛盾关系。
本发明的技术方案如下:
一种具有半绝缘多晶硅(SIPOS)层的纵向双扩散金属氧化物半导体场效应管(VDMOS),包括:
半导体材料的衬底,兼作漏区;
在衬底上外延生长形成的漂移区;
在所述漂移区上表面掺杂形成的左、右两处基区;
在所述基区上部掺杂分别形成的源区和沟道衬底接触;
在所述源区和沟道衬底接触上表面形成的源极;
在所述漏区下表面形成的漏极;
有别于现有技术的是,还包括:
在所述左、右两处基区之间刻蚀的沟槽,沟槽沿纵向穿过漂移区至衬底漏区;沟槽的深宽比根据器件的漂移区的长度来确定,漂移区的长度根据击穿电压要求确定;
在所述沟槽侧壁依次形成的栅绝缘层、具有掺氧的半绝缘多晶硅层,使半绝缘多晶硅层纵向两端与器件的栅漏两端相连;
在表面成为半绝缘多晶硅层的沟槽内填充的绝缘体,绝缘体与漂移区纵向等高;半绝缘多晶硅层纵向表面对应于基区为重掺杂区域;
在半绝缘多晶硅层纵向表面对应于基区形成的栅极。
在以上方案的基础上,本发明还作了如下优化:
击穿电压要求600V时,则深宽比为1:15~1:25;击穿电压要求200V时,则深宽比为1:3-1:6。
半绝缘多晶硅层的厚度为0.2~1.5μm。
半绝缘多晶硅层的掺氧比例为15%~35%,其相应电阻率为109~1011Ω·cm。
半绝缘多晶硅层中所述重掺杂区域的掺杂浓度为1018~1020cm-3。
栅绝缘层的厚度为0.02~0.1μm。
耐压要求600V时,在衬底上外延生长25~50μm形成漂移区。
半导体材料为Si、SiC或GaAs。
半导体材料的衬底的掺杂浓度为1×1013cm-3~1×1015cm-3。
一种制作上述具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管的方法,包括以下步骤:
1)取半导体材料的衬底同时作为漏区;
2)在衬底上形成外延层作为漂移区;
3)在漂移区上部以离子注入或扩散形成基区;
4)在基区刻蚀沟槽,使沟槽向下穿过漂移区至漏区;
5)在沟槽侧壁上形成栅绝缘层;
6)在栅绝缘层外淀积形成半绝缘多晶硅层并掺氧;
7)在沟槽内纵向对应于漂移区的区域淀积绝缘体;
8)在基区上掺杂形成源区和沟道衬底接触;
9)对沟槽内半绝缘多晶硅层表面纵向对应于基区的区域进行重掺杂,并淀积多晶硅形成栅极;
10)源区和沟道衬底接触表面形成源极;
11)漏区表面形成漏极。
本发明技术方案的有益效果如下:
利用深沟槽技术在VDMOS器件漂移区的侧壁上形成半绝缘多晶硅(SIPOS)层,使其两端分别连接器件的栅电极和漏电极(接至漏区可视为与漏电极连接)。一方面,由于半绝缘多晶硅(SIPOS)层具有均匀的电阻率,在器件关断时,SIPOS上具有均匀的电场。根据电位移连续方程可知,器件漂移区上的电场受到SIPOS上均匀电场的调制变得更加均匀;并且SIPOS层使得VDMOS器件漂移区的耗尽增强,从而器件漂移区的掺杂浓度提高,使得器件在导通时具有较低的导通电阻。另一方面,在器件开态时,由于SIPOS层与器件漂移区表面具有电势差,使得器件漂移区存在多数载流子积累,从而使得器件的导通电阻进一步降低。
总之,SIPOS VDMOS器件相比传统的VDMOS器件,在相同漂移区长度的情况下,SIPOS VDMOS器件具有更高的耐压和更低的导通损耗,SIPOS VDMOS器件具有更好的性能。
附图说明
图1为本发明实施例的结构示意图(正视图),器件结构沿图中虚线镜像对称。
附图标号说明:
1-源极;2-栅绝缘层;3-半绝缘多晶硅层;4-栅极;5-绝缘体;6-漏极;7-衬底漏区;8-漂移区;9-基区;10-沟道衬底接触;11-源区。
具体实施方式
如图1所示,该具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管包括:
半导体材料的衬底漏区7,掺杂浓度为1×1013cm-3~1×1015cm-3;
位于衬底上的外延层形成的漂移区8;
在所述漂移区上掺杂形成的基区9;
在基区上刻蚀沟槽,沟槽向下穿过漂移区至衬底漏区;
在沟槽侧壁上形成的栅绝缘层2,厚度为0.02~0.1μm;
在栅绝缘层外淀积形成的具有掺氧的半绝缘多晶硅层3;半绝缘多晶硅层的厚度为0.2~1.5μm;半绝缘多晶硅层的掺氧比例为15%~35%,其相应电阻率为109~1011Ω·cm;
在沟槽内纵向对应于漂移区8的区域内淀积绝缘体5;
在基区上掺杂分别形成源区11和沟道衬底接触10;
对半绝缘多晶硅层3表面纵向对应于基区的区域进行高浓度掺杂(例如1018~1020cm-3)并形成栅极4;。
在源区11和沟道衬底接触10上形成源极。
利用深沟槽技术在VDMOS器件漂移区的侧壁上形成SIPOS层,SIPOS层两端分别连接器件的栅电极和漏电极。一方面,由于半SIPOS层具有均匀的电阻率,在器件关断时,SIPOS上具有均匀的电场。根据电位移连续方程可知,器件漂移区上的电场受到SIPOS上均匀电场的调制变得更加均匀。并且SIPOS层使得VDMOS器件漂移区的耗尽增强,从而器件漂移区的掺杂浓度提高,使得器件在导通时具有较低的导通电阻。另一方面,在器件开态时,由于SIPOS层与器件漂移区表面具有电势差,使得器件漂移区存在多数载流子积累,从而使得器件的导通电阻进一步降低。
以N沟道VDMOS为例,具体可以通过以下步骤进行制备:
1)半绝缘材料(包括Si、SiC和GaAs等)的衬底作为漏区;
2)在衬底漏区上外延层上形成N型漂移区;
3)在N型漂移区上通过离子注入或扩散形成P型基区;
4)在P型基区上刻蚀沟槽,沟槽下方穿过漂移区至衬底漏区;沟槽的深宽比根据器件的漂移区的长度(也即衬底上外延生长的厚度)来确定,漂移区的长度根据击穿电压要求确定;击穿电压要求600V时,则深宽比为1:15~1:25;击穿电压要求200V时,则深宽比为1:3-1:6;
5)在沟槽侧壁上形成栅绝缘层;
6)在栅绝缘层外淀积一层薄的SIPOS层并掺氧;
7)在沟槽内的纵向漂移区区域内淀积SiO2;
8)在基区通过离子注入分别形成源区和沟道衬底接触;
9)在沟槽内即基区外侧区域通过离子注入对SIPOS层进行高浓度掺杂;
10)沟槽内部基区区域淀积多晶硅形成栅电极;
11)器件表面淀积钝化层,并刻蚀接触孔;
12)淀积金属并刻蚀形成源极和栅电极;
13)在衬底漏区上形成漏电极。
经Sentaurus仿真,本发明提出的新型器件的性能较之于传统器件大幅度提升,在两种器件在相等的击穿电压下,新型器件的导通电阻降低了45%。
当然,本发明中的VDMOS也可以为P型沟道,其结构与N沟道VDMOS等同,这些均应视为属于本申请权利要求的保护范围,在此不再赘述。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和替换,这些改进和替换的方案也落入本发明的保护范围。
Claims (10)
1.一种具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,包括:
半导体材料的衬底,兼作漏区;
在衬底上外延生长形成的漂移区;
在所述漂移区上表面掺杂形成的左、右两处基区;
在所述基区上部掺杂分别形成的源区和沟道衬底接触;
在所述源区和沟道衬底接触上表面形成的源极;
在所述漏区下表面形成的漏极;
其特征在于,还包括:
在所述左、右两处基区之间刻蚀的沟槽,沟槽沿纵向穿过漂移区至衬底漏区;沟槽的深宽比根据器件的漂移区的长度来确定,漂移区的长度根据击穿电压要求确定;
在所述沟槽侧壁依次形成的栅绝缘层、具有掺氧的半绝缘多晶硅层,使半绝缘多晶硅层纵向两端与器件的栅漏两端相连;
在表面成为半绝缘多晶硅层的沟槽内填充的绝缘体,绝缘体与漂移区纵向等高;半绝缘多晶硅层纵向表面对应于基区为重掺杂区域;
在半绝缘多晶硅层纵向表面对应于基区形成的栅极。
2.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:击穿电压要求600V时,则沟槽的深宽比为1:15~1:25;击穿电压要求200V时,则沟槽的深宽比为1:3-1:6。
3.根据权利要求2所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:半绝缘多晶硅层的厚度为0.2~1.5μm。
4.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:半绝缘多晶硅层的掺氧比例为15%~35%,其相应电阻率为109~1011Ω·cm。
5.根据权利要求4所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:半绝缘多晶硅层中所述重掺杂区域的掺杂浓度为1018~1020cm-3。
6.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:栅绝缘层的厚度为0.02~0.1μm。
7.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:耐压要求600V时,在衬底上外延生长25~50μm形成漂移区。
8.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:所述半导体材料为Si、SiC或GaAs。
9.根据权利要求1所述的具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管,其特征在于:半导体材料的衬底的掺杂浓度为1×1013cm-3~1×1015cm-3。
10.一种制作权利要求1所述具有半绝缘多晶硅层的纵向双扩散金属氧化物半导体场效应管的方法,其特征在于,包括以下步骤:
1)取半导体材料的衬底同时作为漏区;
2)在衬底上形成外延层作为漂移区;
3)在漂移区上部以离子注入或扩散形成基区;
4)在基区刻蚀沟槽,使沟槽向下穿过漂移区至漏区;
5)在沟槽侧壁上形成栅绝缘层;
6)在栅绝缘层外淀积形成半绝缘多晶硅层并掺氧;
7)在沟槽内纵向对应于漂移区的区域淀积绝缘体;
8)在基区上掺杂形成源区和沟道衬底接触;
9)对沟槽内半绝缘多晶硅层表面纵向对应于基区的区域进行重掺杂,并淀积多晶硅形成栅极;
10)源区和沟道衬底接触表面形成源极;
11)漏区表面形成漏极。
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