CN104798219B - 使用中部制程(mol)导电层的电容器 - Google Patents

使用中部制程(mol)导电层的电容器 Download PDF

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Publication number
CN104798219B
CN104798219B CN201380060433.XA CN201380060433A CN104798219B CN 104798219 B CN104798219 B CN 104798219B CN 201380060433 A CN201380060433 A CN 201380060433A CN 104798219 B CN104798219 B CN 104798219B
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China
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capacitor
mol
layer
pole plate
mol conductive
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Chinese (zh)
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CN104798219A (zh
Inventor
Pr·齐达姆巴兰姆
B·杨
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Qualcomm Inc
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Qualcomm Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5228—Resistive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN201380060433.XA 2012-11-21 2013-11-21 使用中部制程(mol)导电层的电容器 Active CN104798219B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/684,059 2012-11-21
US13/684,059 US9012966B2 (en) 2012-11-21 2012-11-21 Capacitor using middle of line (MOL) conductive layers
PCT/US2013/071347 WO2014081982A1 (en) 2012-11-21 2013-11-21 Capacitor using middle of line (mol) conductive layers

Publications (2)

Publication Number Publication Date
CN104798219A CN104798219A (zh) 2015-07-22
CN104798219B true CN104798219B (zh) 2018-03-30

Family

ID=49726882

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380060433.XA Active CN104798219B (zh) 2012-11-21 2013-11-21 使用中部制程(mol)导电层的电容器

Country Status (6)

Country Link
US (2) US9012966B2 (enExample)
EP (1) EP2923388A1 (enExample)
JP (2) JP2015535147A (enExample)
KR (1) KR20150087312A (enExample)
CN (1) CN104798219B (enExample)
WO (1) WO2014081982A1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
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US9012966B2 (en) 2012-11-21 2015-04-21 Qualcomm Incorporated Capacitor using middle of line (MOL) conductive layers
FR3007198B1 (fr) * 2013-06-13 2015-06-19 St Microelectronics Rousset Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et procede de fabrication
FR3018139B1 (fr) 2014-02-28 2018-04-27 Stmicroelectronics (Rousset) Sas Circuit integre a composants, par exemple transistors nmos, a regions actives a contraintes en compression relachees
US9269610B2 (en) * 2014-04-15 2016-02-23 Qualcomm Incorporated Pattern between pattern for low profile substrate
FR3025335B1 (fr) 2014-08-29 2016-09-23 Stmicroelectronics Rousset Procede de fabrication d'un circuit integre rendant plus difficile une retro-conception du circuit integre et circuit integre correspondant
US9755013B2 (en) 2015-04-22 2017-09-05 Globalfoundries Inc. High density capacitor structure and method
US9673101B2 (en) 2015-09-30 2017-06-06 International Business Machines Corporation Minimize middle-of-line contact line shorts
US9893145B1 (en) * 2016-08-09 2018-02-13 International Business Machines Corporation On chip MIM capacitor
US10026731B1 (en) * 2017-04-14 2018-07-17 Qualcomm Incorporated Compound semiconductor transistor integration with high density capacitor
CN107170752B (zh) * 2017-05-10 2020-05-01 京东方科技集团股份有限公司 一种阵列基板制备方法、阵列基板和显示装置
US20190103320A1 (en) * 2017-10-03 2019-04-04 Qualcomm Incorporated Middle-of-line shielded gate for integrated circuits
US10707866B1 (en) * 2018-12-21 2020-07-07 Qualcomm Incorporated Capacitance balance in dual sided contact switch
CN110634845A (zh) * 2019-09-12 2019-12-31 上海华力集成电路制造有限公司 Mim电容的制造方法及一mim电容
US11462471B2 (en) * 2019-09-30 2022-10-04 Taiwan Semiconductor Manufacturing Company, Ltd. Middle-of-line interconnect structure and manufacturing method

Citations (1)

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US6459117B1 (en) * 2001-08-03 2002-10-01 Winbond Electronics Corp. Integrated circuit device formed with high Q MIM capacitor

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Also Published As

Publication number Publication date
JP2015535147A (ja) 2015-12-07
US20140138793A1 (en) 2014-05-22
CN104798219A (zh) 2015-07-22
US9012966B2 (en) 2015-04-21
US9496254B2 (en) 2016-11-15
KR20150087312A (ko) 2015-07-29
US20150221638A1 (en) 2015-08-06
EP2923388A1 (en) 2015-09-30
WO2014081982A1 (en) 2014-05-30
JP2018164113A (ja) 2018-10-18

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