CN104241229B - 具有贯穿电极的半导体封装及其制造方法 - Google Patents

具有贯穿电极的半导体封装及其制造方法 Download PDF

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Publication number
CN104241229B
CN104241229B CN201410279831.7A CN201410279831A CN104241229B CN 104241229 B CN104241229 B CN 104241229B CN 201410279831 A CN201410279831 A CN 201410279831A CN 104241229 B CN104241229 B CN 104241229B
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substrate
layer
chip
moulding layer
wafer
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CN104241229A (zh
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郑显秀
马金希
李仁荣
赵文祺
赵汊济
赵泰济
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Engineering & Computer Science (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
CN201410279831.7A 2013-06-21 2014-06-20 具有贯穿电极的半导体封装及其制造方法 Active CN104241229B (zh)

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Application Number Priority Date Filing Date Title
KR10-2013-0071775 2013-06-21
KR1020130071775A KR102077153B1 (ko) 2013-06-21 2013-06-21 관통전극을 갖는 반도체 패키지 및 그 제조방법
US14/264,120 2014-04-29
US14/264,120 US9245771B2 (en) 2013-06-21 2014-04-29 Semiconductor packages having through electrodes and methods for fabricating the same

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CN104241229A CN104241229A (zh) 2014-12-24
CN104241229B true CN104241229B (zh) 2017-10-13

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US (1) US9245771B2 (https=)
JP (1) JP5908030B2 (https=)
KR (1) KR102077153B1 (https=)
CN (1) CN104241229B (https=)

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