CN104022092A - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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Publication number
CN104022092A
CN104022092A CN201410264924.2A CN201410264924A CN104022092A CN 104022092 A CN104022092 A CN 104022092A CN 201410264924 A CN201410264924 A CN 201410264924A CN 104022092 A CN104022092 A CN 104022092A
Authority
CN
China
Prior art keywords
solder
connection
semiconductor chip
electrodes
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410264924.2A
Other languages
English (en)
Chinese (zh)
Inventor
秦英惠
中村真人
木下顺弘
绀野顺平
依田智子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of CN104022092A publication Critical patent/CN104022092A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01257—Changing the shapes of bumps by reflowing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07255—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H10W72/2528—Intermetallic compounds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings

Landscapes

  • Wire Bonding (AREA)
CN201410264924.2A 2009-07-16 2010-06-13 半导体器件的制造方法 Pending CN104022092A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009167716A JP5465942B2 (ja) 2009-07-16 2009-07-16 半導体装置およびその製造方法
JP2009-167716 2009-07-16

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2010102060615A Division CN101958298A (zh) 2009-07-16 2010-06-13 半导体器件及其制造方法

Publications (1)

Publication Number Publication Date
CN104022092A true CN104022092A (zh) 2014-09-03

Family

ID=43464697

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201410264924.2A Pending CN104022092A (zh) 2009-07-16 2010-06-13 半导体器件的制造方法
CN2010102060615A Pending CN101958298A (zh) 2009-07-16 2010-06-13 半导体器件及其制造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN2010102060615A Pending CN101958298A (zh) 2009-07-16 2010-06-13 半导体器件及其制造方法

Country Status (4)

Country Link
US (1) US8633103B2 (https=)
JP (1) JP5465942B2 (https=)
CN (2) CN104022092A (https=)
TW (1) TWI414049B (https=)

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EP2631934A4 (en) * 2010-10-22 2018-02-07 Panasonic Intellectual Property Management Co., Ltd. Semiconductor junction structure and method for manufacturing semiconductor junction structure
US9324905B2 (en) 2011-03-15 2016-04-26 Micron Technology, Inc. Solid state optoelectronic device with preformed metal support substrate
JP5613100B2 (ja) * 2011-04-21 2014-10-22 パナソニック株式会社 半導体装置の製造方法
WO2013038594A1 (ja) 2011-09-16 2013-03-21 パナソニック株式会社 実装構造およびその製造方法
US8497579B1 (en) * 2012-02-16 2013-07-30 Chipbond Technology Corporation Semiconductor packaging method and structure thereof
CN102637747A (zh) * 2012-04-05 2012-08-15 祁门县硅鼎电子元件厂 镀涂环保材料的双铜质电极整流管芯片及镀涂工艺
DE102013103081A1 (de) * 2013-03-26 2014-10-02 Osram Opto Semiconductors Gmbh Verfahren zum Verbinden von Fügepartnern und Anordnung von Fügepartnern
JP2015122445A (ja) * 2013-12-24 2015-07-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN104282582B (zh) * 2014-09-17 2017-02-01 中南大学 一种Ni‑P基板的封装方法
US10886250B2 (en) * 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
TWI910033B (zh) 2016-10-27 2025-12-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
JP6621068B2 (ja) * 2016-12-08 2019-12-18 パナソニックＩｐマネジメント株式会社 実装構造体
CN116848631A (zh) 2020-12-30 2023-10-03 美商艾德亚半导体接合科技有限公司 具有导电特征的结构及其形成方法
KR20230058949A (ko) * 2021-10-25 2023-05-03 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
US20240222139A1 (en) * 2022-12-29 2024-07-04 Intel Corporation Microelectronic package structures with solder joint assemblies having roughened bump structures
CN116313834B (zh) * 2023-05-24 2023-09-12 江西兆驰半导体有限公司 晶圆级封装方法及晶圆级封装结构

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US20040177997A1 (en) * 2001-04-18 2004-09-16 Hanae Hata Electronic apparatus
US20060061974A1 (en) * 2000-12-21 2006-03-23 Tasao Soga Solder foil semiconductor device and electronic device

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US20060061974A1 (en) * 2000-12-21 2006-03-23 Tasao Soga Solder foil semiconductor device and electronic device
US20040177997A1 (en) * 2001-04-18 2004-09-16 Hanae Hata Electronic apparatus
US20030066681A1 (en) * 2001-10-10 2003-04-10 Fujitsu Limited Solder paste and terminal-to-terminal connection structure

Also Published As

Publication number Publication date
JP2011023574A (ja) 2011-02-03
US8633103B2 (en) 2014-01-21
TW201104817A (en) 2011-02-01
CN101958298A (zh) 2011-01-26
TWI414049B (zh) 2013-11-01
JP5465942B2 (ja) 2014-04-09
US20110012263A1 (en) 2011-01-20

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Address after: Tokyo, Japan, Japan

Applicant after: Renesas Electronics Corporation

Address before: Kanagawa

Applicant before: Renesas Electronics Corporation

COR Change of bibliographic data
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20140903